17 Commits

Author	SHA1	Message	Date
Francisco Paisana	2d3681699a	added test for DL sched logical channel prioritization. At the moment only PBR=infinity is tested	2020-10-14 22:55:12 +01:00
Francisco Paisana	fe8f8be62d	apply separate cqi configurations to scells	2020-07-09 18:56:01 +02:00
Francisco Paisana	504e3a1b7a	fix max retx configuration in scheduler and updated tester to catch the error	2020-07-03 17:34:37 +01:00
Francisco Paisana	7713df2cf9	fix fixed mcs issue	2020-05-15 14:29:17 +01:00
Francisco Paisana	94b8dd39a9	cleanup of sched testing cfg generation	2020-05-05 14:35:40 +01:00
Francisco Paisana	d5f1581759	remove old tti counter class	2020-05-05 14:35:40 +01:00
Francisco Paisana	3c29bce014	apply segmentation break check to newtxs only. Allow configurable cqi	2020-05-05 14:35:40 +01:00
Francisco Paisana	179e959d05	fix msg3 retx issue. Now nof_prb for pucch above 1 are forbidden for prb==6	2020-04-01 15:02:21 +01:00
Xavier Arteaga	e832769ae6	Updated copyright	2020-03-16 11:26:06 +01:00
Xavier Arteaga	76408b195e	Rename TX_DELAY and FDD_HARQ_DELAY_MS	2020-03-11 21:16:36 +01:00
Francisco Paisana	9ad80ee29f	added initial_dl_cqi to the enb rr.cfg parser	2020-03-10 22:06:07 +00:00
Francisco Paisana	e62972d38e	fix fdd delays in scheduler	2020-03-10 14:17:49 +01:00
Francisco Paisana	b44754f0ae	the CA and random sched testers now use same structs and common interface.	2020-03-02 16:33:31 +00:00
Francisco Paisana	385fa226e0	started to use a type-safe tti counter for comparisons. Uniformized the common_sched_tester api. Next, need to use the same struct to register events.	2020-03-02 16:33:31 +00:00
Francisco Paisana	518f813f13	now the CA testing generation and simulation happen simultaneously. This way we can do more tti/event specific checks	2020-03-02 16:33:31 +00:00
Francisco Paisana	b319f8dfcd	created first version of CA test. Now we need to create actual asserts	2020-03-02 16:33:31 +00:00
Francisco Paisana	507bc2d2a2	created a test for CA. Currently is quite empty	2020-03-02 16:33:31 +00:00