DAC merge and rework, part 2.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5912 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
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e01bc962c7
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0dc43f5c24
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@ -3,6 +3,7 @@
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HALSRC = ${CHIBIOS}/os/hal/src/hal.c \
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${CHIBIOS}/os/hal/src/adc.c \
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${CHIBIOS}/os/hal/src/can.c \
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${CHIBIOS}/os/hal/src/dac.c \
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${CHIBIOS}/os/hal/src/ext.c \
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${CHIBIOS}/os/hal/src/gpt.c \
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${CHIBIOS}/os/hal/src/i2c.c \
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@ -305,9 +305,15 @@ extern "C" {
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void dacObjectInit(DACDriver *dacp);
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void dacStart(DACDriver *dacp, const DACConfig *config);
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void dacStop(DACDriver *dacp);
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void dacStartSend(DACDriver *dacp);
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#if DAC_USE_WAIT
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void dacSend(DACDriver *dacp);
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void dacStartConversion(DACDriver *dacp, const DACConversionGroup *grpp,
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const dacsample_t *samples, size_t depth);
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void dacStartConversionI(DACDriver *dacp, const DACConversionGroup *grpp,
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const dacsample_t *samples, size_t depth);
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void dacStopConversion(DACDriver *dacp);
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void dacStopConversionI(DACDriver *dacp);
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#if DAC_USE_WAIT || defined(__DOXYGEN__)
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msg_t dacConvert(DACDriver *dacp, const DACConversionGroup *grpp,
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const dacsample_t *samples, size_t depth);
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#endif /* DAC_USE_WAIT */
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#if DAC_USE_MUTUAL_EXCLUSION
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void dacAcquireBus(DACDriver *dacp);
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@ -196,6 +196,60 @@ void dacStartConversionI(DACDriver *dacp,
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dac_lld_start_conversion(dacp);
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}
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/**
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* @brief Stops an ongoing conversion.
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* @details This function stops the currently ongoing conversion and returns
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* the driver in the @p DAC_READY state. If there was no conversion
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* being processed then the function does nothing.
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*
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* @param[in] dacp pointer to the @p DACDriver object
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*
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* @api
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*/
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void dacStopConversion(DACDriver *dacp) {
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chDbgCheck(dacp != NULL, "dacStopConversion");
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chSysLock();
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chDbgAssert((dacp->state == DAC_READY) ||
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(dacp->state == DAC_ACTIVE),
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"dacStopConversion(), #1", "invalid state");
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if (dacp->state != DAC_READY) {
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adc_lld_stop_conversion(dacp);
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dacp->grpp = NULL;
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dacp->state = DAC_READY;
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_dac_reset_s(dacp);
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}
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chSysUnlock();
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}
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/**
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* @brief Stops an ongoing conversion.
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* @details This function stops the currently ongoing conversion and returns
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* the driver in the @p DAC_READY state. If there was no conversion
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* being processed then the function does nothing.
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*
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* @param[in] dacp pointer to the @p DACDriver object
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*
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* @iclass
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*/
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void dacStopConversionI(DACDriver *dacp) {
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chDbgCheckClassI();
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chDbgCheck(dacp != NULL, "dacStopConversionI");
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chDbgAssert((dacp->state == DAC_READY) ||
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(dacp->state == DAC_ACTIVE) ||
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(dacp->state == DAC_COMPLETE),
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"dacStopConversionI(), #1", "invalid state");
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if (dacp->state != DAC_READY) {
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adc_lld_stop_conversion(dacp);
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dacp->grpp = NULL;
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dacp->state = DAC_READY;
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_dac_reset_i(dacp);
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}
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}
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#if DAC_USE_WAIT || defined(__DOXYGEN__)
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/**
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* @brief Performs a DAC conversion.
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@ -0,0 +1,380 @@
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/*
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ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
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2011,2012 Giovanni Di Sirio.
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This file is part of ChibiOS/RT.
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ChibiOS/RT is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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ChibiOS/RT is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/**
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* @file STM32F37x/dac_lld.c
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* @brief STM32F37x DAC subsystem low level driver source.
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*
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* @addtogroup DAC
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* @{
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*/
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#include "ch.h"
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#include "hal.h"
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#if HAL_USE_DAC || defined(__DOXYGEN__)
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/*===========================================================================*/
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/* Driver local definitions. */
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/*===========================================================================*/
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#if !defined(DAC1)
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#define DAC1 DAC
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#define rccEnableDAC1 rccEnableDAC
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#define rccDisableDAC1 rccDisableDAC
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#endif
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#define DAC_CHN1_DMA_CHANNEL \
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STM32_DMA_GETCHANNEL(STM32_DAC_CHN1_DMA_STREAM, \
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STM32_DAC_CHN1_DMA_CHN)
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#define DAC_CHN2_DMA_CHANNEL \
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STM32_DMA_GETCHANNEL(STM32_DAC_CHN2_DMA_STREAM, \
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STM32_DAC_CHN2_DMA_CHN)
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#define DAC_CHN3_DMA_CHANNEL \
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STM32_DMA_GETCHANNEL(STM32_DAC_CHN3_DMA_STREAM, \
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STM32_DAC_CHN3_DMA_CHN)
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/*===========================================================================*/
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/* Driver exported variables. */
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/*===========================================================================*/
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/** @brief CHN1 driver identifier.*/
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#if STM32_DAC_USE_CHN1 || defined(__DOXYGEN__)
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DACDriver DACD1;
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#endif
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/** @brief CHN2 driver identifier.*/
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#if STM32_DAC_USE_CHN2 || defined(__DOXYGEN__)
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DACDriver DACD2;
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#endif
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/** @brief CHN3 driver identifier.*/
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#if STM32_DAC_USE_CHN3 || defined(__DOXYGEN__)
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DACDriver DACD3;
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#endif
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/*===========================================================================*/
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/* Driver local variables. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver local functions. */
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/*===========================================================================*/
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/**
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* @brief Shared end/half-of-tx service routine.
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*
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* @param[in] dacp pointer to the @p DACDriver object
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* @param[in] flags pre-shifted content of the ISR register
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*/
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static void dac_lld_serve_tx_interrupt(DACDriver *dacp, uint32_t flags) {
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#if defined(STM32_DAC_DMA_ERROR_HOOK)
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(void)dacp;
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if ((flags & (STM32_DMA_ISR_TEIF | STM32_DMA_ISR_DMEIF)) != 0) {
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/* DMA errors handling.*/
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_dac_isr_error_code(dacp);
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}
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else {
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if ((flags & STM32_DMA_ISR_HTIF) != 0) {
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/* Half transfer processing.*/
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_dac_isr_half_code(dacp);
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}
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if ((flags & STM32_DMA_ISR_TCIF) != 0) {
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/* Transfer complete processing.*/
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_dac_isr_full_code(dacp);
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}
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}
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#else
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(void)dacp;
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(void)flags;
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#endif
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}
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/*===========================================================================*/
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/* Driver interrupt handlers. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver exported functions. */
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/*===========================================================================*/
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/**
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* @brief Low level DAC driver initialization.
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*
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* @notapi
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*/
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void dac_lld_init(void) {
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#if STM32_DAC_USE_CHN1
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dacObjectInit(&DACD1);
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DACD1.dac = DAC1;
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DACD1.tim = STM32_TIM6;
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DACD1.irqprio = STM32_DAC_CHN1_IRQ_PRIORITY;
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DACD1.dma = STM32_DMA_STREAM(STM32_DAC_CHN1_DMA_STREAM);
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DACD1.dmamode = STM32_DMA_CR_CHSEL(DAC_CHN1_DMA_CHANNEL) | \
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STM32_DMA_CR_PL(STM32_DAC_CHN1_DMA_PRIORITY) | \
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STM32_DMA_CR_DIR_M2P | \
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STM32_DMA_CR_DMEIE | \
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STM32_DMA_CR_TEIE | \
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STM32_DMA_CR_MINC | STM32_DMA_CR_TCIE;
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#endif
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#if STM32_DAC_USE_CHN2
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dacObjectInit(&DACD2);
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DACD2.dac = DAC1;
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DACD2.tim = STM32_TIM7;
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DACD2.irqprio = STM32_DAC_CHN2_IRQ_PRIORITY;
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DACD2.dma = STM32_DMA_STREAM(STM32_DAC_CHN2_DMA_STREAM);
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DACD2.dmamode = STM32_DMA_CR_CHSEL(DAC_CHN2_DMA_CHANNEL) | \
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STM32_DMA_CR_PL(STM32_DAC_CHN2_DMA_PRIORITY) | \
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STM32_DMA_CR_DIR_M2P | \
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STM32_DMA_CR_DMEIE | \
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STM32_DMA_CR_TEIE | \
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STM32_DMA_CR_MINC | STM32_DMA_CR_TCIE;
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#endif
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#if STM32_DAC_USE_CHN3
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dacObjectInit(&DACD3);
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DACD3.dac = DAC2;
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DACD3.tim = STM32_TIM18;
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DACD3.irqprio = STM32_DAC_CHN3_IRQ_PRIORITY;
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DACD3.dma = STM32_DMA_STREAM(STM32_DAC_CHN3_DMA_STREAM);
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DACD3.dmamode = STM32_DMA_CR_CHSEL(DAC_CHN3_DMA_CHANNEL) | \
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STM32_DMA_CR_PL(STM32_DAC_CHN2_DMA_PRIORITY) | \
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STM32_DMA_CR_DIR_M2P | \
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STM32_DMA_CR_DMEIE | \
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STM32_DMA_CR_TEIE | \
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STM32_DMA_CR_MINC | STM32_DMA_CR_TCIE;
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#endif
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}
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/**
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* @brief Configures and activates the DAC peripheral.
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*
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* @param[in] dacp pointer to the @p DACDriver object
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*
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* @notapi
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*/
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void dac_lld_start(DACDriver *dacp) {
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uint32_t arr, regshift, trgo, dataoffset;
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bool_t b;
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/* If in stopped state then enables the DAC and DMA clocks.*/
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if (dacp->state == DAC_STOP) {
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#if STM32_DAC_USE_CHN1
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if (&DACD1 == dacp) {
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rccEnableDAC1(FALSE);
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/* DAC1 CR data is at bits 0:15 */
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regshift = 0;
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dataoffset = 0;
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/* Timer setup */
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rccEnableTIM6(FALSE);
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rccResetTIM6();
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trgo = STM32_DAC_CR_TSEL_TIM6;
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}
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#endif
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#if STM32_DAC_USE_CHN2
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if (&DACD2 == dacp) {
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rccEnableDAC1(FALSE);
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/* DAC2 CR data is at bits 16:31 */
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regshift = 16;
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dataoffset = &dacp->dac->DHR12R2 - &dacp->dac->DHR12R1;
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/* Timer setup */
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rccEnableTIM7(FALSE);
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rccResetTIM7();
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trgo = STM32_DAC_CR_TSEL_TIM7;
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}
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#endif
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#if STM32_DAC_USE_CHN3
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if (&DACD3 == dacp) {
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rccEnableDAC2(FALSE);
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/* DAC3 CR data is at bits 0:15 */
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regshift = 0;
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dataoffset = 0;
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/* Timer setup */
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rccEnableTIM18(FALSE);
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rccResetTIM18();
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trgo = STM32_DAC_CR_TSEL_TIM18;
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}
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#endif
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#if STM32_DAC_USE_CHN1 || STM32_DAC_USE_CHN2 || STM32_DAC_USE_CHN3
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dacp->clock = STM32_TIMCLK1;
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arr = (dacp->clock / dacp->config->frequency);
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chDbgAssert((arr <= 0xFFFF),
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"dac_lld_start(), #1", "invalid frequency");
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/* Timer configuration.*/
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dacp->tim->CR1 = 0; /* Initially stopped. */
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dacp->tim->PSC = 0; /* Prescaler value. */
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dacp->tim->DIER = 0;
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dacp->tim->ARR = arr;
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dacp->tim->EGR = TIM_EGR_UG; /* Update event. */
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dacp->tim->CR2 &= (uint16_t)~TIM_CR2_MMS;
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dacp->tim->CR2 |= (uint16_t)TIM_CR2_MMS_1; /* Enable TRGO updates. */
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dacp->tim->CNT = 0; /* Reset counter. */
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dacp->tim->SR = 0; /* Clear pending IRQs. */
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/* Update Event IRQ enabled. */
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/* Timer start.*/
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dacp->tim->CR1 = TIM_CR1_CEN;
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/* DAC configuration */
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dacp->dac->CR |= ( (dacp->dac->CR & ~STM32_DAC_CR_MASK) | \
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(STM32_DAC_CR_EN | STM32_DAC_CR_DMAEN | dacp->config->cr_flags) ) << regshift;
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/* DMA setup. */
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b = dmaStreamAllocate(dacp->dma,
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dacp->irqprio,
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(stm32_dmaisr_t)dac_lld_serve_tx_interrupt,
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(void *)dacp);
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chDbgAssert(!b, "dac_lld_start(), #2", "stream already allocated");
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switch (dacp->config->dhrm) {
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/* Sets the DAC data register */
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case DAC_DHRM_12BIT_RIGHT:
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dmaStreamSetPeripheral(dacp->dma, &dacp->dac->DHR12R1 + dataoffset);
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dacp->dmamode = (dacp->dmamode & ~STM32_DMA_CR_SIZE_MASK) |
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STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD;
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break;
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case DAC_DHRM_12BIT_LEFT:
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dmaStreamSetPeripheral(dacp->dma, &dacp->dac->DHR12L1 + dataoffset);
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dacp->dmamode = (dacp->dmamode & ~STM32_DMA_CR_SIZE_MASK) |
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STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD;
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break;
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case DAC_DHRM_8BIT_RIGHT:
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dmaStreamSetPeripheral(dacp->dma, &dacp->dac->DHR8R1 + dataoffset);
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dacp->dmamode = (dacp->dmamode & ~STM32_DMA_CR_SIZE_MASK) |
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STM32_DMA_CR_PSIZE_BYTE | STM32_DMA_CR_MSIZE_BYTE;
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break;
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#if defined(STM32_HAS_DAC_CHN2) && STM32_HAS_DAC_CHN2
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case DAC_DHRM_12BIT_RIGHT_DUAL:
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dmaStreamSetPeripheral(dacp->dma, &dacp->dac->DHR12RD);
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dacp->dmamode = (dacp->dmamode & ~STM32_DMA_CR_SIZE_MASK) |
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STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD;
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break;
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case DAC_DHRM_12BIT_LEFT_DUAL:
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dmaStreamSetPeripheral(dacp->dma, &dacp->dac->DHR12LD);
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dacp->dmamode = (dacp->dmamode & ~STM32_DMA_CR_SIZE_MASK) |
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STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD;
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break;
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case DAC_DHRM_8BIT_RIGHT_DUAL:
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dmaStreamSetPeripheral(dacp->dma, &dacp->dac->DHR8RD);
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dacp->dmamode = (dacp->dmamode & ~STM32_DMA_CR_SIZE_MASK) |
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STM32_DMA_CR_PSIZE_BYTE | STM32_DMA_CR_MSIZE_BYTE;
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break;
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#endif
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}
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dacp->dac->CR |= trgo << regshift; /* Enable trigger */
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#endif
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}
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}
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/**
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* @brief Deactivates the DAC peripheral.
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*
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* @param[in] dacp pointer to the @p DACDriver object
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*
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* @notapi
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*/
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void dac_lld_stop(DACDriver *dacp) {
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/* If in ready state then disables the DAC clock.*/
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if (dacp->state == DAC_READY) {
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/* DMA disable.*/
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dmaStreamRelease(dacp->dma);
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#if STM32_DAC_USE_CHN1
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if (&DACD1 == dacp) {
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dacp->dac->CR &= ~STM32_DAC_CR_EN; /* DAC1 disable.*/
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}
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#endif
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#if STM32_DAC_USE_CHN2
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if (&DACD2 == dacp) {
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dacp->dac->CR &= ~STM32_DAC_CR_EN << 16; /* DAC1 disable.*/
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}
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#endif
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#if STM32_DAC_USE_CHN3
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if (&DACD3 == dacp) {
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dacp->dac->CR &= ~STM32_DAC_CR_EN; /* DAC2 disable.*/
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rccDisableDAC2(FALSE); /* DAC Clock disable.*/
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}
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#endif
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dacp->tim->CR1 &= ~TIM_CR1_CEN; /* Disable associated timer */
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dacp->state = DAC_STOP;
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if (!(DAC1->CR & (STM32_DAC_CR_EN | STM32_DAC_CR_EN << 16))) {
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/* DAC Clock disable only if all channels are off.*/
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rccDisableDAC1(FALSE);
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}
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}
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}
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/**
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* @brief Sends data over the DAC bus.
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* @details This asynchronous function starts a transmit operation.
|
||||
* @post At the end of the operation the configured callback is invoked.
|
||||
*
|
||||
* @param[in] dacp pointer to the @p DACDriver object
|
||||
* @param[in] n number of words to send
|
||||
* @param[in] txbuf the pointer to the transmit buffer
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void dac_lld_send(DACDriver *dacp) {
|
||||
chDbgAssert(dacp->config->buffer1, "dac_lld_send_doublebuffer(), #1",
|
||||
"First buffer is NULL pointer");
|
||||
dmaStreamSetMemory0(dacp->dma, dacp->config->buffer1);
|
||||
dmaStreamSetTransactionSize(dacp->dma, dacp->config->buffers_size);
|
||||
dmaStreamSetMode(dacp->dma, dacp->dmamode | STM32_DMA_CR_EN);
|
||||
}
|
||||
|
||||
void dac_lld_send_continuous(DACDriver *dacp){
|
||||
chDbgAssert(dacp->config->buffer1, "dac_lld_send_doublebuffer(), #1",
|
||||
"First buffer is NULL pointer");
|
||||
dmaStreamSetMemory0(dacp->dma, dacp->config->buffer1);
|
||||
dmaStreamSetTransactionSize(dacp->dma, dacp->config->buffers_size);
|
||||
dmaStreamSetMode(dacp->dma, dacp->dmamode | STM32_DMA_CR_EN | \
|
||||
STM32_DMA_CR_CIRC);
|
||||
}
|
||||
#if defined(STM32_ADVANCED_DMA) && STM32_ADVANCED_DMA
|
||||
void dac_lld_send_doublebuffer(DACDriver *dacp) {
|
||||
chDbgAssert(dacp->config->buffer1, "dac_lld_send_doublebuffer(), #1",
|
||||
"First buffer is NULL pointer");
|
||||
chDbgAssert(dacp->config->buffer1, "dac_lld_send_doublebuffer(), #2",
|
||||
"Second buffer is NULL pointer");
|
||||
dmaStreamSetMemory0(dacp->dma, dacp->config->buffer1);
|
||||
dmaStreamSetMemory1(dacp->dma, dacp->config->buffer2);
|
||||
dmaStreamSetTransactionSize(dacp->dma, dacp->config->buffers_size);
|
||||
dmaStreamSetMode(dacp->dma, dacp->dmamode | STM32_DMA_CR_EN | \
|
||||
STM32_DMA_CR_DBM);
|
||||
}
|
||||
#else
|
||||
void dac_lld_send_doublebuffer(DACDriver *dacp) {
|
||||
(void)dacp;
|
||||
chDbgAssert(0, "dac_lld_send_doublebuffer(), #1",
|
||||
"This DMA mode is not supported by your hardware.");
|
||||
};
|
||||
#endif
|
||||
|
||||
#endif /* HAL_USE_DAC */
|
||||
|
||||
/** @} */
|
|
@ -0,0 +1,217 @@
|
|||
/*
|
||||
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
|
||||
2011,2012 Giovanni Di Sirio.
|
||||
|
||||
This file is part of ChibiOS/RT.
|
||||
|
||||
ChibiOS/RT is free software; you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
ChibiOS/RT is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file STM32F37x/dac_lld.h
|
||||
* @brief STM32F37x DAC subsystem low level driver header.
|
||||
*
|
||||
* @addtogroup DAC
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef _DAC_LLD_H_
|
||||
#define _DAC_LLD_H_
|
||||
|
||||
#if HAL_USE_DAC || defined(__DOXYGEN__)
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver constants. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver pre-compile time settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @name Configuration options
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief DAC1 driver enable switch.
|
||||
* @details If set to @p TRUE the support for DAC1 is included.
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#if !defined(PLATFORM_DAC_USE_DAC1) || defined(__DOXYGEN__)
|
||||
#define PLATFORM_DAC_USE_DAC1 FALSE
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Derived constants and error checks. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver data structures and types. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief DAC sample data type.
|
||||
*/
|
||||
typedef uint16_t dacsample_t;
|
||||
|
||||
/**
|
||||
* @brief Channels number in a conversion group.
|
||||
*/
|
||||
typedef uint16_t dac_channels_num_t;
|
||||
|
||||
/**
|
||||
* @brief Possible DAC failure causes.
|
||||
* @note Error codes are architecture dependent and should not relied
|
||||
* upon.
|
||||
*/
|
||||
typedef enum {
|
||||
DAC_ERR_DMAFAILURE = 0, /**< DMA operations failure. */
|
||||
DAC_ERR_UNDERRUN = 1 /**< ADC overflow condition. */
|
||||
} dacerror_t;
|
||||
|
||||
/**
|
||||
* @brief Type of a structure representing an DAC driver.
|
||||
*/
|
||||
typedef struct DACDriver DACDriver;
|
||||
|
||||
/**
|
||||
* @brief DAC notification callback type.
|
||||
*
|
||||
* @param[in] dacp pointer to the @p DACDriver object triggering the
|
||||
* callback
|
||||
* @param[in] buffer pointer to the most recent samples data
|
||||
* @param[in] n number of buffer rows available starting from @p buffer
|
||||
*/
|
||||
typedef void (*daccallback_t)(DACDriver *dacp, dacsample_t *buffer, size_t n);
|
||||
|
||||
/**
|
||||
* @brief DAC error callback type.
|
||||
*
|
||||
* @param[in] dacp pointer to the @p DACDriver object triggering the
|
||||
* callback
|
||||
* @param[in] err DAC error code
|
||||
*/
|
||||
typedef void (*dacerrorcallback_t)(DACDriver *dacp, dacerror_t err);
|
||||
|
||||
/**
|
||||
* @brief Conversion group configuration structure.
|
||||
* @details This implementation-dependent structure describes a conversion
|
||||
* operation.
|
||||
* @note Implementations may extend this structure to contain more,
|
||||
* architecture dependent, fields.
|
||||
*/
|
||||
typedef struct {
|
||||
/**
|
||||
* @brief Enables the circular buffer mode for the group.
|
||||
*/
|
||||
bool_t circular;
|
||||
/**
|
||||
* @brief Number of the analog channels belonging to the conversion group.
|
||||
*/
|
||||
dac_channels_num_t num_channels;
|
||||
/**
|
||||
* @brief Callback function associated to the group or @p NULL.
|
||||
*/
|
||||
daccallback_t end_cb;
|
||||
/**
|
||||
* @brief Error callback or @p NULL.
|
||||
*/
|
||||
dacerrorcallback_t error_cb;
|
||||
/* End of the mandatory fields.*/
|
||||
} DACConversionGroup;
|
||||
|
||||
/**
|
||||
* @brief Driver configuration structure.
|
||||
* @note It could be empty on some architectures.
|
||||
*/
|
||||
typedef struct {
|
||||
uint32_t dummy;
|
||||
} DACConfig;
|
||||
|
||||
/**
|
||||
* @brief Structure representing a DAC driver.
|
||||
*/
|
||||
struct DACDriver {
|
||||
/**
|
||||
* @brief Driver state.
|
||||
*/
|
||||
dacstate_t state;
|
||||
/**
|
||||
* @brief Current configuration data.
|
||||
*/
|
||||
const DACConfig *config;
|
||||
/**
|
||||
* @brief Current samples buffer pointer or @p NULL.
|
||||
*/
|
||||
dacsample_t *samples;
|
||||
/**
|
||||
* @brief Current samples buffer depth or @p 0.
|
||||
*/
|
||||
size_t depth;
|
||||
/**
|
||||
* @brief Current conversion group pointer or @p NULL.
|
||||
*/
|
||||
const DACConversionGroup *grpp;
|
||||
#if DAC_USE_WAIT || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief Waiting thread.
|
||||
*/
|
||||
Thread *thread;
|
||||
#endif /* DAC_USE_WAIT */
|
||||
#if DAC_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__)
|
||||
#if CH_USE_MUTEXES || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief Mutex protecting the bus.
|
||||
*/
|
||||
Mutex mutex;
|
||||
#elif CH_USE_SEMAPHORES
|
||||
Semaphore semaphore;
|
||||
#endif
|
||||
#endif /* DAC_USE_MUTUAL_EXCLUSION */
|
||||
#if defined(DAC_DRIVER_EXT_FIELDS)
|
||||
DAC_DRIVER_EXT_FIELDS
|
||||
#endif
|
||||
/* End of the mandatory fields.*/
|
||||
};
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver macros. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* External declarations. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if PLATFORM_DAC_USE_DAC1 && !defined(__DOXYGEN__)
|
||||
extern DACDriver DACD1;
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
void dac_lld_init(void);
|
||||
void dac_lld_start(DACDriver *dacp);
|
||||
void dac_lld_stop(DACDriver *dacp);
|
||||
void dac_lld_send(DACDriver *dacp);
|
||||
void dac_lld_start_conversion(DACDriver *dacp);
|
||||
void dac_lld_stop_conversion(DACDriver *dacp);
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* HAL_USE_DAC */
|
||||
|
||||
#endif /* _DAC_LLD_H_ */
|
||||
|
||||
/** @} */
|
Loading…
Reference in New Issue