Fixed bug #665.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8436 35acf78f-673a-0410-8e92-d51de3d6d3f4
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@ -93,7 +93,7 @@ static void adc_lld_vreg_on(ADCDriver *adcp) {
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#if STM32_ADC_DUAL_MODE
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adcp->adcs->CR = ADC_CR_ADVREGEN_0;
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#endif
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osalSysPolledDelayX(US2RTC(STM32_HCLK, 10));
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osalSysPolledDelayX(OSAL_US2RTC(STM32_HCLK, 10));
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}
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/**
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@ -326,7 +326,11 @@ void adc_lld_init(void) {
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#if STM32_ADC_USE_ADC1
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/* Driver initialization.*/
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adcObjectInit(&ADCD1);
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#if defined(ADC1_2_COMMON)
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ADCD1.adcc = ADC1_2_COMMON;
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#else
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ADCD1.adcc = ADC1_COMMON;
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#endif
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ADCD1.adcm = ADC1;
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#if STM32_ADC_DUAL_MODE
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ADCD1.adcs = ADC2;
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@ -343,7 +347,11 @@ void adc_lld_init(void) {
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#if STM32_ADC_USE_ADC3
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/* Driver initialization.*/
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adcObjectInit(&ADCD3);
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#if defined(ADC3_4_COMMON)
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ADCD3.adcc = ADC3_4_COMMON;
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#else
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ADCD3.adcc = ADC3_COMMON;
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#endif
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ADCD3.adcm = ADC3;
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#if STM32_ADC_DUAL_MODE
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ADCD3.adcs = ADC4;
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@ -171,7 +171,11 @@
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*
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* @api
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*/
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#if defined(RCC_AHBENR_ADC12EN) || defined(__DOXYGEN__)
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#define rccEnableADC12(lp) rccEnableAHB(RCC_AHBENR_ADC12EN, lp)
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#else
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#define rccEnableADC12(lp) rccEnableAHB(RCC_AHBENR_ADC1EN, lp)
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#endif
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/**
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* @brief Disables the ADC1/ADC2 peripheral clock.
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@ -180,14 +184,22 @@
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*
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* @api
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*/
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#if defined(RCC_AHBENR_ADC12EN) || defined(__DOXYGEN__)
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#define rccDisableADC12(lp) rccDisableAHB(RCC_AHBENR_ADC12EN, lp)
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#else
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#define rccDisableADC12(lp) rccDisableAHB(RCC_AHBENR_ADC1EN, lp)
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#endif
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/**
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* @brief Resets the ADC1/ADC2 peripheral.
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*
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* @api
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*/
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#if defined(RCC_AHBRSTR_ADC12RST) || defined(__DOXYGEN__)
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#define rccResetADC12() rccResetAHB(RCC_AHBRSTR_ADC12RST)
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#else
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#define rccResetADC12() rccResetAHB(RCC_AHBRSTR_ADC1RST)
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#endif
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/**
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* @brief Enables the ADC3/ADC4 peripheral clock.
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@ -196,7 +208,11 @@
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*
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* @api
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*/
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#if defined(RCC_AHBENR_ADC34EN) || defined(__DOXYGEN__)
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#define rccEnableADC34(lp) rccEnableAHB(RCC_AHBENR_ADC34EN, lp)
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#else
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#define rccEnableADC34(lp) rccEnableAHB(RCC_AHBENR_ADC3EN, lp)
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#endif
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/**
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* @brief Disables the ADC3/ADC4 peripheral clock.
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@ -205,14 +221,22 @@
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*
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* @api
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*/
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#if defined(RCC_AHBENR_ADC34EN) || defined(__DOXYGEN__)
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#define rccDisableADC34(lp) rccDisableAHB(RCC_AHBENR_ADC34EN, lp)
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#else
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#define rccDisableADC34(lp) rccDisableAHB(RCC_AHBENR_ADC3EN, lp)
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#endif
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/**
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* @brief Resets the ADC3/ADC4 peripheral.
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*
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* @api
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*/
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#if defined(RCC_AHBRSTR_ADC34RST) || defined(__DOXYGEN__)
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#define rccResetADC34() rccResetAHB(RCC_AHBRSTR_ADC34RST)
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#else
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#define rccResetADC34() rccResetAHB(RCC_AHBRSTR_ADC3RST)
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#endif
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/** @} */
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/**
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@ -130,6 +130,8 @@
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- HAL: Updated STM32F0xx headers to STM32CubeF0 version 1.3.0. Added support
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for STM32F030xC, STM32F070x6, STM32F070xB, STM32F091xC,
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STM32F098xx devices.
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- HAL: Fixed differences in STM32F3 ADC macro definitions (bug #665)
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(backported to 3.0.3).
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- HAL: Fixed invalid class type for sdPutWouldBlock() and sdGetWouldBlock()
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functions (bug #659)(backported to 3.0.3 and 2.6.10).
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- HAL: Fixed STM32F0xx HAL missing MCOPRE support (bug #658).
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