STM32: fixed rounding of uart clocks
this gives a closer fit to requested baudrate git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@14765 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
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@ -112,7 +112,7 @@ static void usart_init(SerialDriver *sdp, const SerialConfig *config) {
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uint32_t brr;
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USART_TypeDef *u = sdp->usart;
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brr = (uint32_t)(sdp->clock / config->speed);
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brr = (uint32_t)((sdp->clock + config->speed/2) / config->speed);
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#if defined(USART_CR1_OVER8)
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/* Correcting BRR value when oversampling by 8 instead of 16.
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@ -256,7 +256,7 @@ static void usart_start(UARTDriver *uartp) {
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usart_stop(uartp);
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/* Baud rate setting.*/
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fck = (uint32_t)(uartp->clock / uartp->config->speed);
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fck = (uint32_t)((uartp->clock + uartp->config->speed/2) / uartp->config->speed);
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/* Correcting USARTDIV when oversampling by 8 instead of 16.
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Fraction is still 4 bits wide, but only lower 3 bits used.
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@ -243,14 +243,14 @@ static void usart_init(SerialDriver *sdp,
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(clock <= config->speed * 4096U),
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"invalid baud rate vs input clock");
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brr = (uint32_t)(((uint64_t)clock * 256) / config->speed);
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brr = (uint32_t)(((uint64_t)clock * 256 + config->speed/2) / config->speed);
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osalDbgAssert((brr >= 0x300) && (brr < 0x100000), "invalid BRR value");
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}
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else
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#endif
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{
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brr = (uint32_t)(clock / config->speed);
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brr = (uint32_t)((clock + config->speed/2) / config->speed);
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/* Correcting BRR value when oversampling by 8 instead of 16.
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Fraction is still 4 bits wide, but only lower 3 bits used.
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@ -262,7 +262,7 @@ static void usart_start(UARTDriver *uartp, uint32_t clock) {
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usart_stop(uartp);
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/* Baud rate setting.*/
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fck = (uint32_t)(clock / uartp->config->speed);
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fck = (uint32_t)((clock + uartp->config->speed/2) / uartp->config->speed);
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/* Correcting USARTDIV when oversampling by 8 instead of 16.
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Fraction is still 4 bits wide, but only lower 3 bits used.
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@ -243,14 +243,14 @@ static void usart_init(SerialDriver *sdp,
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(clock <= config->speed * 4096U),
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"invalid baud rate vs input clock");
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brr = (uint32_t)(((uint64_t)clock * 256) / config->speed);
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brr = (uint32_t)(((uint64_t)clock * 256 + config->speed/2) / config->speed);
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osalDbgAssert((brr >= 0x300) && (brr < 0x100000), "invalid BRR value");
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}
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else
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#endif
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{
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brr = (uint32_t)(clock / config->speed);
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brr = (uint32_t)((clock + config->speed/2) / config->speed);
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/* Correcting BRR value when oversampling by 8 instead of 16.
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Fraction is still 4 bits wide, but only lower 3 bits used.
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@ -262,7 +262,7 @@ static void usart_start(UARTDriver *uartp, uint32_t clock) {
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usart_stop(uartp);
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/* Baud rate setting.*/
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fck = (uint32_t)(clock / uartp->config->speed);
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fck = (uint32_t)((clock + uartp->config->speed/2) / uartp->config->speed);
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/* Correcting USARTDIV when oversampling by 8 instead of 16.
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Fraction is still 4 bits wide, but only lower 3 bits used.
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