MP1-related support files
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@14779 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
This commit is contained in:
Giovanni Di Sirio
parent
2d20916325
commit
330701b8d8
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# Required platform files.
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PLATFORMSRC := $(CHIBIOS)/os/hal/ports/common/ARMCMx/nvic.c \
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$(CHIBIOS)/os/hal/ports/STM32/STM32MP1xx/stm32_isr.c \
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$(CHIBIOS)/os/hal/ports/STM32/STM32MP1xx/hal_lld.c
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# Required include directories.
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PLATFORMINC := $(CHIBIOS)/os/hal/ports/common/ARMCMx \
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$(CHIBIOS)/os/hal/ports/STM32/STM32MP1xx
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# Optional platform files.
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ifeq ($(USE_SMART_BUILD),yes)
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# Configuration files directory
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ifeq ($(HALCONFDIR),)
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ifeq ($(CONFDIR),)
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HALCONFDIR = .
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else
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HALCONFDIR := $(CONFDIR)
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endif
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endif
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HALCONF := $(strip $(shell cat $(HALCONFDIR)/halconf.h | egrep -e "\#define"))
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else
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endif
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# Drivers compatible with the platform.
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include $(CHIBIOS)/os/hal/ports/STM32/LLD/GPIOv2/driver.mk
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include $(CHIBIOS)/os/hal/ports/STM32/LLD/TIMv1/driver.mk
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include $(CHIBIOS)/os/hal/ports/STM32/LLD/xWDGv1/driver.mk
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# Shared variables
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ALLCSRC += $(PLATFORMSRC)
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ALLINC += $(PLATFORMINC)
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/*
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ChibiOS - Copyright (C) 2006..2021 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* @file STM32MP1xx/stm32_dmamux.h
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* @brief STM32MP1xx DMAMUX handler header.
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*
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* @addtogroup STM32MP1xx_DMAMUX
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* @{
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*/
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#ifndef STM32_DMAMUX_H
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#define STM32_DMAMUX_H
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/*===========================================================================*/
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/* Driver constants. */
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/*===========================================================================*/
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/**
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* @name DMAMUX1 request sources
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* @{
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*/
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#define STM32_DMAMUX1_REQ_GEN0 1
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#define STM32_DMAMUX1_REQ_GEN1 2
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#define STM32_DMAMUX1_REQ_GEN2 3
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#define STM32_DMAMUX1_REQ_GEN3 4
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#define STM32_DMAMUX1_REQ_GEN4 5
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#define STM32_DMAMUX1_REQ_GEN5 6
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#define STM32_DMAMUX1_REQ_GEN6 7
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#define STM32_DMAMUX1_REQ_GEN7 8
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#define STM32_DMAMUX1_ADC1 9
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#define STM32_DMAMUX1_ADC2 10
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#define STM32_DMAMUX1_TIM1_CH1 11
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#define STM32_DMAMUX1_TIM1_CH2 12
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#define STM32_DMAMUX1_TIM1_CH3 13
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#define STM32_DMAMUX1_TIM1_CH4 14
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#define STM32_DMAMUX1_TIM1_UP 15
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#define STM32_DMAMUX1_TIM1_TRIG 16
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#define STM32_DMAMUX1_TIM1_COM 17
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#define STM32_DMAMUX1_TIM2_CH1 18
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#define STM32_DMAMUX1_TIM2_CH2 19
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#define STM32_DMAMUX1_TIM2_CH3 20
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#define STM32_DMAMUX1_TIM2_CH4 21
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#define STM32_DMAMUX1_TIM2_UP 22
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#define STM32_DMAMUX1_TIM3_CH1 23
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#define STM32_DMAMUX1_TIM3_CH2 24
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#define STM32_DMAMUX1_TIM3_CH3 25
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#define STM32_DMAMUX1_TIM3_CH4 26
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#define STM32_DMAMUX1_TIM3_UP 27
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#define STM32_DMAMUX1_TIM3_TRIG 28
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#define STM32_DMAMUX1_TIM4_CH1 29
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#define STM32_DMAMUX1_TIM4_CH2 30
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#define STM32_DMAMUX1_TIM4_CH3 31
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#define STM32_DMAMUX1_TIM4_UP 32
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#define STM32_DMAMUX1_I2C1_RX 33
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#define STM32_DMAMUX1_I2C1_TX 34
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#define STM32_DMAMUX1_I2C2_RX 35
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#define STM32_DMAMUX1_I2C2_TX 36
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#define STM32_DMAMUX1_SPI1_RX 37
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#define STM32_DMAMUX1_SPI1_TX 38
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#define STM32_DMAMUX1_SPI2_RX 39
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#define STM32_DMAMUX1_SPI2_TX 40
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#define STM32_DMAMUX1_RSVD41 41
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#define STM32_DMAMUX1_RSVD42 42
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#define STM32_DMAMUX1_USART2_RX 43
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#define STM32_DMAMUX1_USART2_TX 44
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#define STM32_DMAMUX1_USART3_RX 45
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#define STM32_DMAMUX1_USART3_TX 46
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#define STM32_DMAMUX1_TIM8_CH1 47
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#define STM32_DMAMUX1_TIM8_CH2 48
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#define STM32_DMAMUX1_TIM8_CH3 49
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#define STM32_DMAMUX1_TIM8_CH4 50
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#define STM32_DMAMUX1_TIM8_UP 51
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#define STM32_DMAMUX1_TIM8_TRIG 52
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#define STM32_DMAMUX1_TIM8_COM 53
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#define STM32_DMAMUX1_RSVD54 54
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#define STM32_DMAMUX1_TIM5_CH1 55
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#define STM32_DMAMUX1_TIM5_CH2 56
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#define STM32_DMAMUX1_TIM5_CH3 57
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#define STM32_DMAMUX1_TIM5_CH4 58
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#define STM32_DMAMUX1_TIM5_UP 59
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#define STM32_DMAMUX1_TIM5_TRIG 60
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#define STM32_DMAMUX1_SPI3_RX 61
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#define STM32_DMAMUX1_SPI3_TX 62
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#define STM32_DMAMUX1_UART4_RX 63
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#define STM32_DMAMUX1_UART4_TX 64
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#define STM32_DMAMUX1_UART5_RX 65
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#define STM32_DMAMUX1_UART5_TX 66
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#define STM32_DMAMUX1_DAC1_CH1 67
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#define STM32_DMAMUX1_DAC1_CH2 68
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#define STM32_DMAMUX1_TIM6_UP 69
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#define STM32_DMAMUX1_TIM7_UP 70
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#define STM32_DMAMUX1_USART6_RX 71
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#define STM32_DMAMUX1_USART6_TX 72
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#define STM32_DMAMUX1_I2C3_RX 73
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#define STM32_DMAMUX1_I2C3_TX 74
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#define STM32_DMAMUX1_DCMI 75
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#define STM32_DMAMUX1_CRYP2_IN 76
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#define STM32_DMAMUX1_CRYP2_OUT 77
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#define STM32_DMAMUX1_HASH2_IN 78
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#define STM32_DMAMUX1_UART7_RX 79
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#define STM32_DMAMUX1_UART7_TX 80
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#define STM32_DMAMUX1_UART8_RX 81
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#define STM32_DMAMUX1_UART8_TX 82
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#define STM32_DMAMUX1_SPI4_RX 83
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#define STM32_DMAMUX1_SPI4_TX 84
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#define STM32_DMAMUX1_SPI5_RX 85
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#define STM32_DMAMUX1_SPI5_TX 86
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#define STM32_DMAMUX1_SAI1_A 87
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#define STM32_DMAMUX1_SAI1_B 88
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#define STM32_DMAMUX1_SAI2_A 89
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#define STM32_DMAMUX1_SAI2_B 90
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#define STM32_DMAMUX1_DFSDM1_FLT4 91
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#define STM32_DMAMUX1_DFSDM1_FLT5 92
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#define STM32_DMAMUX1_SPDIFRX_DT 93
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#define STM32_DMAMUX1_SPDIFRX_CS 94
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#define STM32_DMAMUX1_RSVD95 95
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#define STM32_DMAMUX1_RSVD96 96
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#define STM32_DMAMUX1_RSVD97 97
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#define STM32_DMAMUX1_RSVD98 98
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#define STM32_DMAMUX1_SAI4_A 99
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#define STM32_DMAMUX1_SAI4_B 100
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#define STM32_DMAMUX1_DFSDM1_FLT0 101
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#define STM32_DMAMUX1_DFSDM1_FLT1 102
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#define STM32_DMAMUX1_DFSDM1_FLT2 103
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#define STM32_DMAMUX1_DFSDM1_FLT3 104
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#define STM32_DMAMUX1_TIM15_CH1 105
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#define STM32_DMAMUX1_TIM15_UP 106
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#define STM32_DMAMUX1_TIM15_TRIG 107
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#define STM32_DMAMUX1_TIM15_COM 108
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#define STM32_DMAMUX1_TIM16_CH1 109
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#define STM32_DMAMUX1_TIM16_UP 110
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#define STM32_DMAMUX1_TIM17_CH1 111
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#define STM32_DMAMUX1_TIM17_UP 112
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#define STM32_DMAMUX1_SAI3_A 113
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#define STM32_DMAMUX1_SAI3_B 114
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#define STM32_DMAMUX1_I2C5_RX 115
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#define STM32_DMAMUX1_I2C5_TX 116
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#define STM32_DMAMUX1_RSVD117 117
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#define STM32_DMAMUX1_RSVD118 118
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#define STM32_DMAMUX1_RSVD119 119
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#define STM32_DMAMUX1_RSVD120 120
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#define STM32_DMAMUX1_RSVD121 121
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#define STM32_DMAMUX1_RSVD122 122
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#define STM32_DMAMUX1_RSVD123 123
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#define STM32_DMAMUX1_RSVD124 124
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#define STM32_DMAMUX1_RSVD125 125
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#define STM32_DMAMUX1_RSVD126 126
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#define STM32_DMAMUX1_RSVD127 127
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/** @} */
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/*===========================================================================*/
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/* Driver pre-compile time settings. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Derived constants and error checks. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver data structures and types. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver macros. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* External declarations. */
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/*===========================================================================*/
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifdef __cplusplus
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}
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#endif
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#endif /* STM32_DMAMUX_H */
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/** @} */
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@ -0,0 +1,219 @@
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/*
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ChibiOS - Copyright (C) 2006..2021 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* @file STM32MP1xx/stm32_registry.h
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* @brief STM32MP1xx capabilities registry.
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*
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* @addtogroup HAL
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* @{
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*/
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#ifndef STM32_REGISTRY_H
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#define STM32_REGISTRY_H
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/*===========================================================================*/
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/* Platform capabilities. */
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/*===========================================================================*/
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/**
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* @name STM32MP1xx capabilities
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* @{
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*/
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/*===========================================================================*/
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/* Common. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* STM32MP157Axx, STM32MP157Cxx, STM32MP157Dxx, STM32MP157Fxx. */
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/* STM32MP153Axx, STM32MP153Cxx, STM32MP153Dxx, STM32MP153Fxx. */
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/* STM32MP151Axx, STM32MP151Cxx, STM32MP151Dxx, STM32MP151Fxx. */
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/*===========================================================================*/
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#if defined(STM32MP157Axx) || defined(STM32MP157Cxx) || \
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defined(STM32MP157Dxx) || defined(STM32MP157Fxx) || \
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defined(STM32MP153Axx) || defined(STM32MP153Cxx) || \
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defined(STM32MP153Dxx) || defined(STM32MP153Fxx) || \
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defined(STM32MP151Axx) || defined(STM32MP151Cxx) || \
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defined(STM32MP151Dxx) || defined(STM32MP151Fxx) || \
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defined(__DOXYGEN__)
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/* ADC attributes.*/
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/* CAN attributes.*/
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/* DAC attributes.*/
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#define STM32_HAS_DAC1_CH1 TRUE
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#define STM32_HAS_DAC1_CH2 TRUE
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#define STM32_HAS_DAC2_CH1 FALSE
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#define STM32_HAS_DAC2_CH2 FALSE
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#define STM32_HAS_DAC3_CH1 FALSE
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#define STM32_HAS_DAC3_CH2 FALSE
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#define STM32_HAS_DAC4_CH1 FALSE
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#define STM32_HAS_DAC4_CH2 FALSE
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/* DMA attributes.*/
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#define STM32_ADVANCED_DMA TRUE
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#define STM32_DMA_SUPPORTS_DMAMUX TRUE
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#define STM32_DMA_SUPPORTS_CSELR FALSE
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#define STM32_DMA1_NUM_CHANNELS 8
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#define STM32_DMA2_NUM_CHANNELS 8
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/* ETH attributes.*/
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/* EXTI attributes.*/
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/* Flash attributes.*/
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/* GPIO attributes.*/
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#define STM32_HAS_GPIOA TRUE
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#define STM32_HAS_GPIOB TRUE
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#define STM32_HAS_GPIOC TRUE
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#define STM32_HAS_GPIOD TRUE
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#define STM32_HAS_GPIOE TRUE
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#define STM32_HAS_GPIOF TRUE
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#define STM32_HAS_GPIOG TRUE
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#define STM32_HAS_GPIOH TRUE
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#define STM32_HAS_GPIOI TRUE
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#define STM32_HAS_GPIOJ TRUE
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#define STM32_HAS_GPIOK TRUE
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#define STM32_HAS_GPIOZ TRUE
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#define STM32_GPIO_EN_MASK (RCC_AHB4ENR_GPIOAEN | \
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RCC_AHB4ENR_GPIOBEN | \
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RCC_AHB4ENR_GPIOCEN | \
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RCC_AHB4ENR_GPIODEN | \
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RCC_AHB4ENR_GPIOEEN | \
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RCC_AHB4ENR_GPIOFEN | \
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RCC_AHB4ENR_GPIOGEN | \
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RCC_AHB4ENR_GPIOHEN | \
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RCC_AHB4ENR_GPIOIEN | \
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RCC_AHB4ENR_GPIOJEN | \
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RCC_AHB4ENR_GPIOKEN)
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/* I2C attributes.*/
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/* OCTOSPI attributes.*/
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/* SDMMC attributes.*/
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/* SPI attributes.*/
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/* TIM attributes.*/
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#define STM32_TIM_MAX_CHANNELS 6
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#define STM32_HAS_TIM1 TRUE
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#define STM32_TIM1_IS_32BITS FALSE
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#define STM32_TIM1_CHANNELS 6
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#define STM32_HAS_TIM2 TRUE
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#define STM32_TIM2_IS_32BITS TRUE
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#define STM32_TIM2_CHANNELS 4
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#define STM32_HAS_TIM3 TRUE
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#define STM32_TIM3_IS_32BITS FALSE
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#define STM32_TIM3_CHANNELS 4
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#define STM32_HAS_TIM4 TRUE
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#define STM32_TIM4_IS_32BITS FALSE
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#define STM32_TIM4_CHANNELS 4
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#define STM32_HAS_TIM5 TRUE
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#define STM32_TIM5_IS_32BITS TRUE
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#define STM32_TIM5_CHANNELS 4
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#define STM32_HAS_TIM6 TRUE
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#define STM32_TIM6_IS_32BITS FALSE
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#define STM32_TIM6_CHANNELS 0
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#define STM32_HAS_TIM7 TRUE
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#define STM32_TIM7_IS_32BITS FALSE
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#define STM32_TIM7_CHANNELS 0
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#define STM32_HAS_TIM8 TRUE
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#define STM32_TIM8_IS_32BITS FALSE
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#define STM32_TIM8_CHANNELS 6
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#define STM32_HAS_TIM12 TRUE
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#define STM32_TIM12_IS_32BITS FALSE
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#define STM32_TIM12_CHANNELS 2
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#define STM32_HAS_TIM13 TRUE
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#define STM32_TIM13_IS_32BITS FALSE
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#define STM32_TIM13_CHANNELS 1
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#define STM32_HAS_TIM14 TRUE
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#define STM32_TIM14_IS_32BITS FALSE
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#define STM32_TIM14_CHANNELS 1
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#define STM32_HAS_TIM15 TRUE
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#define STM32_TIM15_IS_32BITS FALSE
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#define STM32_TIM15_CHANNELS 2
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#define STM32_HAS_TIM16 TRUE
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#define STM32_TIM16_IS_32BITS FALSE
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#define STM32_TIM16_CHANNELS 1
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#define STM32_HAS_TIM17 TRUE
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#define STM32_TIM17_IS_32BITS FALSE
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#define STM32_TIM17_CHANNELS 1
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#define STM32_HAS_TIM20 TRUE
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#define STM32_TIM20_IS_32BITS FALSE
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#define STM32_TIM20_CHANNELS 6
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#define STM32_HAS_TIM9 FALSE
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#define STM32_HAS_TIM10 FALSE
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#define STM32_HAS_TIM11 FALSE
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#define STM32_HAS_TIM18 FALSE
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#define STM32_HAS_TIM19 FALSE
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#define STM32_HAS_TIM20 FALSE
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#define STM32_HAS_TIM21 FALSE
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#define STM32_HAS_TIM22 FALSE
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/* USART attributes.*/
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#define STM32_HAS_USART1 FALSE
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#define STM32_HAS_USART2 TRUE
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#define STM32_HAS_USART3 TRUE
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#define STM32_HAS_UART4 TRUE
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#define STM32_HAS_UART5 TRUE
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#define STM32_HAS_LPUART1 TRUE
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#define STM32_HAS_USART6 TRUE
|
||||
#define STM32_HAS_UART7 TRUE
|
||||
#define STM32_HAS_UART8 TRUE
|
||||
|
||||
/* OTG/USB attributes.*/
|
||||
#define STM32_HAS_OTG1 FALSE
|
||||
#define STM32_HAS_OTG2 FALSE
|
||||
|
||||
#define STM32_HAS_USB FALSE
|
||||
|
||||
/* IWDG attributes.*/
|
||||
#define STM32_HAS_IWDG TRUE
|
||||
#define STM32_IWDG_IS_WINDOWED TRUE
|
||||
|
||||
#endif /* defined(STM32MP157Axx) || defined(STM32MP157Cxx) ||
|
||||
defined(STM32MP157Dxx) || defined(STM32MP157Fxx) ||
|
||||
defined(STM32MP153Axx) || defined(STM32MP153Cxx) ||
|
||||
defined(STM32MP153Dxx) || defined(STM32MP153Fxx) ||
|
||||
defined(STM32MP151Axx) || defined(STM32MP151Cxx) ||
|
||||
defined(STM32MP151Dxx) || defined(STM32MP151Fxx) */
|
||||
|
||||
/** @} */
|
||||
|
||||
#endif /* STM32_REGISTRY_H */
|
||||
|
||||
/** @} */
|
||||
Loading…
Reference in New Issue