Fixed a regression. Updated readme.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@15008 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
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@ -1,8 +1,12 @@
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ifeq ($(USE_SMART_BUILD),yes)
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ifneq ($(findstring HAL_USE_I2S TRUE,$(HALCONF)),)
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PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/SPIv1/hal_i2s_lld.c
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endif
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ifneq ($(findstring HAL_USE_SPI TRUE,$(HALCONF)),)
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PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/SPIv1/hal_spi_v2_lld.c
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endif
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else
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PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/SPIv1/hal_i2s_lld.c
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PLATFORMSRC += $(CHIBIOS)/os/hal/ports/STM32/LLD/SPIv1/hal_spi_v2_lld.c
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endif
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@ -78,8 +78,8 @@
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- NEW: Integrated FatFS with lwIP HTTPD, now it is possible to serve files
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using HTTP from a storage device.
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- NEW: Updated FatFS to version 0.14b.
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- NEW: SPIv2 driver has been implemented on: STM32F0, STM32F3, STM32F7,
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STM32G0, STM32G4, STM32L4, STM32L4+, STM32H7.
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- NEW: SPIv2 driver has been implemented on: STM32F0, STM32F3, STM32F4,
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STM32F7, STM32G0, STM32G4, STM32L4, STM32L4+, STM32H7.
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- NEW: New SPIv2 driver model, it is compatible with the previous SPI driver
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and introduces: better runtime errors handling, slave mode,
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data synchronization function, various other improvements.
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@ -35,41 +35,48 @@
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/*===========================================================================*/
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void spi_circular_cb(SPIDriver *spip);
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void spi_error_cb(SPIDriver *spip);
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/*
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* Circular SPI configuration (21MHz, CPHA=0, CPOL=0, MSb first).
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*/
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const SPIConfig c_spicfg = {
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true,
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spi_circular_cb,
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GPIOB,
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12,
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0,
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0
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.circular = true,
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.slave = false,
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.data_cb = spi_circular_cb,
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.error_cb = spi_error_cb,
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.ssport = GPIOB,
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.sspad = 12U,
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.cr1 = 0U,
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.cr2 = 0U
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};
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/*
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* Maximum speed SPI configuration (21MHz, CPHA=0, CPOL=0, MSb first).
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*/
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const SPIConfig hs_spicfg = {
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false,
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NULL,
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GPIOB,
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12,
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0,
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0
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.circular = false,
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.slave = false,
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.data_cb = NULL,
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.error_cb = spi_error_cb,
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.ssport = GPIOB,
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.sspad = 12U,
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.cr1 = 0U,
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.cr2 = 0U
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};
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/*
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* Low speed SPI configuration (328.125kHz, CPHA=0, CPOL=0, MSb first).
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*/
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const SPIConfig ls_spicfg = {
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false,
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NULL,
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GPIOB,
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12,
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SPI_CR1_BR_2 | SPI_CR1_BR_1,
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0
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.circular = false,
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.slave = false,
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.data_cb = NULL,
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.error_cb = spi_error_cb,
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.ssport = GPIOB,
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.sspad = 12U,
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.cr1 = SPI_CR1_BR_2 | SPI_CR1_BR_1,
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.cr2 = 0U
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};
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/*===========================================================================*/
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