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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/kernel_3_dev@6191 35acf78f-673a-0410-8e92-d51de3d6d3f4

This commit is contained in:
gdisirio 2013-08-20 14:49:49 +00:00
parent 8d0dc4bfd6
commit 371ef2afb5
22 changed files with 127 additions and 109 deletions
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1
os/hal/platforms/STM32F0xx/adc_lld.c
View File

@ -22,7 +22,6 @@
* @{ * @{
*/ */
#include "ch.h"
#include "hal.h" #include "hal.h"
#if HAL_USE_ADC || defined(__DOXYGEN__) #if HAL_USE_ADC || defined(__DOXYGEN__)

46
os/hal/platforms/STM32F0xx/ext_lld_isr.c
View File

@ -22,7 +22,6 @@
* @{ * @{
*/ */
#include "ch.h"
#include "hal.h" #include "hal.h"
#if HAL_USE_EXT || defined(__DOXYGEN__) #if HAL_USE_EXT || defined(__DOXYGEN__)
@ -54,10 +53,10 @@
* *
* @isr * @isr
*/ */
CH_IRQ_HANDLER(Vector54) { OSAL_IRQ_HANDLER(Vector54) {
uint32_t pr; uint32_t pr;
CH_IRQ_PROLOGUE(); OSAL_IRQ_PROLOGUE();
pr = EXTI->PR & ((1 << 0) | (1 << 1)); pr = EXTI->PR & ((1 << 0) | (1 << 1));
EXTI->PR = pr; EXTI->PR = pr;
@ -66,7 +65,7 @@ CH_IRQ_HANDLER(Vector54) {
if (pr & (1 << 1)) if (pr & (1 << 1))
EXTD1.config->channels[1].cb(&EXTD1, 1); EXTD1.config->channels[1].cb(&EXTD1, 1);
CH_IRQ_EPILOGUE(); OSAL_IRQ_EPILOGUE();
} }
/** /**
@ -74,10 +73,10 @@ CH_IRQ_HANDLER(Vector54) {
* *
* @isr * @isr
*/ */
CH_IRQ_HANDLER(Vector58) { OSAL_IRQ_HANDLER(Vector58) {
uint32_t pr; uint32_t pr;
CH_IRQ_PROLOGUE(); OSAL_IRQ_PROLOGUE();
pr = EXTI->PR & ((1 << 2) | (1 << 3)); pr = EXTI->PR & ((1 << 2) | (1 << 3));
EXTI->PR = pr; EXTI->PR = pr;
@ -86,7 +85,7 @@ CH_IRQ_HANDLER(Vector58) {
if (pr & (1 << 3)) if (pr & (1 << 3))
EXTD1.config->channels[3].cb(&EXTD1, 3); EXTD1.config->channels[3].cb(&EXTD1, 3);
CH_IRQ_EPILOGUE(); OSAL_IRQ_EPILOGUE();
} }
/** /**
@ -94,10 +93,10 @@ CH_IRQ_HANDLER(Vector58) {
* *
* @isr * @isr
*/ */
CH_IRQ_HANDLER(Vector5C) { OSAL_IRQ_HANDLER(Vector5C) {
uint32_t pr; uint32_t pr;
CH_IRQ_PROLOGUE(); OSAL_IRQ_PROLOGUE();
pr = EXTI->PR & ((1 << 4) | (1 << 5) | (1 << 6) | (1 << 7) | (1 << 8) | pr = EXTI->PR & ((1 << 4) | (1 << 5) | (1 << 6) | (1 << 7) | (1 << 8) |
(1 << 9) | (1 << 10) | (1 << 11) | (1 << 12) | (1 << 13) | (1 << 9) | (1 << 10) | (1 << 11) | (1 << 12) | (1 << 13) |
@ -128,7 +127,7 @@ CH_IRQ_HANDLER(Vector5C) {
if (pr & (1 << 15)) if (pr & (1 << 15))
EXTD1.config->channels[15].cb(&EXTD1, 15); EXTD1.config->channels[15].cb(&EXTD1, 15);
CH_IRQ_EPILOGUE(); OSAL_IRQ_EPILOGUE();
} }
/** /**
@ -136,14 +135,14 @@ CH_IRQ_HANDLER(Vector5C) {
* *
* @isr * @isr
*/ */
CH_IRQ_HANDLER(Vector44) { OSAL_IRQ_HANDLER(Vector44) {
CH_IRQ_PROLOGUE(); OSAL_IRQ_PROLOGUE();
EXTI->PR = (1 << 16); EXTI->PR = (1 << 16);
EXTD1.config->channels[16].cb(&EXTD1, 16); EXTD1.config->channels[16].cb(&EXTD1, 16);
CH_IRQ_EPILOGUE(); OSAL_IRQ_EPILOGUE();
} }
/** /**
@ -151,14 +150,14 @@ CH_IRQ_HANDLER(Vector44) {
* *
* @isr * @isr
*/ */
CH_IRQ_HANDLER(Vector48) { OSAL_IRQ_HANDLER(Vector48) {
CH_IRQ_PROLOGUE(); OSAL_IRQ_PROLOGUE();
EXTI->PR = (1 << 17); EXTI->PR = (1 << 17);
EXTD1.config->channels[17].cb(&EXTD1, 17); EXTD1.config->channels[17].cb(&EXTD1, 17);
CH_IRQ_EPILOGUE(); OSAL_IRQ_EPILOGUE();
} }
/*===========================================================================*/ /*===========================================================================*/
@ -172,16 +171,11 @@ CH_IRQ_HANDLER(Vector48) {
*/ */
void ext_lld_exti_irq_enable(void) { void ext_lld_exti_irq_enable(void) {
nvicEnableVector(EXTI0_1_IRQn, nvicEnableVector(EXTI0_1_IRQn, STM32_EXT_EXTI0_1_IRQ_PRIORITY);
CORTEX_PRIORITY_MASK(STM32_EXT_EXTI0_1_IRQ_PRIORITY)); nvicEnableVector(EXTI2_3_IRQn, STM32_EXT_EXTI2_3_IRQ_PRIORITY);
nvicEnableVector(EXTI2_3_IRQn, nvicEnableVector(EXTI4_15_IRQn, STM32_EXT_EXTI4_15_IRQ_PRIORITY);
CORTEX_PRIORITY_MASK(STM32_EXT_EXTI2_3_IRQ_PRIORITY)); nvicEnableVector(PVD_IRQn, STM32_EXT_EXTI16_IRQ_PRIORITY);
nvicEnableVector(EXTI4_15_IRQn, nvicEnableVector(RTC_IRQn, STM32_EXT_EXTI17_IRQ_PRIORITY);
CORTEX_PRIORITY_MASK(STM32_EXT_EXTI4_15_IRQ_PRIORITY));
nvicEnableVector(PVD_IRQn,
CORTEX_PRIORITY_MASK(STM32_EXT_EXTI16_IRQ_PRIORITY));
nvicEnableVector(RTC_IRQn,
CORTEX_PRIORITY_MASK(STM32_EXT_EXTI17_IRQ_PRIORITY));
} }
/** /**

34
os/hal/platforms/STM32F0xx/stm32_registry.h
View File

@ -100,11 +100,39 @@
/* TIM attributes.*/ /* TIM attributes.*/
#define STM32_HAS_TIM1 TRUE #define STM32_HAS_TIM1 TRUE
#define STM32_TIM1_IS_32BITS FALSE
#define STM32_TIM1_CHANNELS 4
#define STM32_HAS_TIM2 TRUE #define STM32_HAS_TIM2 TRUE
#define STM32_TIM2_IS_32BITS TRUE
#define STM32_TIM2_CHANNELS 4
#define STM32_HAS_TIM3 TRUE #define STM32_HAS_TIM3 TRUE
#define STM32_TIM3_IS_32BITS FALSE
#define STM32_TIM3_CHANNELS 4
#define STM32_HAS_TIM6 TRUE
#define STM32_TIM6_IS_32BITS FALSE
#define STM32_TIM6_CHANNELS 0
#define STM32_HAS_TIM14 TRUE
#define STM32_TIM14_IS_32BITS FALSE
#define STM32_TIM14_CHANNELS 1
#define STM32_HAS_TIM15 TRUE
#define STM32_TIM15_IS_32BITS FALSE
#define STM32_TIM15_CHANNELS 2
#define STM32_HAS_TIM16 TRUE
#define STM32_TIM16_IS_32BITS FALSE
#define STM32_TIM16_CHANNELS 2
#define STM32_HAS_TIM17 TRUE
#define STM32_TIM17_IS_32BITS FALSE
#define STM32_TIM17_CHANNELS 2
#define STM32_HAS_TIM4 FALSE #define STM32_HAS_TIM4 FALSE
#define STM32_HAS_TIM5 FALSE #define STM32_HAS_TIM5 FALSE
#define STM32_HAS_TIM6 TRUE
#define STM32_HAS_TIM7 FALSE #define STM32_HAS_TIM7 FALSE
#define STM32_HAS_TIM8 FALSE #define STM32_HAS_TIM8 FALSE
#define STM32_HAS_TIM9 FALSE #define STM32_HAS_TIM9 FALSE
@ -112,10 +140,6 @@
#define STM32_HAS_TIM11 FALSE #define STM32_HAS_TIM11 FALSE
#define STM32_HAS_TIM12 FALSE #define STM32_HAS_TIM12 FALSE
#define STM32_HAS_TIM13 FALSE #define STM32_HAS_TIM13 FALSE
#define STM32_HAS_TIM14 TRUE
#define STM32_HAS_TIM15 TRUE
#define STM32_HAS_TIM16 TRUE
#define STM32_HAS_TIM17 TRUE
#define STM32_HAS_TIM18 FALSE #define STM32_HAS_TIM18 FALSE
#define STM32_HAS_TIM19 FALSE #define STM32_HAS_TIM19 FALSE

4
os/rt/ports/ARMCMx/chcore_v6m.h
View File

@ -281,6 +281,10 @@ struct context {
} }
#endif #endif
#if CH_CFG_TIMEDELTA > 0
#include "systick.h"
#endif
/*===========================================================================*/ /*===========================================================================*/
/* External declarations. */ /* External declarations. */
/*===========================================================================*/ /*===========================================================================*/

4
testhal/STM32F0xx/ADC/chconf.h
View File

@ -41,7 +41,7 @@
* setting also defines the system tick time unit. * setting also defines the system tick time unit.
*/ */
#if !defined(CH_CFG_ST_FREQUENCY) || defined(__DOXYGEN__) #if !defined(CH_CFG_ST_FREQUENCY) || defined(__DOXYGEN__)
#define CH_CFG_ST_FREQUENCY 1000 #define CH_CFG_ST_FREQUENCY 10000
#endif #endif
/** /**
@ -62,7 +62,7 @@
* this value. * this value.
*/ */
#if !defined(CH_CFG_TIMEDELTA) || defined(__DOXYGEN__) #if !defined(CH_CFG_TIMEDELTA) || defined(__DOXYGEN__)
#define CH_CFG_TIMEDELTA 0 #define CH_CFG_TIMEDELTA 2
#endif #endif
/** /**

2
testhal/STM32F0xx/EXT/.project
View File

@ -27,7 +27,7 @@
<link> <link>
<name>board</name> <name>board</name>
<type>2</type> <type>2</type>
<locationURI>CHIBIOS/boards/ST_STM32F0_DISCOVERY</locationURI> <locationURI>CHIBIOS/os/hal/boards/ST_STM32F0_DISCOVERY</locationURI>
</link> </link>
<link> <link>
<name>os</name> <name>os</name>

6
testhal/STM32F0xx/EXT/chconf.h
View File

@ -41,7 +41,7 @@
* setting also defines the system tick time unit. * setting also defines the system tick time unit.
*/ */
#if !defined(CH_CFG_ST_FREQUENCY) || defined(__DOXYGEN__) #if !defined(CH_CFG_ST_FREQUENCY) || defined(__DOXYGEN__)
#define CH_CFG_ST_FREQUENCY 1000 #define CH_CFG_ST_FREQUENCY 10000
#endif #endif
/** /**
@ -62,7 +62,7 @@
* this value. * this value.
*/ */
#if !defined(CH_CFG_TIMEDELTA) || defined(__DOXYGEN__) #if !defined(CH_CFG_TIMEDELTA) || defined(__DOXYGEN__)
#define CH_CFG_TIMEDELTA 0 #define CH_CFG_TIMEDELTA 2
#endif #endif
/** /**
@ -357,7 +357,7 @@
* @note The default is @p FALSE. * @note The default is @p FALSE.
*/ */
#if !defined(CH_DBG_STATISTICS) || defined(__DOXYGEN__) #if !defined(CH_DBG_STATISTICS) || defined(__DOXYGEN__)
#define CH_DBG_STATISTICS TRUE #define CH_DBG_STATISTICS FALSE
#endif #endif
/** /**

9
testhal/STM32F0xx/EXT/main.c
View File

@ -25,17 +25,16 @@ static void led4off(void *arg) {
/* Triggered when the button is pressed or released. The LED4 is set to ON.*/ /* Triggered when the button is pressed or released. The LED4 is set to ON.*/
static void extcb1(EXTDriver *extp, expchannel_t channel) { static void extcb1(EXTDriver *extp, expchannel_t channel) {
static VirtualTimer vt4; static virtual_timer_t vt4;
(void)extp; (void)extp;
(void)channel; (void)channel;
palSetPad(GPIOC, GPIOC_LED4); palSetPad(GPIOC, GPIOC_LED4);
chSysLockFromIsr(); chSysLockFromISR();
if (chVTIsArmedI(&vt4)) chVTResetI(&vt4);
chVTResetI(&vt4);
/* LED4 set to OFF after 200mS.*/ /* LED4 set to OFF after 200mS.*/
chVTSetI(&vt4, MS2ST(200), led4off, NULL); chVTSetI(&vt4, MS2ST(200), led4off, NULL);
chSysUnlockFromIsr(); chSysUnlockFromISR();
} }
static const EXTConfig extcfg = { static const EXTConfig extcfg = {

2
testhal/STM32F0xx/IRQ_STORM/.project
View File

@ -27,7 +27,7 @@
<link> <link>
<name>board</name> <name>board</name>
<type>2</type> <type>2</type>
<locationURI>CHIBIOS/boards/ST_STM32F0_DISCOVERY</locationURI> <locationURI>CHIBIOS/os/hal/boards/ST_STM32F0_DISCOVERY</locationURI>
</link> </link>
<link> <link>
<name>os</name> <name>os</name>

20
testhal/STM32F0xx/IRQ_STORM/chconf.h
View File

@ -41,7 +41,7 @@
* setting also defines the system tick time unit. * setting also defines the system tick time unit.
*/ */
#if !defined(CH_CFG_ST_FREQUENCY) || defined(__DOXYGEN__) #if !defined(CH_CFG_ST_FREQUENCY) || defined(__DOXYGEN__)
#define CH_CFG_ST_FREQUENCY 1000 #define CH_CFG_ST_FREQUENCY 10000
#endif #endif
/** /**
@ -62,7 +62,7 @@
* this value. * this value.
*/ */
#if !defined(CH_CFG_TIMEDELTA) || defined(__DOXYGEN__) #if !defined(CH_CFG_TIMEDELTA) || defined(__DOXYGEN__)
#define CH_CFG_TIMEDELTA 0 #define CH_CFG_TIMEDELTA 2
#endif #endif
/** /**
@ -357,7 +357,7 @@
* @note The default is @p FALSE. * @note The default is @p FALSE.
*/ */
#if !defined(CH_DBG_STATISTICS) || defined(__DOXYGEN__) #if !defined(CH_DBG_STATISTICS) || defined(__DOXYGEN__)
#define CH_DBG_STATISTICS TRUE #define CH_DBG_STATISTICS FALSE
#endif #endif
/** /**
@ -368,7 +368,7 @@
* @note The default is @p FALSE. * @note The default is @p FALSE.
*/ */
#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) #if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__)
#define CH_DBG_SYSTEM_STATE_CHECK TRUE #define CH_DBG_SYSTEM_STATE_CHECK FALSE
#endif #endif
/** /**
@ -379,7 +379,7 @@
* @note The default is @p FALSE. * @note The default is @p FALSE.
*/ */
#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) #if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__)
#define CH_DBG_ENABLE_CHECKS TRUE #define CH_DBG_ENABLE_CHECKS FALSE
#endif #endif
/** /**
@ -391,7 +391,7 @@
* @note The default is @p FALSE. * @note The default is @p FALSE.
*/ */
#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) #if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__)
#define CH_DBG_ENABLE_ASSERTS TRUE #define CH_DBG_ENABLE_ASSERTS FALSE
#endif #endif
/** /**
@ -402,7 +402,7 @@
* @note The default is @p FALSE. * @note The default is @p FALSE.
*/ */
#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) #if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__)
#define CH_DBG_ENABLE_TRACE TRUE #define CH_DBG_ENABLE_TRACE FALSE
#endif #endif
/** /**
@ -416,7 +416,7 @@
* @p panic_msg variable set to @p NULL. * @p panic_msg variable set to @p NULL.
*/ */
#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) #if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__)
#define CH_DBG_ENABLE_STACK_CHECK TRUE #define CH_DBG_ENABLE_STACK_CHECK FALSE
#endif #endif
/** /**
@ -428,7 +428,7 @@
* @note The default is @p FALSE. * @note The default is @p FALSE.
*/ */
#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) #if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__)
#define CH_DBG_FILL_THREADS TRUE #define CH_DBG_FILL_THREADS FALSE
#endif #endif
/** /**
@ -441,7 +441,7 @@
* tickless mode. * tickless mode.
*/ */
#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) #if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__)
#define CH_DBG_THREADS_PROFILING TRUE #define CH_DBG_THREADS_PROFILING FALSE
#endif #endif
/** @} */ /** @} */

26
testhal/STM32F0xx/IRQ_STORM/main.c
View File

@ -51,7 +51,7 @@ static bool_t saturated;
/* /*
* Mailboxes and buffers. * Mailboxes and buffers.
*/ */
static Mailbox mb[NUM_THREADS]; static mailbox_t mb[NUM_THREADS];
static msg_t b[NUM_THREADS][MAILBOX_SIZE]; static msg_t b[NUM_THREADS][MAILBOX_SIZE];
/* /*
@ -101,7 +101,7 @@ static msg_t WorkerThread(void *arg) {
/* If this thread is not at the end of a chain re-sending the message, /* If this thread is not at the end of a chain re-sending the message,
note this check works because the variable target is unsigned.*/ note this check works because the variable target is unsigned.*/
msg = chMBPost(&mb[target], msg, TIME_IMMEDIATE); msg = chMBPost(&mb[target], msg, TIME_IMMEDIATE);
if (msg != RDY_OK) if (msg != MSG_OK)
saturated = TRUE; saturated = TRUE;
} }
else { else {
@ -121,11 +121,11 @@ static void gpt2cb(GPTDriver *gptp) {
msg_t msg; msg_t msg;
(void)gptp; (void)gptp;
chSysLockFromIsr(); chSysLockFromISR();
msg = chMBPostI(&mb[0], MSG_SEND_RIGHT); msg = chMBPostI(&mb[0], MSG_SEND_RIGHT);
if (msg != RDY_OK) if (msg != MSG_OK)
saturated = TRUE; saturated = TRUE;
chSysUnlockFromIsr(); chSysUnlockFromISR();
} }
/* /*
@ -135,11 +135,11 @@ static void gpt3cb(GPTDriver *gptp) {
msg_t msg; msg_t msg;
(void)gptp; (void)gptp;
chSysLockFromIsr(); chSysLockFromISR();
msg = chMBPostI(&mb[NUM_THREADS - 1], MSG_SEND_LEFT); msg = chMBPostI(&mb[NUM_THREADS - 1], MSG_SEND_LEFT);
if (msg != RDY_OK) if (msg != MSG_OK)
saturated = TRUE; saturated = TRUE;
chSysUnlockFromIsr(); chSysUnlockFromISR();
} }
/* /*
@ -217,14 +217,14 @@ int main(void) {
sdStart(&SD1, NULL); sdStart(&SD1, NULL);
palSetPadMode(GPIOA, 9, PAL_MODE_ALTERNATE(1)); /* USART1 TX. */ palSetPadMode(GPIOA, 9, PAL_MODE_ALTERNATE(1)); /* USART1 TX. */
palSetPadMode(GPIOA, 10, PAL_MODE_ALTERNATE(1)); /* USART1 RX. */ palSetPadMode(GPIOA, 10, PAL_MODE_ALTERNATE(1)); /* USART1 RX. */
gptStart(&GPTD2, &gpt2cfg); gptStart(&GPTD1, &gpt2cfg);
gptStart(&GPTD3, &gpt3cfg); gptStart(&GPTD3, &gpt3cfg);
/* /*
* Initializes the mailboxes and creates the worker threads. * Initializes the mailboxes and creates the worker threads.
*/ */
for (i = 0; i < NUM_THREADS; i++) { for (i = 0; i < NUM_THREADS; i++) {
chMBInit(&mb[i], b[i], MAILBOX_SIZE); chMBObjectInit(&mb[i], b[i], MAILBOX_SIZE);
chThdCreateStatic(waWorkerThread[i], sizeof waWorkerThread[i], chThdCreateStatic(waWorkerThread[i], sizeof waWorkerThread[i],
NORMALPRIO - 20, WorkerThread, (void *)i); NORMALPRIO - 20, WorkerThread, (void *)i);
} }
@ -287,10 +287,10 @@ int main(void) {
saturated = FALSE; saturated = FALSE;
threshold = 0; threshold = 0;
for (interval = 2000; interval >= 20; interval -= interval / 10) { for (interval = 2000; interval >= 20; interval -= interval / 10) {
gptStartContinuous(&GPTD2, interval - 1); /* Slightly out of phase.*/ gptStartContinuous(&GPTD1, interval - 1); /* Slightly out of phase.*/
gptStartContinuous(&GPTD3, interval + 1); /* Slightly out of phase.*/ gptStartContinuous(&GPTD3, interval + 1); /* Slightly out of phase.*/
chThdSleepMilliseconds(1000); chThdSleepMilliseconds(1000);
gptStopTimer(&GPTD2); gptStopTimer(&GPTD1);
gptStopTimer(&GPTD3); gptStopTimer(&GPTD3);
if (!saturated) if (!saturated)
print("."); print(".");
@ -311,7 +311,7 @@ int main(void) {
if (threshold > worst) if (threshold > worst)
worst = threshold; worst = threshold;
} }
gptStopTimer(&GPTD2); gptStopTimer(&GPTD1);
gptStopTimer(&GPTD3); gptStopTimer(&GPTD3);
print("Worst case at "); print("Worst case at ");

8
testhal/STM32F0xx/IRQ_STORM/mcuconf.h
View File

@ -77,12 +77,12 @@
/* /*
* GPT driver system settings. * GPT driver system settings.
*/ */
#define STM32_GPT_USE_TIM1 FALSE #define STM32_GPT_USE_TIM1 TRUE
#define STM32_GPT_USE_TIM2 TRUE #define STM32_GPT_USE_TIM2 FALSE
#define STM32_GPT_USE_TIM3 TRUE #define STM32_GPT_USE_TIM3 TRUE
#define STM32_GPT_TIM1_IRQ_PRIORITY 2 #define STM32_GPT_TIM1_IRQ_PRIORITY 1
#define STM32_GPT_TIM2_IRQ_PRIORITY 2 #define STM32_GPT_TIM2_IRQ_PRIORITY 2
#define STM32_GPT_TIM3_IRQ_PRIORITY 2 #define STM32_GPT_TIM3_IRQ_PRIORITY 3
/* /*
* I2C driver system settings. * I2C driver system settings.

2
testhal/STM32F0xx/PWM-ICU/.project
View File

@ -27,7 +27,7 @@
<link> <link>
<name>board</name> <name>board</name>
<type>2</type> <type>2</type>
<locationURI>CHIBIOS/boards/ST_STM32F0_DISCOVERY</locationURI> <locationURI>CHIBIOS/os/hal/boards/ST_STM32F0_DISCOVERY</locationURI>
</link> </link>
<link> <link>
<name>os</name> <name>os</name>

8
testhal/STM32F0xx/PWM-ICU/chconf.h
View File

@ -41,7 +41,7 @@
* setting also defines the system tick time unit. * setting also defines the system tick time unit.
*/ */
#if !defined(CH_CFG_ST_FREQUENCY) || defined(__DOXYGEN__) #if !defined(CH_CFG_ST_FREQUENCY) || defined(__DOXYGEN__)
#define CH_CFG_ST_FREQUENCY 1000 #define CH_CFG_ST_FREQUENCY 10000
#endif #endif
/** /**
@ -62,7 +62,7 @@
* this value. * this value.
*/ */
#if !defined(CH_CFG_TIMEDELTA) || defined(__DOXYGEN__) #if !defined(CH_CFG_TIMEDELTA) || defined(__DOXYGEN__)
#define CH_CFG_TIMEDELTA 0 #define CH_CFG_TIMEDELTA 2
#endif #endif
/** /**
@ -357,7 +357,7 @@
* @note The default is @p FALSE. * @note The default is @p FALSE.
*/ */
#if !defined(CH_DBG_STATISTICS) || defined(__DOXYGEN__) #if !defined(CH_DBG_STATISTICS) || defined(__DOXYGEN__)
#define CH_DBG_STATISTICS TRUE #define CH_DBG_STATISTICS FALSE
#endif #endif
/** /**
@ -441,7 +441,7 @@
* tickless mode. * tickless mode.
*/ */
#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) #if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__)
#define CH_DBG_THREADS_PROFILING TRUE #define CH_DBG_THREADS_PROFILING FALSE
#endif #endif
/** @} */ /** @} */

18
testhal/STM32F0xx/PWM-ICU/main.c
View File

@ -90,11 +90,11 @@ int main(void) {
/* /*
* Initializes the PWM driver 2 and ICU driver 3. * Initializes the PWM driver 2 and ICU driver 3.
* GPIOA6 is the ICU input (CH1). * GPIOA6 is the ICU input (CH1).
* GPIOA15 is the PWM output (CH1). * GPIOA8 is the PWM output (CH1).
* The two pins have to be externally connected together. * The two pins have to be externally connected together.
*/ */
pwmStart(&PWMD2, &pwmcfg); pwmStart(&PWMD1, &pwmcfg);
palSetPadMode(GPIOA, 15, PAL_MODE_ALTERNATE(2)); palSetPadMode(GPIOA, 8, PAL_MODE_ALTERNATE(2));
icuStart(&ICUD3, &icucfg); icuStart(&ICUD3, &icucfg);
palSetPadMode(GPIOA, 6, PAL_MODE_ALTERNATE(1)); palSetPadMode(GPIOA, 6, PAL_MODE_ALTERNATE(1));
icuEnable(&ICUD3); icuEnable(&ICUD3);
@ -103,33 +103,33 @@ int main(void) {
/* /*
* Starts the PWM channel 0 using 75% duty cycle. * Starts the PWM channel 0 using 75% duty cycle.
*/ */
pwmEnableChannel(&PWMD2, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD2, 7500)); pwmEnableChannel(&PWMD1, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD1, 7500));
chThdSleepMilliseconds(5000); chThdSleepMilliseconds(5000);
/* /*
* Changes the PWM channel 0 to 50% duty cycle. * Changes the PWM channel 0 to 50% duty cycle.
*/ */
pwmEnableChannel(&PWMD2, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD2, 5000)); pwmEnableChannel(&PWMD1, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD1, 5000));
chThdSleepMilliseconds(5000); chThdSleepMilliseconds(5000);
/* /*
* Changes the PWM channel 0 to 25% duty cycle. * Changes the PWM channel 0 to 25% duty cycle.
*/ */
pwmEnableChannel(&PWMD2, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD2, 2500)); pwmEnableChannel(&PWMD1, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD1, 2500));
chThdSleepMilliseconds(5000); chThdSleepMilliseconds(5000);
/* /*
* Changes PWM period to half second the duty cycle becomes 50% * Changes PWM period to half second the duty cycle becomes 50%
* implicitly. * implicitly.
*/ */
pwmChangePeriod(&PWMD2, 5000); pwmChangePeriod(&PWMD1, 5000);
chThdSleepMilliseconds(5000); chThdSleepMilliseconds(5000);
/* /*
* Disables channel 0 and stops the drivers. * Disables channel 0 and stops the drivers.
*/ */
pwmDisableChannel(&PWMD2, 0); pwmDisableChannel(&PWMD1, 0);
pwmStop(&PWMD2); pwmStop(&PWMD1);
icuDisable(&ICUD3); icuDisable(&ICUD3);
icuStop(&ICUD3); icuStop(&ICUD3);
palClearPad(GPIOC, GPIOC_LED3); palClearPad(GPIOC, GPIOC_LED3);

4
testhal/STM32F0xx/PWM-ICU/mcuconf.h
View File

@ -110,8 +110,8 @@
* PWM driver system settings. * PWM driver system settings.
*/ */
#define STM32_PWM_USE_ADVANCED FALSE #define STM32_PWM_USE_ADVANCED FALSE
#define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM1 TRUE
#define STM32_PWM_USE_TIM2 TRUE #define STM32_PWM_USE_TIM2 FALSE
#define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM3 FALSE
#define STM32_PWM_TIM1_IRQ_PRIORITY 3 #define STM32_PWM_TIM1_IRQ_PRIORITY 3
#define STM32_PWM_TIM2_IRQ_PRIORITY 3 #define STM32_PWM_TIM2_IRQ_PRIORITY 3

2
testhal/STM32F0xx/PWM-ICU/readme.txt
View File

@ -12,7 +12,7 @@ The application demonstrates the use of the STM32F0xx PWM-ICU drivers.
** Board Setup ** ** Board Setup **
- Connect PA15 and PC6 together. - Connect PA8 and PA6 together.
** Build Procedure ** ** Build Procedure **

2
testhal/STM32F0xx/SPI/.project
View File

@ -27,7 +27,7 @@
<link> <link>
<name>board</name> <name>board</name>
<type>2</type> <type>2</type>
<locationURI>CHIBIOS/boards/ST_STM32F0_DISCOVERY</locationURI> <locationURI>CHIBIOS/os/hal/boards/ST_STM32F0_DISCOVERY</locationURI>
</link> </link>
<link> <link>
<name>os</name> <name>os</name>

8
testhal/STM32F0xx/SPI/chconf.h
View File

@ -41,7 +41,7 @@
* setting also defines the system tick time unit. * setting also defines the system tick time unit.
*/ */
#if !defined(CH_CFG_ST_FREQUENCY) || defined(__DOXYGEN__) #if !defined(CH_CFG_ST_FREQUENCY) || defined(__DOXYGEN__)
#define CH_CFG_ST_FREQUENCY 1000 #define CH_CFG_ST_FREQUENCY 10000
#endif #endif
/** /**
@ -62,7 +62,7 @@
* this value. * this value.
*/ */
#if !defined(CH_CFG_TIMEDELTA) || defined(__DOXYGEN__) #if !defined(CH_CFG_TIMEDELTA) || defined(__DOXYGEN__)
#define CH_CFG_TIMEDELTA 0 #define CH_CFG_TIMEDELTA 2
#endif #endif
/** /**
@ -357,7 +357,7 @@
* @note The default is @p FALSE. * @note The default is @p FALSE.
*/ */
#if !defined(CH_DBG_STATISTICS) || defined(__DOXYGEN__) #if !defined(CH_DBG_STATISTICS) || defined(__DOXYGEN__)
#define CH_DBG_STATISTICS TRUE #define CH_DBG_STATISTICS FALSE
#endif #endif
/** /**
@ -441,7 +441,7 @@
* tickless mode. * tickless mode.
*/ */
#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) #if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__)
#define CH_DBG_THREADS_PROFILING TRUE #define CH_DBG_THREADS_PROFILING FALSE
#endif #endif
/** @} */ /** @} */

2
testhal/STM32F0xx/UART/.project
View File

@ -27,7 +27,7 @@
<link> <link>
<name>board</name> <name>board</name>
<type>2</type> <type>2</type>
<locationURI>CHIBIOS/boards/ST_STM32F0_DISCOVERY</locationURI> <locationURI>CHIBIOS/os/hal/boards/ST_STM32F0_DISCOVERY</locationURI>
</link> </link>
<link> <link>
<name>os</name> <name>os</name>

8
testhal/STM32F0xx/UART/chconf.h
View File

@ -41,7 +41,7 @@
* setting also defines the system tick time unit. * setting also defines the system tick time unit.
*/ */
#if !defined(CH_CFG_ST_FREQUENCY) || defined(__DOXYGEN__) #if !defined(CH_CFG_ST_FREQUENCY) || defined(__DOXYGEN__)
#define CH_CFG_ST_FREQUENCY 1000 #define CH_CFG_ST_FREQUENCY 10000
#endif #endif
/** /**
@ -62,7 +62,7 @@
* this value. * this value.
*/ */
#if !defined(CH_CFG_TIMEDELTA) || defined(__DOXYGEN__) #if !defined(CH_CFG_TIMEDELTA) || defined(__DOXYGEN__)
#define CH_CFG_TIMEDELTA 0 #define CH_CFG_TIMEDELTA 2
#endif #endif
/** /**
@ -357,7 +357,7 @@
* @note The default is @p FALSE. * @note The default is @p FALSE.
*/ */
#if !defined(CH_DBG_STATISTICS) || defined(__DOXYGEN__) #if !defined(CH_DBG_STATISTICS) || defined(__DOXYGEN__)
#define CH_DBG_STATISTICS TRUE #define CH_DBG_STATISTICS FALSE
#endif #endif
/** /**
@ -441,7 +441,7 @@
* tickless mode. * tickless mode.
*/ */
#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__) #if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__)
#define CH_DBG_THREADS_PROFILING TRUE #define CH_DBG_THREADS_PROFILING FALSE
#endif #endif
/** @} */ /** @} */

20
testhal/STM32F0xx/UART/main.c
View File

@ -17,15 +17,15 @@
#include "ch.h" #include "ch.h"
#include "hal.h" #include "hal.h"
static VirtualTimer vt1, vt2; static virtual_timer_t vt1, vt2;
static void restart(void *p) { static void restart(void *p) {
(void)p; (void)p;
chSysLockFromIsr(); chSysLockFromISR();
uartStartSendI(&UARTD1, 14, "Hello World!\r\n"); uartStartSendI(&UARTD1, 14, "Hello World!\r\n");
chSysUnlockFromIsr(); chSysUnlockFromISR();
} }
static void ledoff(void *p) { static void ledoff(void *p) {
@ -51,11 +51,10 @@ static void txend2(UARTDriver *uartp) {
(void)uartp; (void)uartp;
palClearPad(GPIOC, GPIOC_LED4); palClearPad(GPIOC, GPIOC_LED4);
chSysLockFromIsr(); chSysLockFromISR();
if (chVTIsArmedI(&vt1)) chVTResetI(&vt1);
chVTResetI(&vt1);
chVTSetI(&vt1, MS2ST(5000), restart, NULL); chVTSetI(&vt1, MS2ST(5000), restart, NULL);
chSysUnlockFromIsr(); chSysUnlockFromISR();
} }
/* /*
@ -78,11 +77,10 @@ static void rxchar(UARTDriver *uartp, uint16_t c) {
(void)c; (void)c;
/* Flashing the LED each time a character is received.*/ /* Flashing the LED each time a character is received.*/
palSetPad(GPIOC, GPIOC_LED4); palSetPad(GPIOC, GPIOC_LED4);
chSysLockFromIsr(); chSysLockFromISR();
if (chVTIsArmedI(&vt2)) chVTResetI(&vt2);
chVTResetI(&vt2);
chVTSetI(&vt2, MS2ST(200), ledoff, NULL); chVTSetI(&vt2, MS2ST(200), ledoff, NULL);
chSysUnlockFromIsr(); chSysUnlockFromISR();
} }
/* /*