andreika-git
/
ChibiOS
mirror of https://github.com/andreika-git/ChibiOS.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@13849 27425a3e-05d8-49a3-a47f-9c15f0e5edd8

This commit is contained in:
Giovanni Di Sirio 2020-09-09 08:36:24 +00:00
parent dc0302e867
commit 3b53c60a49
5 changed files with 36 additions and 29 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

24
os/hal/ports/STM32/LLD/RCCv1/stm32_ahb.inc
View File

@ -30,16 +30,17 @@
* @name HPRE field bits definitions
* @{
*/
#define STM32_HPRE_MASK (15 << 4) /**< HPRE field mask. */
#define STM32_HPRE_DIV1 (0 << 4) /**< SYSCLK divided by 1. */
#define STM32_HPRE_DIV2 (8 << 4) /**< SYSCLK divided by 2. */
#define STM32_HPRE_DIV4 (9 << 4) /**< SYSCLK divided by 4. */
#define STM32_HPRE_DIV8 (10 << 4) /**< SYSCLK divided by 8. */
#define STM32_HPRE_DIV16 (11 << 4) /**< SYSCLK divided by 16. */
#define STM32_HPRE_DIV64 (12 << 4) /**< SYSCLK divided by 64. */
#define STM32_HPRE_DIV128 (13 << 4) /**< SYSCLK divided by 128. */
#define STM32_HPRE_DIV256 (14 << 4) /**< SYSCLK divided by 256. */
#define STM32_HPRE_DIV512 (15 << 4) /**< SYSCLK divided by 512. */
#define STM32_HPRE_MASK (15U << 4U) /**< HPRE field mask. */
#define STM32_HPRE_FIELD(n) ((n) << 4U) /**< HPRE field value. */
#define STM32_HPRE_DIV1 STM32_HPRE_FIELD(0U)
#define STM32_HPRE_DIV2 STM32_HPRE_FIELD(8U)
#define STM32_HPRE_DIV4 STM32_HPRE_FIELD(9U)
#define STM32_HPRE_DIV8 STM32_HPRE_FIELD(10U)
#define STM32_HPRE_DIV16 STM32_HPRE_FIELD(11U)
#define STM32_HPRE_DIV64 STM32_HPRE_FIELD(12U)
#define STM32_HPRE_DIV128 STM32_HPRE_FIELD(13U)
#define STM32_HPRE_DIV256 STM32_HPRE_FIELD(14U)
#define STM32_HPRE_DIV512 STM32_HPRE_FIELD(15U)
/** @} */
/*===========================================================================*/
@ -53,12 +54,11 @@
#error "STM32_HPRE not defined in mcuconf.h"
#endif
/* Check on limits.*/
/* Input checks.*/
#if !defined(STM32_SYSCLK_MAX)
#error "STM32_SYSCLK_MAX not defined in hal_lld.h"
#endif
/* Input checks.*/
#if !defined(STM32_SYSCLK)
#error "STM32_SYSCLK not defined in hal_lld.h"
#endif

16
os/hal/ports/STM32/LLD/RCCv1/stm32_apb1.inc
View File

@ -30,12 +30,13 @@
* @name PPRE1 field bits definitions
* @{
*/
#define STM32_PPRE1_MASK (7 << 8) /**< PPRE1 field mask. */
#define STM32_PPRE1_DIV1 (0 << 8) /**< HCLK divided by 1. */
#define STM32_PPRE1_DIV2 (4 << 8) /**< HCLK divided by 2. */
#define STM32_PPRE1_DIV4 (5 << 8) /**< HCLK divided by 4. */
#define STM32_PPRE1_DIV8 (6 << 8) /**< HCLK divided by 8. */
#define STM32_PPRE1_DIV16 (7 << 8) /**< HCLK divided by 16. */
#define STM32_PPRE1_MASK (7U << 8U) /**< PPRE1 field mask. */
#define STM32_PPRE1_FIELD(n) ((n) << 8U) /**< PPRE1 field value. */
#define STM32_PPRE1_DIV1 STM32_PPRE1_FIELD(0U)
#define STM32_PPRE1_DIV2 STM32_PPRE1_FIELD(4U)
#define STM32_PPRE1_DIV4 STM32_PPRE1_FIELD(5U)
#define STM32_PPRE1_DIV8 STM32_PPRE1_FIELD(6U)
#define STM32_PPRE1_DIV16 STM32_PPRE1_FIELD(7U)
/** @} */
/*===========================================================================*/
@ -49,12 +50,11 @@
#error "STM32_PPRE1 not defined in mcuconf.h"
#endif
/* Check on limits.*/
/* Input checks.*/
#if !defined(STM32_PCLK1_MAX)
#error "STM32_PCLK1_MAX not defined in hal_lld.h"
#endif
/* Input checks.*/
#if !defined(STM32_HCLK)
#error "STM32_HCLK not defined in hal_lld.h"
#endif

16
os/hal/ports/STM32/LLD/RCCv1/stm32_apb2.inc
View File

@ -30,12 +30,13 @@
* @name PPRE1 field bits definitions
* @{
*/
#define STM32_PPRE2_MASK (7 << 11) /**< PPRE2 field mask. */
#define STM32_PPRE2_DIV1 (0 << 11) /**< HCLK divided by 1. */
#define STM32_PPRE2_DIV2 (4 << 11) /**< HCLK divided by 2. */
#define STM32_PPRE2_DIV4 (5 << 11) /**< HCLK divided by 4. */
#define STM32_PPRE2_DIV8 (6 << 11) /**< HCLK divided by 8. */
#define STM32_PPRE2_DIV16 (7 << 11) /**< HCLK divided by 16. */
#define STM32_PPRE2_MASK (7U << 11U) /**< PPRE2 field mask. */
#define STM32_PPRE2_FIELD(n) ((n) << 11U) /**< PPRE2 field value. */
#define STM32_PPRE2_DIV1 STM32_PPRE2_FIELD(0U)
#define STM32_PPRE2_DIV2 STM32_PPRE2_FIELD(4U)
#define STM32_PPRE2_DIV4 STM32_PPRE2_FIELD(5U)
#define STM32_PPRE2_DIV8 STM32_PPRE2_FIELD(6U)
#define STM32_PPRE2_DIV16 STM32_PPRE2_FIELD(7U)
/** @} */
/*===========================================================================*/
@ -49,12 +50,11 @@
#error "STM32_PPRE1 not defined in mcuconf.h"
#endif
/* Check on limits.*/
/* Input checks.*/
#if !defined(STM32_PCLK1_MAX)
#error "STM32_PCLK1_MAX not defined in hal_lld.h"
#endif
/* Input checks.*/
#if !defined(STM32_HCLK)
#error "STM32_HCLK not defined in hal_lld.h"
#endif

8
os/hal/ports/STM32/LLD/RCCv1/stm32_lse.inc
View File

@ -67,6 +67,14 @@
#endif
#endif
#if !defined(RCC_BDCR_LSESYSEN)
#define RCC_BDCR_LSESYSEN 0U
#endif
#if !defined(RCC_BDCR_LSESYSRDY)
#define RCC_BDCR_LSESYSRDY 0U
#endif
/*===========================================================================*/
/* Driver exported variables. */
/*===========================================================================*/

1
os/hal/ports/STM32/LLD/RCCv1/stm32_pll.inc
View File

@ -112,7 +112,6 @@
#error "STM32_ACTIVATE_PLL not defined in hal_lld.h"
#endif
#if STM32_PLL_HAS_P && !defined(STM32_PLLPEN)
#error "STM32_PLLPEN not defined in hal_lld.h"
#endif