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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/kernel_3_dev@6159 35acf78f-673a-0410-8e92-d51de3d6d3f4

This commit is contained in:
gdisirio 2013-08-15 14:48:41 +00:00
parent d9e22836cd
commit 44fe821ab4
3 changed files with 56 additions and 39 deletions
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45
os/hal/include/pal.h
View File

@ -211,11 +211,12 @@ typedef struct {
* @brief Reads the physical I/O port states.
* @note The default implementation always return zero and computes the
* parameter eventual side effects.
* @note The function can be called from any context.
*
* @param[in] port port identifier
* @return The port logical states.
*
* @api
* @special
*/
#if !defined(pal_lld_readport) || defined(__DOXYGEN__)
#define palReadPort(port) ((void)(port), 0)
@ -229,11 +230,12 @@ typedef struct {
* value.
* @note The default implementation always return zero and computes the
* parameter eventual side effects.
* @note The function can be called from any context.
*
* @param[in] port port identifier
* @return The latched logical states.
*
* @api
* @special
*/
#if !defined(pal_lld_readlatch) || defined(__DOXYGEN__)
#define palReadLatch(port) ((void)(port), 0)
@ -245,11 +247,12 @@ typedef struct {
* @brief Writes a bits mask on a I/O port.
* @note The default implementation does nothing except computing the
* parameters eventual side effects.
* @note The function can be called from any context.
*
* @param[in] port port identifier
* @param[in] bits bits to be written on the specified port
*
* @api
* @special
*/
#if !defined(pal_lld_writeport) || defined(__DOXYGEN__)
#define palWritePort(port, bits) ((void)(port), (void)(bits))
@ -266,11 +269,12 @@ typedef struct {
* @note The default implementation is non atomic and not necessarily
* optimal. Low level drivers may optimize the function by using
* specific hardware or coding.
* @note The function can be called from any context.
*
* @param[in] port port identifier
* @param[in] bits bits to be ORed on the specified port
*
* @api
* @special
*/
#if !defined(pal_lld_setport) || defined(__DOXYGEN__)
#define palSetPort(port, bits) \
@ -288,11 +292,12 @@ typedef struct {
* @note The default implementation is non atomic and not necessarily
* optimal. Low level drivers may optimize the function by using
* specific hardware or coding.
* @note The function can be called from any context.
*
* @param[in] port port identifier
* @param[in] bits bits to be cleared on the specified port
*
* @api
* @special
*/
#if !defined(pal_lld_clearport) || defined(__DOXYGEN__)
#define palClearPort(port, bits) \
@ -310,11 +315,12 @@ typedef struct {
* @note The default implementation is non atomic and not necessarily
* optimal. Low level drivers may optimize the function by using
* specific hardware or coding.
* @note The function can be called from any context.
*
* @param[in] port port identifier
* @param[in] bits bits to be XORed on the specified port
*
* @api
* @special
*/
#if !defined(pal_lld_toggleport) || defined(__DOXYGEN__)
#define palTogglePort(port, bits) \
@ -325,6 +331,7 @@ typedef struct {
/**
* @brief Reads a group of bits.
* @note The function can be called from any context.
*
* @param[in] port port identifier
* @param[in] mask group mask, a logical AND is performed on the input
@ -332,7 +339,7 @@ typedef struct {
* @param[in] offset group bit offset within the port
* @return The group logical states.
*
* @api
* @special
*/
#if !defined(pal_lld_readgroup) || defined(__DOXYGEN__)
#define palReadGroup(port, mask, offset) \
@ -343,6 +350,7 @@ typedef struct {
/**
* @brief Writes a group of bits.
* @note The function can be called from any context.
*
* @param[in] port port identifier
* @param[in] mask group mask, a logical AND is performed on the
@ -351,7 +359,7 @@ typedef struct {
* @param[in] bits bits to be written. Values exceeding the group
* width are masked.
*
* @api
* @special
*/
#if !defined(pal_lld_writegroup) || defined(__DOXYGEN__)
#define palWriteGroup(port, mask, offset, bits) \
@ -368,13 +376,14 @@ typedef struct {
* @details This function programs a pads group belonging to the same port
* with the specified mode.
* @note Programming an unknown or unsupported mode is silently ignored.
* @note The function can be called from any context.
*
* @param[in] port port identifier
* @param[in] mask group mask
* @param[in] offset group bit offset within the port
* @param[in] mode group mode
*
* @api
* @special
*/
#if !defined(pal_lld_setgroupmode) || defined(__DOXYGEN__)
#define palSetGroupMode(port, mask, offset, mode)
@ -389,6 +398,7 @@ typedef struct {
* drivers may optimize the function by using specific hardware
* or coding.
* @note The default implementation internally uses the @p palReadPort().
* @note The function can be called from any context.
*
* @param[in] port port identifier
* @param[in] pad pad number within the port
@ -396,7 +406,7 @@ typedef struct {
* @retval PAL_LOW low logical state.
* @retval PAL_HIGH high logical state.
*
* @api
* @special
*/
#if !defined(pal_lld_readpad) || defined(__DOXYGEN__)
#define palReadPad(port, pad) ((palReadPort(port) >> (pad)) & 1)
@ -415,13 +425,14 @@ typedef struct {
* specific hardware or coding.
* @note The default implementation internally uses the @p palReadLatch()
* and @p palWritePort().
* @note The function can be called from any context.
*
* @param[in] port port identifier
* @param[in] pad pad number within the port
* @param[in] bit logical value, the value must be @p PAL_LOW or
* @p PAL_HIGH
*
* @api
* @special
*/
#if !defined(pal_lld_writepad) || defined(__DOXYGEN__)
#define palWritePad(port, pad, bit) \
@ -441,11 +452,12 @@ typedef struct {
* optimal. Low level drivers may optimize the function by using
* specific hardware or coding.
* @note The default implementation internally uses the @p palSetPort().
* @note The function can be called from any context.
*
* @param[in] port port identifier
* @param[in] pad pad number within the port
*
* @api
* @special
*/
#if !defined(pal_lld_setpad) || defined(__DOXYGEN__)
#define palSetPad(port, pad) palSetPort(port, PAL_PORT_BIT(pad))
@ -463,11 +475,12 @@ typedef struct {
* optimal. Low level drivers may optimize the function by using
* specific hardware or coding.
* @note The default implementation internally uses the @p palClearPort().
* @note The function can be called from any context.
*
* @param[in] port port identifier
* @param[in] pad pad number within the port
*
* @api
* @special
*/
#if !defined(pal_lld_clearpad) || defined(__DOXYGEN__)
#define palClearPad(port, pad) palClearPort(port, PAL_PORT_BIT(pad))
@ -485,11 +498,12 @@ typedef struct {
* optimal. Low level drivers may optimize the function by using
* specific hardware or coding.
* @note The default implementation internally uses the @p palTogglePort().
* @note The function can be called from any context.
*
* @param[in] port port identifier
* @param[in] pad pad number within the port
*
* @api
* @special
*/
#if !defined(pal_lld_togglepad) || defined(__DOXYGEN__)
#define palTogglePad(port, pad) palTogglePort(port, PAL_PORT_BIT(pad))
@ -504,12 +518,13 @@ typedef struct {
* drivers may optimize the function by using specific hardware
* or coding.
* @note Programming an unknown or unsupported mode is silently ignored.
* @note The function can be called from any context.
*
* @param[in] port port identifier
* @param[in] pad pad number within the port
* @param[in] mode pad mode
*
* @api
* @special
*/
#if !defined(pal_lld_setpadmode) || defined(__DOXYGEN__)
#define palSetPadMode(port, pad, mode) \

41
os/hal/platforms/STM32/TIMv1/stm32_tim.h
View File

@ -40,7 +40,7 @@
#define STM32_TIM_CR1_OPM (1U << 3)
#define STM32_TIM_CR1_DIR (1U << 4)
#define STM32_TIM_CR1_CMS_MASK (3U << 4)
#define STM32_TIM_CR1_CMS_MASK (3U << 5)
#define STM32_TIM_CR1_CMS(n) ((n) << 5)
#define STM32_TIM_CR1_ARPE (1U << 7)
@ -71,7 +71,7 @@
#define STM32_TIM_CR2_OIS3N (1U << 13)
#define STM32_TIM_CR2_OIS4 (1U << 14)
#define STM32_TIM_CR2_OIS5 (1U << 16)
#define STM32_TIM_CR2_OIS6 (1U << 17)
#define STM32_TIM_CR2_OIS6 (1U << 18)
#define STM32_TIM_CR2_MMS2_MASK (15U << 20)
#define STM32_TIM_CR2_MMS2(n) ((n) << 20)
@ -81,9 +81,9 @@
* @name TIM_SMCR register
* @{
*/
#define STM32_TIM_SMCR_SMS_MASK 0x00010007
#define STM32_TIM_SMCR_SMS_MASK ((7U << 0) | (1U << 16))
#define STM32_TIM_SMCR_SMS(n) ((((n) & 7) << 0) | \
(((n) & 8) << 16))
(((n) >> 3) << 16))
#define STM32_TIM_SMCR_OCCS (1U << 3)
@ -129,8 +129,7 @@
STM32_TIM_DIER_CC4IE | \
STM32_TIM_DIER_COMIE | \
STM32_TIM_DIER_TIE | \
STM32_TIM_DIER_BIE | \
STM32_TIM_DIER_UDE)
STM32_TIM_DIER_BIE)
/** @} */
@ -180,9 +179,9 @@
#define STM32_TIM_CCMR1_OC1FE (1U << 2)
#define STM32_TIM_CCMR1_OC1PE (1U << 3)
#define STM32_TIM_CCMR1_OC1M_MASK 0x00010070
#define STM32_TIM_CCMR1_OC1M_MASK ((7U << 4) | (1U << 16))
#define STM32_TIM_CCMR1_OC1M(n) ((((n) & 3) << 4) | \
(((n) & 4) << 16))
(((n) >> 2) << 16))
#define STM32_TIM_CCMR1_OC1CE (1U << 7)
@ -192,9 +191,9 @@
#define STM32_TIM_CCMR1_OC2FE (1U << 10)
#define STM32_TIM_CCMR1_OC2PE (1U << 11)
#define STM32_TIM_CCMR1_OC2M_MASK 0x01007000
#define STM32_TIM_CCMR1_OC2M(n) ((((n) & 3) << 8) | \
(((n) & 4) << 24))
#define STM32_TIM_CCMR1_OC2M_MASK ((7U << 12) | (1U << 24))
#define STM32_TIM_CCMR1_OC2M(n) ((((n) & 3) << 12) | \
(((n) >> 2) << 24))
#define STM32_TIM_CCMR1_OC2CE (1U << 15)
/** @} */
@ -226,9 +225,9 @@
#define STM32_TIM_CCMR2_OC3FE (1U << 2)
#define STM32_TIM_CCMR2_OC3PE (1U << 3)
#define STM32_TIM_CCMR2_OC3M_MASK 0x00010070
#define STM32_TIM_CCMR2_OC3M_MASK ((7U << 4) | (1U << 16))
#define STM32_TIM_CCMR2_OC3M(n) ((((n) & 3) << 4) | \
(((n) & 4) << 16))
(((n) >> 2) << 16))
#define STM32_TIM_CCMR2_OC3CE (1U << 7)
@ -238,9 +237,9 @@
#define STM32_TIM_CCMR2_OC4FE (1U << 10)
#define STM32_TIM_CCMR2_OC4PE (1U << 11)
#define STM32_TIM_CCMR2_OC4M_MASK 0x01007000
#define STM32_TIM_CCMR2_OC4M(n) ((((n) & 3) << 8) | \
(((n) & 4) << 24))
#define STM32_TIM_CCMR2_OC4M_MASK ((7U << 12) | (1U << 24))
#define STM32_TIM_CCMR2_OC4M(n) ((((n) & 3) << 12) | \
(((n) >> 2) << 24))
#define STM32_TIM_CCMR2_OC4CE (1U << 15)
/** @} */
@ -354,18 +353,18 @@
#define STM32_TIM_CCMR3_OC5FE (1U << 2)
#define STM32_TIM_CCMR3_OC5PE (1U << 3)
#define STM32_TIM_CCMR3_OC5M_MASK 0x00010070
#define STM32_TIM_CCMR3_OC5M_MASK ((7U << 4) | (1U << 16))
#define STM32_TIM_CCMR3_OC5M(n) ((((n) & 3) << 4) | \
(((n) & 4) << 16))
(((n) >> 2) << 16))
#define STM32_TIM_CCMR3_OC5CE (1U << 7)
#define STM32_TIM_CCMR3_OC6FE (1U << 10)
#define STM32_TIM_CCMR3_OC6PE (1U << 11)
#define STM32_TIM_CCMR3_OC6M_MASK 0x01007000
#define STM32_TIM_CCMR3_OC6M(n) ((((n) & 3) << 8) | \
(((n) & 4) << 24))
#define STM32_TIM_CCMR3_OC6M_MASK ((7U << 12) | (1U << 24))
#define STM32_TIM_CCMR3_OC6M(n) ((((n) & 3) << 12) | \
(((n) >> 2) << 24))
#define STM32_TIM_CCMR3_OC6CE (1U << 15)
/** @} */

9
os/hal/src/pal.c
View File

@ -59,11 +59,12 @@
* @note The function internally uses the @p palReadGroup() macro. The use
* of this function is preferred when you value code size, readability
* and error checking over speed.
* @note The function can be called from any context.
*
* @param[in] bus the I/O bus, pointer to a @p IOBus structure
* @return The bus logical states.
*
* @api
* @special
*/
ioportmask_t palReadBus(IOBus *bus) {
@ -81,13 +82,14 @@ ioportmask_t palReadBus(IOBus *bus) {
* @note The default implementation is non atomic and not necessarily
* optimal. Low level drivers may optimize the function by using
* specific hardware or coding.
* @note The function can be called from any context.
*
* @param[in] bus the I/O bus, pointer to a @p IOBus structure
* @param[in] bits the bits to be written on the I/O bus. Values exceeding
* the bus width are masked so most significant bits are
* lost.
*
* @api
* @special
*/
void palWriteBus(IOBus *bus, ioportmask_t bits) {
@ -105,11 +107,12 @@ void palWriteBus(IOBus *bus, ioportmask_t bits) {
* @note The default implementation is non atomic and not necessarily
* optimal. Low level drivers may optimize the function by using
* specific hardware or coding.
* @note The function can be called from any context.
*
* @param[in] bus the I/O bus, pointer to a @p IOBus structure
* @param[in] mode the mode
*
* @api
* @special
*/
void palSetBusMode(IOBus *bus, iomode_t mode) {