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ChibiOS
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Various fixes thanks to pl4nkton. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10224 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
Giovanni Di Sirio 2017-05-29 08:31:47 +00:00
parent 0a80e007b0
commit 4838806bfe
3 changed files with 12 additions and 11 deletions
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5
os/hal/ports/STM32/LLD/SDMMCv1/hal_sdc_lld.c
View File

@ -562,9 +562,10 @@ void sdc_lld_set_data_clk(SDCDriver *sdcp, sdcbusclk_t clk) {
(void)clk;
#if STM32_SDC_SDMMC_PWRSAV
#else
sdcp->sdmmc->CLKCR = (sdcp->sdmmc->CLKCR & 0xFFFFFF00U) | SDMMC_CLKDIV_HS |
SDMMC_CLKCR_PWRSAV;
#else
sdcp->sdmmc->CLKCR = (sdcp->sdmmc->CLKCR & 0xFFFFFF00U) | SDMMC_CLKDIV_HS;
#endif
#endif
}
@ -583,7 +584,7 @@ void sdc_lld_stop_clk(SDCDriver *sdcp) {
}
/**
* @brief Switches the bus to 4 bits mode.
* @brief Switches the bus to 1, 4 or 8 bits mode.
*
* @param[in] sdcp pointer to the @p SDCDriver object
* @param[in] mode bus mode

8
os/hal/ports/STM32/STM32F4xx/stm32_registry.h
View File

@ -769,7 +769,7 @@
/* USB attributes.*/
#define STM32_OTG_STEPPING 2
#define STM32_HAS_OTG1 TRUE
#define STM32_OTG1_ENDPOINTS 6
#define STM32_OTG1_ENDPOINTS 5
#define STM32_HAS_OTG2 TRUE
#define STM32_OTG2_ENDPOINTS 7
@ -1464,7 +1464,7 @@
/* USB attributes.*/
#define STM32_OTG_STEPPING 1
#define STM32_HAS_OTG1 TRUE
#define STM32_OTG1_ENDPOINTS 4
#define STM32_OTG1_ENDPOINTS 3
#define STM32_HAS_OTG2 FALSE
#define STM32_HAS_USB FALSE
@ -1759,7 +1759,7 @@
/* USB attributes.*/
#define STM32_OTG_STEPPING 1
#define STM32_HAS_OTG1 TRUE
#define STM32_OTG1_ENDPOINTS 4
#define STM32_OTG1_ENDPOINTS 3
#define STM32_HAS_OTG2 FALSE
#define STM32_HAS_USB FALSE
@ -2665,7 +2665,7 @@
/* USB attributes.*/
#define STM32_OTG_STEPPING 1
#define STM32_HAS_OTG1 TRUE
#define STM32_OTG1_ENDPOINTS 4
#define STM32_OTG1_ENDPOINTS 3
#define STM32_HAS_OTG2 FALSE
#define STM32_HAS_USB FALSE