PAL driver template.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@14092 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
This commit is contained in:
Giovanni Di Sirio
parent
479653eee1
commit
557fe2bf0e
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@ -85,60 +85,99 @@ typedef enum {
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* @{
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*/
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typedef struct {
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__IO uint32_t RESET;
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__IO uint32_t WDSEL;
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__I uint32_t RESET_DONE;
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struct {
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__I uint32_t STATUS;
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__IO uint32_t CTRL;
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} GPIO[30];
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__IO uint32_t INTR[4];
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struct {
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__IO uint32_t INTE[4];
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__IO uint32_t INTF[4];
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__I uint32_t INTS[4];
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} PROC[2];
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__IO uint32_t DW_INTE[4];
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__IO uint32_t DW_INTF[4];
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__I uint32_t DW_INTS[4];
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} IOUSER_TypeDef;
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typedef struct {
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struct {
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__I uint32_t STATUS;
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__IO uint32_t CTRL;
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} GPIO[6];
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__IO uint32_t INTR[1];
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struct {
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__IO uint32_t INTE[1];
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__IO uint32_t INTF[1];
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__I uint32_t INTS[1];
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} PROC[2];
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__IO uint32_t DW_INTE[1];
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__IO uint32_t DW_INTF[1];
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__I uint32_t DW_INTS[1];
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} IOQSPI_TypeDef;
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typedef struct {
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__IO uint32_t VOLTAGE_SELECT;
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__IO uint32_t GPIO[30];
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__IO uint32_t SWCLK;
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__IO uint32_t SWD;
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} PADS_TypeDef;
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typedef struct {
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__IO uint32_t RESET;
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__IO uint32_t WDSEL;
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__I uint32_t RESET_DONE;
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} RESETS_TypeDef;
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typedef struct {
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__IO uint32_t TIMEHW;
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__IO uint32_t TIMELW;
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__I uint32_t TIMEHR;
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__I uint32_t TIMELR;
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__IO uint32_t ALARM0;
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__IO uint32_t ALARM1;
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__IO uint32_t ALARM2;
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__IO uint32_t ALARM3;
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__IO uint32_t ARMED;
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__I uint32_t TIMERAWH;
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__I uint32_t TIMERAWL;
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__IO uint32_t DBGPAUSE;
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__IO uint32_t PAUSE;
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__IO uint32_t INTR;
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__IO uint32_t INTE;
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__IO uint32_t INTF;
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__I uint32_t INTS;
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__IO uint32_t TIMEHW;
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__IO uint32_t TIMELW;
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__I uint32_t TIMEHR;
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__I uint32_t TIMELR;
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__IO uint32_t ALARM0;
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__IO uint32_t ALARM1;
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__IO uint32_t ALARM2;
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__IO uint32_t ALARM3;
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__IO uint32_t ARMED;
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__I uint32_t TIMERAWH;
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__I uint32_t TIMERAWL;
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__IO uint32_t DBGPAUSE;
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__IO uint32_t PAUSE;
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__IO uint32_t INTR;
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__IO uint32_t INTE;
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__IO uint32_t INTF;
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__I uint32_t INTS;
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} TIMER_TypeDef;
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typedef struct {
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__IO uint32_t UARTDR;
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__IO uint32_t UARTRSR;
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__I uint32_t resvd8;
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__I uint32_t resvdC;
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__I uint32_t resvd10;
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__I uint32_t resvd14;
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__I uint32_t UARTFR;
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__I uint32_t resvd1C;
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__IO uint32_t UARTILPR;
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__IO uint32_t UARTIBRD;
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__IO uint32_t UARTFBRD;
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__IO uint32_t UARTLCR_H;
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__IO uint32_t UARTCR;
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__IO uint32_t UARTIFLS;
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__IO uint32_t UARTIMSC;
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__I uint32_t UARTRIS;
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__I uint32_t UARTMIS;
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__IO uint32_t UARTICR;
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__IO uint32_t UARTDMACR;
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__I uint32_t resvd4C[997];
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__I uint32_t UARTPERIPHID0;
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__I uint32_t UARTPERIPHID1;
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__I uint32_t UARTPERIPHID2;
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__I uint32_t UARTPERIPHID3;
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__I uint32_t UARTPCELLID0;
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__I uint32_t UARTPCELLID1;
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__I uint32_t UARTPCELLID2;
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__I uint32_t UARTPCELLID3;
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__IO uint32_t UARTDR;
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__IO uint32_t UARTRSR;
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__I uint32_t resvd8;
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__I uint32_t resvdC;
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__I uint32_t resvd10;
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__I uint32_t resvd14;
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__I uint32_t UARTFR;
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__I uint32_t resvd1C;
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__IO uint32_t UARTILPR;
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__IO uint32_t UARTIBRD;
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__IO uint32_t UARTFBRD;
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__IO uint32_t UARTLCR_H;
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__IO uint32_t UARTCR;
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__IO uint32_t UARTIFLS;
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__IO uint32_t UARTIMSC;
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__I uint32_t UARTRIS;
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__I uint32_t UARTMIS;
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__IO uint32_t UARTICR;
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__IO uint32_t UARTDMACR;
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__I uint32_t resvd4C[997];
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__I uint32_t UARTPERIPHID0;
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__I uint32_t UARTPERIPHID1;
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__I uint32_t UARTPERIPHID2;
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__I uint32_t UARTPERIPHID3;
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__I uint32_t UARTPCELLID0;
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__I uint32_t UARTPCELLID1;
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__I uint32_t UARTPCELLID2;
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__I uint32_t UARTPCELLID3;
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} UART_TypeDef;
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/** @} */
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@ -148,7 +187,11 @@ typedef struct {
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*/
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#define APBPERIPH_BASE 0x40000000U
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#define AHBPERIPH_BASE 0x50000000U
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#define __IOPORT_BASE 0xA0000000U
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#define __IOPORT_BASE 0xD0000000U
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#define __IOUSER0_BASE (APBPERIPH_BASE + 0x00014000U)
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#define __IOQSPI_BASE (APBPERIPH_BASE + 0x00018000U)
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#define __PADSUSER0_BASE (APBPERIPH_BASE + 0x0001C000U)
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#define __PADSQSPI_BASE (APBPERIPH_BASE + 0x00020000U)
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#define __RESETS_BASE (APBPERIPH_BASE + 0x0000C000U)
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#define __TIMER_BASE (APBPERIPH_BASE + 0x00054000U)
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#define __UART0_BASE (APBPERIPH_BASE + 0x00034000U)
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@ -159,6 +202,10 @@ typedef struct {
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* @name Peripherals
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* @{
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*/
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#define IO_BANK0 ((IOUSER_TypeDef *)__IOUSER0_BASE)
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#define IO_QSPI ((IOUSER_TypeDef *)__IOQSPI_BASE)
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#define PADS_BANK0 ((PADS_TypeDef *)__PADSUSER0_BASE)
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#define PADS_QSPI ((PADS_TypeDef *)__PADSQSPI_BASE)
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#define RESETS ((RESETS_TypeDef *)__RESETS_BASE)
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#define TIMER ((TIMER_TypeDef *)__TIMER_BASE)
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#define UART0 ((UART_TypeDef *)__UART0_BASE)
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@ -0,0 +1,9 @@
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ifeq ($(USE_SMART_BUILD),yes)
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ifneq ($(findstring HAL_USE_PAL TRUE,$(HALCONF)),)
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PLATFORMSRC += $(CHIBIOS)/os/hal/ports/RP/LLD/GPIOv1/hal_pal_lld.c
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endif
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else
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PLATFORMSRC += $(CHIBIOS)/os/hal/ports/RP/LLD/GPIOv1/hal_pal_lld.c
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endif
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PLATFORMINC += $(CHIBIOS)/os/hal/ports/RP/LLD/GPIOv1
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@ -0,0 +1,64 @@
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/*
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ChibiOS - Copyright (C) 2006..2021 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* @file GPIOv1/hal_pal_lld.c
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* @brief RP PAL low level driver code.
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*
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* @addtogroup PAL
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* @{
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*/
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#include "hal.h"
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#if HAL_USE_PAL || defined(__DOXYGEN__)
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/*===========================================================================*/
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/* Driver local definitions. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver exported variables. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver local variables and types. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver local functions. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver interrupt handlers. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver exported functions. */
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/*===========================================================================*/
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/**
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* @brief PAL driver initialization.
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*
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* @notapi
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*/
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void __pal_lld_init(void) {
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}
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#endif /* HAL_USE_PAL */
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/** @} */
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@ -0,0 +1,410 @@
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/*
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ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* @file GPIOv1/hal_pal_lld.h
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* @brief RP PAL low level driver header.
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*
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* @addtogroup PAL
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* @{
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*/
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#ifndef HAL_PAL_LLD_H
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#define HAL_PAL_LLD_H
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#if HAL_USE_PAL || defined(__DOXYGEN__)
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/*===========================================================================*/
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/* Unsupported modes and specific modes */
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/*===========================================================================*/
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/* Specifies palInit() without parameter, required until all platforms will
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be updated to the new style.*/
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#define PAL_NEW_INIT
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#undef PAL_MODE_RESET
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#undef PAL_MODE_UNCONNECTED
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#undef PAL_MODE_INPUT
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#undef PAL_MODE_INPUT_PULLUP
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#undef PAL_MODE_INPUT_PULLDOWN
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#undef PAL_MODE_INPUT_ANALOG
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#undef PAL_MODE_OUTPUT_PUSHPULL
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#undef PAL_MODE_OUTPUT_OPENDRAIN
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/**
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* @name RP-specific I/O mode flags
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* @{
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*/
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#define PAL_RP_MODE_INOVER_NOTINV (0U << 16)
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#define PAL_RP_MODE_INOVER_INV (1U << 16)
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#define PAL_RP_MODE_INOVER_DRVLOW (2U << 16)
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#define PAL_RP_MODE_INOVER_DRVHIGH (3U << 16)
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#define PAL_RP_MODE_OEOVER_DRVPERI (0U << 12)
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#define PAL_RP_MODE_OEOVER_DRVINVPERI (1U << 12)
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#define PAL_RP_MODE_OEOVER_DISABLE (2U << 12)
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#define PAL_RP_MODE_OEOVER_ENABLE (3U << 12)
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#define PAL_RP_MODE_OUTOVER_DRVPERI (0U << 8)
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#define PAL_RP_MODE_OUTOVER_DRVINVPERI (1U << 8)
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#define PAL_RP_MODE_OUTOVER_DRVLOW (2U << 8)
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#define PAL_RP_MODE_OUTOVER_DRVHIGH (3U << 8)
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#define PAL_RP_MODE_FUNCSEL(n) ((n) << 0)
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#define PAL_RP_MODE_OD (1U << (24 + 7))
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#define PAL_RP_MODE_IE (1U << (24 + 6))
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#define PAL_RP_MODE_DRIVE2 (0U << (24 + 4))
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#define PAL_RP_MODE_DRIVE4 (1U << (24 + 4))
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#define PAL_RP_MODE_DRIVE8 (2U << (24 + 4))
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#define PAL_RP_MODE_DRIVE12 (3U << (24 + 4))
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#define PAL_RP_MODE_PUE (1U << (24 + 3))
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#define PAL_RP_MODE_PDE (1U << (24 + 2))
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#define PAL_RP_MODE_SCHMITT (1U << (24 + 1))
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#define PAL_RP_MODE_SLEWFAST (1U << (24 + 0))
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/**
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* @brief Alternate function.
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*
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* @param[in] n alternate function selector
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*/
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#define PAL_MODE_ALTERNATE(n) (PAL_RP_MODE_IE | \
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PAL_RP_MODE_OUTOVER_DRVPERI | \
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PAL_RP_MODE_FUNCSEL(n))
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/** @} */
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/**
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* @name Standard I/O mode flags
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* @{
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*/
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/**
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* @brief Implemented as input.
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*/
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#define PAL_MODE_RESET PAL_STM32_MODE_INPUT
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/**
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* @brief Implemented as input with pull-up.
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*/
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#define PAL_MODE_UNCONNECTED PAL_MODE_INPUT_PULLUP
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/**
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* @brief Regular input high-Z pad.
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*/
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#define PAL_MODE_INPUT PAL_STM32_MODE_INPUT
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/**
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* @brief Input pad with weak pull up resistor.
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*/
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#define PAL_MODE_INPUT_PULLUP (PAL_STM32_MODE_INPUT | \
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PAL_STM32_PUPDR_PULLUP)
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/**
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* @brief Input pad with weak pull down resistor.
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*/
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#define PAL_MODE_INPUT_PULLDOWN (PAL_STM32_MODE_INPUT | \
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PAL_STM32_PUPDR_PULLDOWN)
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/**
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* @brief Analog input mode.
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*/
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#define PAL_MODE_INPUT_ANALOG PAL_STM32_MODE_ANALOG
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/**
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* @brief Push-pull output pad.
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*/
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#define PAL_MODE_OUTPUT_PUSHPULL (PAL_STM32_MODE_OUTPUT | \
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PAL_STM32_OTYPE_PUSHPULL)
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/**
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* @brief Open-drain output pad.
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*/
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#define PAL_MODE_OUTPUT_OPENDRAIN (PAL_STM32_MODE_OUTPUT | \
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PAL_STM32_OTYPE_OPENDRAIN)
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/** @} */
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/*===========================================================================*/
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/* I/O Ports Types and constants. */
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/*===========================================================================*/
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/**
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* @name Port related definitions
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* @{
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*/
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/**
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* @brief Width, in bits, of an I/O port.
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*/
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#define PAL_IOPORTS_WIDTH 32
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/**
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* @brief Whole port mask.
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* @details This macro specifies all the valid bits into a port.
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*/
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#define PAL_WHOLE_PORT ((ioportmask_t)0xFFFFFFFF)
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/** @} */
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/**
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* @name Line handling macros
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* @{
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*/
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/**
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* @brief Forms a line identifier.
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* @details A port/pad pair are encoded into an @p ioline_t type. The encoding
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* of this type is platform-dependent.
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* @note In this driver the pad number is encoded in the lower 4 bits of
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* the GPIO address which are guaranteed to be zero.
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*/
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#define PAL_LINE(port, pad) ((pad), (port))
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/**
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* @brief Decodes a port identifier from a line identifier.
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*/
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#define PAL_PORT(line) 0U
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/**
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* @brief Decodes a pad identifier from a line identifier.
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*/
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#define PAL_PAD(line) (line)
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/**
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* @brief Value identifying an invalid line.
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*/
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#define PAL_NOLINE 0U
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/** @} */
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/**
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* @brief Type of digital I/O port sized unsigned integer.
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*/
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typedef uint32_t ioportmask_t;
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/**
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* @brief Type of digital I/O modes.
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*/
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typedef uint32_t iomode_t;
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/**
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* @brief Type of an I/O line.
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*/
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typedef uint32_t ioline_t;
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/**
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* @brief Type of an event mode.
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*/
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typedef uint32_t ioeventmode_t;
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/**
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* @brief Type of a port Identifier.
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* @details This type can be a scalar or some kind of pointer, do not make
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* any assumption about it, use the provided macros when populating
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* variables of this type.
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*/
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typedef uint32_t ioportid_t;
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/**
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* @brief Type of an pad identifier.
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*/
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typedef uint32_t iopadid_t;
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||||
|
||||
/*===========================================================================*/
|
||||
/* I/O Ports Identifiers. */
|
||||
/* The low level driver wraps the definitions already present in the STM32 */
|
||||
/* firmware library. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief User port identifier.
|
||||
*/
|
||||
#define IOPORT1 0U
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Implementation, some of the following macros could be implemented as */
|
||||
/* functions, if so please put them in pal_lld.c. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief GPIO ports subsystem initialization.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#define pal_lld_init() __pal_lld_init()
|
||||
|
||||
/**
|
||||
* @brief Reads an I/O port.
|
||||
* @note Not implemented on this device.
|
||||
*
|
||||
* @param[in] port port identifier
|
||||
* @return The port bits.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#define pal_lld_readport(port) 0U
|
||||
|
||||
/**
|
||||
* @brief Reads the output latch.
|
||||
* @note Not implemented on this device.
|
||||
*
|
||||
* @param[in] port port identifier
|
||||
* @return The latched logical states.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#define pal_lld_readlatch(port) 0U
|
||||
|
||||
/**
|
||||
* @brief Writes on a I/O port.
|
||||
* @note Not implemented on this device.
|
||||
*
|
||||
* @param[in] port port identifier
|
||||
* @param[in] bits bits to be written on the specified port
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#define pal_lld_writeport(port, bits)
|
||||
|
||||
/**
|
||||
* @brief Sets a bits mask on a I/O port.
|
||||
* @note Not implemented on this device.
|
||||
*
|
||||
* @param[in] port port identifier
|
||||
* @param[in] bits bits to be ORed on the specified port
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#define pal_lld_setport(port, bits)
|
||||
|
||||
/**
|
||||
* @brief Clears a bits mask on a I/O port.
|
||||
* @note Not implemented on this device.
|
||||
*
|
||||
* @param[in] port port identifier
|
||||
* @param[in] bits bits to be cleared on the specified port
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#define pal_lld_clearport(port, bits)
|
||||
|
||||
/**
|
||||
* @brief Writes a group of bits.
|
||||
* @note Not implemented on this device.
|
||||
*
|
||||
* @param[in] port port identifier
|
||||
* @param[in] mask group mask
|
||||
* @param[in] offset the group bit offset within the port
|
||||
* @param[in] bits bits to be written. Values exceeding the group
|
||||
* width are masked.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#define pal_lld_writegroup(port, mask, offset, bits) (void)(bits)
|
||||
|
||||
/**
|
||||
* @brief Pads group mode setup.
|
||||
* @note Not implemented on this device.
|
||||
*
|
||||
* @param[in] port port identifier
|
||||
* @param[in] mask group mask
|
||||
* @param[in] offset group bit offset within the port
|
||||
* @param[in] mode group mode
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#define pal_lld_setgroupmode(port, mask, offset, mode) (void)(mode)
|
||||
|
||||
/**
|
||||
* @brief Writes a logical state on an output pad.
|
||||
*
|
||||
* @param[in] port port identifier
|
||||
* @param[in] pad pad number within the port
|
||||
* @param[in] bit logical value, the value must be @p PAL_LOW or
|
||||
* @p PAL_HIGH
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#define pal_lld_writepad(port, pad, bit)
|
||||
|
||||
/**
|
||||
* @brief Pad event enable.
|
||||
* @note Programming an unknown or unsupported mode is silently ignored.
|
||||
*
|
||||
* @param[in] port port identifier
|
||||
* @param[in] pad pad number within the port
|
||||
* @param[in] mode pad event mode
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#define pal_lld_enablepadevent(port, pad, mode)
|
||||
|
||||
/**
|
||||
* @brief Pad event disable.
|
||||
* @details This function disables previously programmed event callbacks.
|
||||
*
|
||||
* @param[in] port port identifier
|
||||
* @param[in] pad pad number within the port
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#define pal_lld_disablepadevent(port, pad)
|
||||
|
||||
/**
|
||||
* @brief Returns a PAL event structure associated to a pad.
|
||||
*
|
||||
* @param[in] port port identifier
|
||||
* @param[in] pad pad number within the port
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#define pal_lld_get_pad_event(port, pad)
|
||||
|
||||
/**
|
||||
* @brief Returns a PAL event structure associated to a line.
|
||||
*
|
||||
* @param[in] line line identifier
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#define pal_lld_get_line_event(line)
|
||||
|
||||
/**
|
||||
* @brief Pad event enable check.
|
||||
*
|
||||
* @param[in] port port identifier
|
||||
* @param[in] pad pad number within the port
|
||||
* @return Pad event status.
|
||||
* @retval false if the pad event is disabled.
|
||||
* @retval true if the pad event is enabled.
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#define pal_lld_ispadeventenabled(port, pad) false
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
void __pal_lld_init(void);
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* HAL_USE_PAL */
|
||||
|
||||
#endif /* HAL_PAL_LLD_H */
|
||||
|
||||
/** @} */
|
||||
|
|
@ -25,6 +25,7 @@ else
|
|||
endif
|
||||
|
||||
# Drivers compatible with the platform.
|
||||
include $(CHIBIOS)/os/hal/ports/RP/LLD/GPIOv1/driver.mk
|
||||
include $(CHIBIOS)/os/hal/ports/RP/LLD/TIMERv1/driver.mk
|
||||
include $(CHIBIOS)/os/hal/ports/RP/LLD/UARTv1/driver.mk
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue