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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@6987 35acf78f-673a-0410-8e92-d51de3d6d3f4

This commit is contained in:
gdisirio 2014-06-13 12:08:53 +00:00
parent 7b584490f3
commit 6711ff45ea
6 changed files with 205 additions and 242 deletions
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3
os/hal/include/rtc.h
View File

@ -63,7 +63,6 @@
#define RTC_DAY_FRIDAY 5
#define RTC_DAY_SATURDAY 6
#define RTC_DAY_SUNDAY 7
/** @} */
/*===========================================================================*/
@ -173,7 +172,7 @@ extern "C" {
void rtcInit(void);
void rtcSetTime(RTCDriver *rtcp, const RTCDateTime *timespec);
void rtcGetTime(RTCDriver *rtcp, RTCDateTime *timespec);
#if RTC_ALARMS > 0
#if STM32_RTC_NUM_ALARMS > 0
void rtcSetAlarm(RTCDriver *rtcp,
rtcalarm_t alarm,
const RTCAlarm *alarmspec);

290
os/hal/ports/STM32/LLD/RTCv2/rtc_lld.c
View File

@ -50,23 +50,30 @@ RTCDriver RTCD1;
/*===========================================================================*/
/* Driver local functions. */
/*===========================================================================*/
/**
* @brief Wait for synchronization of RTC registers with APB1 bus.
* @details This function must be invoked before trying to read RTC registers.
* @brief Wait for synchronization of RTC registers with shadow registers.
* @details This function must be invoked before trying to access RTC
* registers.
*
* @notapi
*/
#define rtc_lld_apb1_sync() {while ((RTCD1.id_rtc->ISR & RTC_ISR_RSF) == 0);}
static void rtc_regs_sync(void) {
while ((RTCD1.rtc->ISR & RTC_ISR_RSF) == 0)
;
}
/**
* @brief Beginning of configuration procedure.
*
* @notapi
*/
#define rtc_lld_enter_init() { \
RTCD1.id_rtc->ISR |= RTC_ISR_INIT; \
while ((RTCD1.id_rtc->ISR & RTC_ISR_INITF) == 0) \
; \
static void rtc_enter_init(void) {
RTCD1.rtc->ISR |= RTC_ISR_INIT;
while ((RTCD1.rtc->ISR & RTC_ISR_INITF) == 0)
;
}
/**
@ -74,7 +81,103 @@ RTCDriver RTCD1;
*
* @notapi
*/
#define rtc_lld_exit_init() {RTCD1.id_rtc->ISR &= ~RTC_ISR_INIT;}
static inline void rtc_exit_init(void) {
RTCD1.rtc->ISR &= ~RTC_ISR_INIT;
}
/**
* @brief Converts time from TR register encoding to timespec.
*
* @param[in] tr TR register value
* @param[out] timespec pointer to a @p RTCDateTime structure
*
* @notapi
*/
static void rtc_decode_time(uint32_t tr, RTCDateTime *timespec) {
}
/**
* @brief Converts date from DR register encoding to timespec.
*
* @param[in] dr DR register value
* @param[out] timespec pointer to a @p RTCDateTime structure
*
* @notapi
*/
static void rtc_decode_date(uint32_t dr, RTCDateTime *timespec) {
}
/**
* @brief Converts time from timespec to TR register encoding.
*
* @param[in] timespec pointer to a @p RTCDateTime structure
* @return the TR register encoding.
*
* @notapi
*/
static uint32_t rtc_encode_time(const RTCDateTime *timespec) {
uint32_t n, tr = 0;
/* Subseconds cannot be set.*/
n = timespec->millisecond / 1000;
/* Seconds conversion.*/
tr = tr | ((n % 10) << RTC_TR_SU_OFFSET);
n /= 10;
tr = tr | ((n % 6) << RTC_TR_ST_OFFSET);
n /= 6;
/* Minutes conversion.*/
tr = tr | ((n % 10) << RTC_TR_MNU_OFFSET);
n /= 10;
tr = tr | ((n % 6) << RTC_TR_MNT_OFFSET);
n /= 6;
/* Hours conversion.*/
tr = tr | ((n % 10) << RTC_TR_HU_OFFSET);
n /= 10;
tr = tr | (n << RTC_TR_HT_OFFSET);
return tr;
}
/**
* @brief Converts a date from timespec to DR register encoding.
*
* @param[in] timespec pointer to a @p RTCDateTime structure
* @return the DR register encoding.
*
* @notapi
*/
static uint32_t rtc_encode_date(const RTCDateTime *timespec) {
uint32_t n, dr = 0;
/* Year conversion. Note, only years last two digits are considered.*/
n = 1980 + timespec->year;
dr = dr | ((n % 10) << RTC_DR_YU_OFFSET);
n /= 10;
dr = dr | ((n % 10) << RTC_DR_YT_OFFSET);
/* Months conversion.*/
n = timespec->month;
dr = dr | ((n % 10) << RTC_DR_MU_OFFSET);
n /= 10;
dr = dr | ((n % 10) << RTC_DR_MT_OFFSET);
/* Days conversion.*/
n = timespec->day;
dr = dr | ((n % 10) << RTC_DR_DU_OFFSET);
n /= 10;
dr = dr | ((n % 10) << RTC_DR_DT_OFFSET);
/* Days of week conversion.*/
dr = dr | (timespec->dayofweek << RTC_DR_WDU_OFFSET);
return dr;
}
/*===========================================================================*/
/* Driver interrupt handlers. */
@ -89,26 +192,25 @@ RTCDriver RTCD1;
*
* @api
*/
void rtc_lld_init(void){
RTCD1.id_rtc = RTC;
void rtc_lld_init(void) {
/* Asynchronous part of preloader. Set it to maximum value. */
uint32_t prediv_a = 0x7F;
/* RTC pointer initialization.*/
RTCD1.rtc = RTC;
/* Disable write protection. */
RTCD1.id_rtc->WPR = 0xCA;
RTCD1.id_rtc->WPR = 0x53;
RTCD1.rtc->WPR = 0xCA;
RTCD1.rtc->WPR = 0x53;
/* If calendar not init yet. */
if (!(RTC->ISR & RTC_ISR_INITS)){
rtc_lld_enter_init();
/* If calendar has not been initialized yet then proceed with the
initial setup.*/
if (!(RTCD1.rtc->ISR & RTC_ISR_INITS)) {
rtc_enter_init();
/* Prescaler register must be written in two SEPARATE writes. */
prediv_a = (prediv_a << 16) |
(((STM32_RTCCLK / (prediv_a + 1)) - 1) & 0x7FFF);
RTCD1.id_rtc->PRER = prediv_a;
RTCD1.id_rtc->PRER = prediv_a;
rtc_lld_exit_init();
RTCD1.rtc->CR = 0;
RTCD1.rtc->PRER = STM32_RTC_PRES_VALUE;
RTCD1.rtc->PRER = STM32_RTC_PRES_VALUE;
rtc_exit_init();
}
}
@ -118,45 +220,50 @@ void rtc_lld_init(void){
* to set it on STM32 platform.
*
* @param[in] rtcp pointer to RTC driver structure
* @param[in] timespec pointer to a @p RTCTime structure
* @param[in] timespec pointer to a @p RTCDateTime structure
*
* @api
*/
void rtc_lld_set_time(RTCDriver *rtcp, const RTCTime *timespec) {
(void)rtcp;
void rtc_lld_set_time(RTCDriver *rtcp, const RTCDateTime *timespec) {
uint32_t dr, tr;
rtc_lld_enter_init();
if (timespec->h12)
RTCD1.id_rtc->CR |= RTC_CR_FMT;
else
RTCD1.id_rtc->CR &= ~RTC_CR_FMT;
RTCD1.id_rtc->TR = timespec->tv_time;
RTCD1.id_rtc->DR = timespec->tv_date;
rtc_lld_exit_init();
tr = rtc_encode_time(timespec);
dr = rtc_encode_date(timespec);
rtc_regs_sync();
rtc_enter_init();
rtcp->rtc->TR = tr;
rtcp->rtc->DR = dr;
rtc_exit_init();
}
/**
* @brief Get current time.
*
* @param[in] rtcp pointer to RTC driver structure
* @param[out] timespec pointer to a @p RTCTime structure
* @param[out] timespec pointer to a @p RTCDateTime structure
*
* @api
*/
void rtc_lld_get_time(RTCDriver *rtcp, RTCTime *timespec) {
(void)rtcp;
void rtc_lld_get_time(RTCDriver *rtcp, RTCDateTime *timespec) {
uint32_t subs;
rtc_lld_apb1_sync();
rtc_regs_sync();
#if STM32_RTC_HAS_SUBSECONDS
timespec->tv_msec =
(1000 * ((RTCD1.id_rtc->PRER & 0x7FFF) - RTCD1.id_rtc->SSR)) /
((RTCD1.id_rtc->PRER & 0x7FFF) + 1);
subs = (1000 * ((rtcp->rtc->PRER & 0x7FFF) - rtcp->rtc->SSR)) /
((rtcp->rtc->PRER & 0x7FFF) + 1);
#else
subs = 0;
#endif /* STM32_RTC_HAS_SUBSECONDS */
timespec->tv_time = RTCD1.id_rtc->TR;
timespec->tv_date = RTCD1.id_rtc->DR;
/* timespec->tv_time = rtcp->rtc->TR;
timespec->tv_date = rtcp->rtc->DR;*/
}
#if (STM32_RTC_NUM_ALARMS > 0) || defined(__DOXYGEN__)
/**
* @brief Set alarm time.
*
@ -219,102 +326,7 @@ void rtc_lld_get_alarm(RTCDriver *rtcp,
else
alarmspec->tv_datetime = rtcp->id_rtc->ALRMBR;
}
/**
* @brief Sets time of periodic wakeup.
*
* @note Default value after BKP domain reset is 0x0000FFFF
*
* @param[in] rtcp pointer to RTC driver structure
* @param[in] wakeupspec pointer to a @p RTCWakeup structure
*
* @api
*/
void rtcSetPeriodicWakeup_v2(RTCDriver *rtcp, RTCWakeup *wakeupspec){
chDbgCheck((wakeupspec->wakeup != 0x30000),
"rtc_lld_set_periodic_wakeup, forbidden combination");
if (wakeupspec != NULL){
rtcp->id_rtc->CR &= ~RTC_CR_WUTE;
while(!(rtcp->id_rtc->ISR & RTC_ISR_WUTWF))
;
rtcp->id_rtc->WUTR = wakeupspec->wakeup & 0xFFFF;
rtcp->id_rtc->CR = (wakeupspec->wakeup >> 16) & 0x7;
rtcp->id_rtc->CR |= RTC_CR_WUTIE;
rtcp->id_rtc->CR |= RTC_CR_WUTE;
}
else {
rtcp->id_rtc->CR &= ~RTC_CR_WUTIE;
rtcp->id_rtc->CR &= ~RTC_CR_WUTE;
}
}
/**
* @brief Gets time of periodic wakeup.
*
* @note Default value after BKP domain reset is 0x0000FFFF
*
* @param[in] rtcp pointer to RTC driver structure
* @param[out] wakeupspec pointer to a @p RTCWakeup structure
*
* @api
*/
void rtcGetPeriodicWakeup_v2(RTCDriver *rtcp, RTCWakeup *wakeupspec){
wakeupspec->wakeup = 0;
wakeupspec->wakeup |= rtcp->id_rtc->WUTR;
wakeupspec->wakeup |= (((uint32_t)rtcp->id_rtc->CR) & 0x7) << 16;
}
/**
* @brief Get current time in format suitable for usage in FatFS.
*
* @param[in] rtcp pointer to RTC driver structure
* @return FAT time value.
*
* @api
*/
uint32_t rtc_lld_get_time_fat(RTCDriver *rtcp) {
uint32_t fattime;
RTCTime timespec;
uint32_t tv_time;
uint32_t tv_date;
uint32_t v;
chSysLock();
rtcGetTimeI(rtcp, &timespec);
chSysUnlock();
tv_time = timespec.tv_time;
tv_date = timespec.tv_date;
v = (tv_time & RTC_TR_SU) >> RTC_TR_SU_OFFSET;
v += ((tv_time & RTC_TR_ST) >> RTC_TR_ST_OFFSET) * 10;
fattime = v >> 1;
v = (tv_time & RTC_TR_MNU) >> RTC_TR_MNU_OFFSET;
v += ((tv_time & RTC_TR_MNT) >> RTC_TR_MNT_OFFSET) * 10;
fattime |= v << 5;
v = (tv_time & RTC_TR_HU) >> RTC_TR_HU_OFFSET;
v += ((tv_time & RTC_TR_HT) >> RTC_TR_HT_OFFSET) * 10;
v += 12 * ((tv_time & RTC_TR_PM) >> RTC_TR_PM_OFFSET);
fattime |= v << 11;
v = (tv_date & RTC_DR_DU) >> RTC_DR_DU_OFFSET;
v += ((tv_date & RTC_DR_DT) >> RTC_DR_DT_OFFSET) * 10;
fattime |= v << 16;
v = (tv_date & RTC_DR_MU) >> RTC_DR_MU_OFFSET;
v += ((tv_date & RTC_DR_MT) >> RTC_DR_MT_OFFSET) * 10;
fattime |= v << 21;
v = (tv_date & RTC_DR_YU) >> RTC_DR_YU_OFFSET;
v += ((tv_date & RTC_DR_YT) >> RTC_DR_YT_OFFSET) * 10;
v += 2000 - 1900 - 80;
fattime |= v << 25;
return fattime;
}
#endif /* STM32_RTC_NUM_ALARMS > 0 */
#endif /* HAL_USE_RTC */

113
os/hal/ports/STM32/LLD/RTCv2/rtc_lld.h
View File

@ -36,12 +36,13 @@
/*===========================================================================*/
/**
* @brief Two alarm comparators available on STM32F4x.
* @brief Callback support int the driver.
*/
#define RTC_ALARMS 2
#define RTC_SUPPORTS_CALLBACKS STM32_RTC_HAS_INTERRUPTS
/**
* @brief Data offsets in RTC date and time registers.
* @name Data offsets in RTC date and time registers
* @{
*/
#define RTC_TR_PM_OFFSET 22
#define RTC_TR_HT_OFFSET 20
@ -58,11 +59,29 @@
#define RTC_DR_MU_OFFSET 8
#define RTC_DR_DT_OFFSET 4
#define RTC_DR_DU_OFFSET 0
/** @} */
/**
* @brief RTC PRES register initializer.
*/
#define RTC_PRES(a, s) ((((a) - 1) << 16) | ((s) - 1))
/*===========================================================================*/
/* Driver pre-compile time settings. */
/*===========================================================================*/
/**
* @name Configuration options
* @{
*/
/**
* @brief RTC PRES register initialization.
* @note The default is calculated for a 32768Hz clock.
*/
#if !defined(STM32_RTC_PRES_VALUE) || defined(__DOXYGEN__)
#define STM32_RTC_PRES_VALUE RTC_PRES(32, 1024)
#endif
/*===========================================================================*/
/* Derived constants and error checks. */
/*===========================================================================*/
@ -77,95 +96,22 @@
#error "invalid source selected for RTC clock"
#endif
#if !defined(RTC_USE_INTERRUPTS) || defined(__DOXYGEN__)
#define RTC_USE_INTERRUPTS FALSE
#endif
#if STM32_PCLK1 < (STM32_RTCCLK * 7)
#error "STM32_PCLK1 frequency is too low to handle RTC without ugly workaround"
#error "STM32_PCLK1 frequency is too low"
#endif
/*===========================================================================*/
/* Driver data structures and types. */
/*===========================================================================*/
/**
* @brief Type of a structure representing an RTC alarm time stamp.
*/
typedef struct RTCAlarm RTCAlarm;
/**
* @brief Type of a structure representing an RTC wakeup period.
*/
typedef struct RTCWakeup RTCWakeup;
/**
* @brief Type of a structure representing an RTC callbacks config.
*/
typedef struct RTCCallbackConfig RTCCallbackConfig;
/**
* @brief Type of an RTC alarm.
* @details Meaningful on platforms with more than 1 alarm comparator.
*/
typedef uint32_t rtcalarm_t;
/**
* @brief Structure representing an RTC time stamp.
*/
struct RTCTime {
/**
* @brief RTC date register in STM32 BCD format.
*/
uint32_t tv_date;
/**
* @brief RTC time register in STM32 BCD format.
*/
uint32_t tv_time;
/**
* @brief Set this to TRUE to use 12 hour notation.
*/
bool_t h12;
/**
* @brief Fractional part of time.
*/
#if STM32_RTC_HAS_SUBSECONDS
uint32_t tv_msec;
#endif
};
/**
* @brief Structure representing an RTC alarm time stamp.
*/
struct RTCAlarm {
/**
* @brief Date and time of alarm in STM32 BCD.
*/
uint32_t tv_datetime;
};
/**
* @brief Structure representing an RTC periodic wakeup period.
*/
struct RTCWakeup {
/**
* @brief RTC WUTR register.
* @details Bits [15:0] contain value of WUTR register
* Bits [18:16] contain value of WUCKSEL bits in CR register
*
* @note ((WUTR == 0) || (WUCKSEL == 3)) is forbidden combination.
*/
uint32_t wakeup;
};
/**
* @brief Structure representing an RTC driver.
*/
struct RTCDriver{
struct RTCDriver {
/**
* @brief Pointer to the RTC registers block.
*/
RTC_TypeDef *id_rtc;
RTC_TypeDef *rtc;
};
/*===========================================================================*/
@ -184,17 +130,16 @@ extern RTCDriver RTCD1;
extern "C" {
#endif
void rtc_lld_init(void);
void rtc_lld_set_time(RTCDriver *rtcp, const RTCTime *timespec);
void rtc_lld_get_time(RTCDriver *rtcp, RTCTime *timespec);
void rtc_lld_set_time(RTCDriver *rtcp, const RTCDateTime *timespec);
void rtc_lld_get_time(RTCDriver *rtcp, RTCDateTime *timespec);
#if STM32_RTC_NUM_ALARMS > 0
void rtc_lld_set_alarm(RTCDriver *rtcp,
rtcalarm_t alarm,
const RTCAlarm *alarmspec);
void rtc_lld_get_alarm(RTCDriver *rtcp,
rtcalarm_t alarm,
RTCAlarm *alarmspec);
void rtcSetPeriodicWakeup_v2(RTCDriver *rtcp, RTCWakeup *wakeupspec);
void rtcGetPeriodicWakeup_v2(RTCDriver *rtcp, RTCWakeup *wakeupspec);
uint32_t rtc_lld_get_time_fat(RTCDriver *rtcp);
#endif
#ifdef __cplusplus
}
#endif

2
os/hal/ports/STM32/STM32F4xx/stm32_registry.h
View File

@ -126,6 +126,8 @@
#define STM32_RTC_HAS_SUBSECONDS FALSE
#endif
#define STM32_RTC_IS_CALENDAR TRUE
#define STM32_RTC_NUM_ALARMS /*2*/0
#define STM32_RTC_HAS_INTERRUPTS FALSE
/* SDIO attributes.*/
#define STM32_HAS_SDIO TRUE

1
testhal/STM32/STM32F4xx/RTC/Makefile
View File

@ -105,7 +105,6 @@ CSRC = $(PORTSRC) \
$(CHIBIOS)/os/various/syscalls.c \
$(CHIBIOS)/os/various/shell.c \
$(CHIBIOS)/os/various/chprintf.c \
$(CHIBIOS)/os/various/chrtclib.c \
main.c
# C++ sources that can be compiled in ARM or THUMB mode depending on the global

10
testhal/STM32/STM32F4xx/RTC/main.c
View File

@ -14,6 +14,10 @@
limitations under the License.
*/
#include "ch.h"
#include "hal.h"
#if 0
/*
This structure is used to hold the values representing a calendar time.
It contains the following members, with the meanings as shown.
@ -197,7 +201,7 @@ static const ShellConfig shell_cfg1 = {
(BaseSequentialStream *)&SD2,
commands
};
#endif
/**
* Main function.
@ -206,8 +210,9 @@ int main(void){
halInit();
chSysInit();
chThdCreateStatic(blinkWA, sizeof(blinkWA), NORMALPRIO, blink_thd, NULL);
// chThdCreateStatic(blinkWA, sizeof(blinkWA), NORMALPRIO, blink_thd, NULL);
#if 0
#if !WAKEUP_TEST
/* switch off wakeup */
rtcSetPeriodicWakeup_v2(&RTCD1, NULL);
@ -232,6 +237,7 @@ int main(void){
chThdSleepSeconds(3);
func_sleep();
#endif /* !WAKEUP_TEST */
#endif
return 0;
}