Better defaults.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@14804 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
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@ -75,9 +75,9 @@
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/*
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* Peripherals clocks and sources.
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*/
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#define STM32_USART1SEL STM32_USART1SEL_SYSCLK
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#define STM32_USART2SEL STM32_USART2SEL_SYSCLK
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#define STM32_LPUART1SEL STM32_LPUART1SEL_SYSCLK
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#define STM32_USART1SEL STM32_USART1SEL_PCLK
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#define STM32_USART2SEL STM32_USART2SEL_PCLK
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#define STM32_LPUART1SEL STM32_LPUART1SEL_PCLK
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#define STM32_I2C1SEL STM32_I2C1SEL_PCLK
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#define STM32_I2S1SEL STM32_I2S1SEL_SYSCLK
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#define STM32_LPTIM1SEL STM32_LPTIM1SEL_PCLK
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@ -83,10 +83,12 @@
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#include "stm32_tim1.inc"
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#include "stm32_tim2.inc"
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#if STM32_HAS_TIM4
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#if STM32_HAS_TIM3 && STM32_HAS_TIM4
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#include "stm32_tim3_4.inc"
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#else
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#elif STM32_HAS_TIM3
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#include "stm32_tim3.inc"
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#else
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#error "unknown TIMs combination"
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#endif
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#include "stm32_tim6.inc"
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#include "stm32_tim7.inc"
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@ -113,9 +115,9 @@ void irqInit(void) {
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tim1_irq_init();
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tim2_irq_init();
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#if STM32_HAS_TIM4
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#if STM32_HAS_TIM3 && STM32_HAS_TIM4
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tim3_tim4_irq_init();
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#else
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#elif STM32_HAS_TIM3
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tim3_irq_init();
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#endif
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tim6_irq_init();
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@ -154,9 +156,9 @@ void irqDeinit(void) {
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tim1_irq_deinit();
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tim2_irq_deinit();
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#if STM32_HAS_TIM4
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#if STM32_HAS_TIM3 && STM32_HAS_TIM4
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tim3_tim4_irq_deinit();
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#else
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#elif STM32_HAS_TIM3
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tim3_irq_deinit();
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#endif
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tim6_irq_deinit();
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@ -86,9 +86,9 @@
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/*
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* Peripherals clocks and sources.
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*/
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#define STM32_USART1SEL ${doc.STM32_USART1SEL!"STM32_USART1SEL_SYSCLK"}
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#define STM32_USART2SEL ${doc.STM32_USART2SEL!"STM32_USART2SEL_SYSCLK"}
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#define STM32_LPUART1SEL ${doc.STM32_LPUART1SEL!"STM32_LPUART1SEL_SYSCLK"}
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#define STM32_USART1SEL ${doc.STM32_USART1SEL!"STM32_USART1SEL_PCLK"}
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#define STM32_USART2SEL ${doc.STM32_USART2SEL!"STM32_USART2SEL_PCLK"}
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#define STM32_LPUART1SEL ${doc.STM32_LPUART1SEL!"STM32_LPUART1SEL_PCLK"}
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#define STM32_I2C1SEL ${doc.STM32_I2C1SEL!"STM32_I2C1SEL_PCLK"}
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#define STM32_I2S1SEL ${doc.STM32_I2S1SEL!"STM32_I2S1SEL_SYSCLK"}
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#define STM32_LPTIM1SEL ${doc.STM32_LPTIM1SEL!"STM32_LPTIM1SEL_PCLK"}
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