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ChibiOS
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Better defaults. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@14804 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
This commit is contained in:
Giovanni Di Sirio 2021-09-19 08:46:32 +00:00
parent b54c6ba3b5
commit 8ccfb00a42
3 changed files with 14 additions and 12 deletions
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6
demos/STM32/RT-STM32G031K8-NUCLEO32/cfg/mcuconf.h
View File

@ -75,9 +75,9 @@
/* /*
* Peripherals clocks and sources. * Peripherals clocks and sources.
*/ */
#define STM32_USART1SEL STM32_USART1SEL_SYSCLK #define STM32_USART1SEL STM32_USART1SEL_PCLK
#define STM32_USART2SEL STM32_USART2SEL_SYSCLK #define STM32_USART2SEL STM32_USART2SEL_PCLK
#define STM32_LPUART1SEL STM32_LPUART1SEL_SYSCLK #define STM32_LPUART1SEL STM32_LPUART1SEL_PCLK
#define STM32_I2C1SEL STM32_I2C1SEL_PCLK #define STM32_I2C1SEL STM32_I2C1SEL_PCLK
#define STM32_I2S1SEL STM32_I2S1SEL_SYSCLK #define STM32_I2S1SEL STM32_I2S1SEL_SYSCLK
#define STM32_LPTIM1SEL STM32_LPTIM1SEL_PCLK #define STM32_LPTIM1SEL STM32_LPTIM1SEL_PCLK

14
os/hal/ports/STM32/STM32G0xx/stm32_isr.c
View File

@ -83,10 +83,12 @@
#include "stm32_tim1.inc" #include "stm32_tim1.inc"
#include "stm32_tim2.inc" #include "stm32_tim2.inc"
#if STM32_HAS_TIM4 #if STM32_HAS_TIM3 && STM32_HAS_TIM4
#include "stm32_tim3_4.inc" #include "stm32_tim3_4.inc"
#else #elif STM32_HAS_TIM3
#include "stm32_tim3.inc" #include "stm32_tim3.inc"
#else
#error "unknown TIMs combination"
#endif #endif
#include "stm32_tim6.inc" #include "stm32_tim6.inc"
#include "stm32_tim7.inc" #include "stm32_tim7.inc"
@ -113,9 +115,9 @@ void irqInit(void) {
tim1_irq_init(); tim1_irq_init();
tim2_irq_init(); tim2_irq_init();
#if STM32_HAS_TIM4 #if STM32_HAS_TIM3 && STM32_HAS_TIM4
tim3_tim4_irq_init(); tim3_tim4_irq_init();
#else #elif STM32_HAS_TIM3
tim3_irq_init(); tim3_irq_init();
#endif #endif
tim6_irq_init(); tim6_irq_init();
@ -154,9 +156,9 @@ void irqDeinit(void) {
tim1_irq_deinit(); tim1_irq_deinit();
tim2_irq_deinit(); tim2_irq_deinit();
#if STM32_HAS_TIM4 #if STM32_HAS_TIM3 && STM32_HAS_TIM4
tim3_tim4_irq_deinit(); tim3_tim4_irq_deinit();
#else #elif STM32_HAS_TIM3
tim3_irq_deinit(); tim3_irq_deinit();
#endif #endif
tim6_irq_deinit(); tim6_irq_deinit();

6
tools/ftl/processors/conf/mcuconf_stm32g031xx/mcuconf.h.ftl
View File

@ -86,9 +86,9 @@
/* /*
* Peripherals clocks and sources. * Peripherals clocks and sources.
*/ */
#define STM32_USART1SEL ${doc.STM32_USART1SEL!"STM32_USART1SEL_SYSCLK"} #define STM32_USART1SEL ${doc.STM32_USART1SEL!"STM32_USART1SEL_PCLK"}
#define STM32_USART2SEL ${doc.STM32_USART2SEL!"STM32_USART2SEL_SYSCLK"} #define STM32_USART2SEL ${doc.STM32_USART2SEL!"STM32_USART2SEL_PCLK"}
#define STM32_LPUART1SEL ${doc.STM32_LPUART1SEL!"STM32_LPUART1SEL_SYSCLK"} #define STM32_LPUART1SEL ${doc.STM32_LPUART1SEL!"STM32_LPUART1SEL_PCLK"}
#define STM32_I2C1SEL ${doc.STM32_I2C1SEL!"STM32_I2C1SEL_PCLK"} #define STM32_I2C1SEL ${doc.STM32_I2C1SEL!"STM32_I2C1SEL_PCLK"}
#define STM32_I2S1SEL ${doc.STM32_I2S1SEL!"STM32_I2S1SEL_SYSCLK"} #define STM32_I2S1SEL ${doc.STM32_I2S1SEL!"STM32_I2S1SEL_SYSCLK"}
#define STM32_LPTIM1SEL ${doc.STM32_LPTIM1SEL!"STM32_LPTIM1SEL_PCLK"} #define STM32_LPTIM1SEL ${doc.STM32_LPTIM1SEL!"STM32_LPTIM1SEL_PCLK"}