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Fixed bug #1253. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@16126 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
This commit is contained in:
Giovanni Di Sirio 2023-03-04 08:54:54 +00:00
parent 358678f979
commit 8e3f28ef11
5 changed files with 24 additions and 26 deletions
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8
demos/STM32/RT-STM32H7A3ZI_Q-NUCLEO144/cfg/mcuconf.h
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@ -84,12 +84,12 @@
#define STM32_PLL1_P_ENABLED TRUE
#define STM32_PLL1_Q_ENABLED TRUE
#define STM32_PLL1_R_ENABLED TRUE
#define STM32_PLL1_DIVM_VALUE 8
#define STM32_PLL1_DIVM_VALUE 4
#define STM32_PLL1_DIVN_VALUE 260
#define STM32_PLL1_FRACN_VALUE 0
#define STM32_PLL1_DIVP_VALUE 1
#define STM32_PLL1_DIVQ_VALUE 5
#define STM32_PLL1_DIVR_VALUE 5
#define STM32_PLL1_DIVP_VALUE 2
#define STM32_PLL1_DIVQ_VALUE 10
#define STM32_PLL1_DIVR_VALUE 10
#define STM32_PLL2_ENABLED TRUE
#define STM32_PLL2_P_ENABLED TRUE
#define STM32_PLL2_Q_ENABLED TRUE

12
os/hal/ports/STM32/STM32H7xx/hal_lld_type1.h
View File

@ -1705,8 +1705,8 @@
/**
* @brief PLL1 DIVP field.
*/
#if ((STM32_PLL1_DIVP_VALUE >= 1) && (STM32_PLL1_DIVP_VALUE <= 128) && \
(STM32_PLL1_DIVP_VALUE != 3U)) || defined(__DOXYGEN__)
#if ((STM32_PLL1_DIVP_VALUE >= 1) && (STM32_PLL1_DIVP_VALUE <= 128)) && \
((STM32_PLL1_DIVP_VALUE == 1) || ((STM32_PLL1_DIVP_VALUE & 1) == 0))
#define STM32_PLL1_DIVP ((STM32_PLL1_DIVP_VALUE - 1U) << 9U)
#else
#error "invalid STM32_PLL1_DIVP_VALUE value specified"
@ -1715,8 +1715,8 @@
/**
* @brief PLL2 DIVP field.
*/
#if ((STM32_PLL2_DIVP_VALUE >= 1) && (STM32_PLL2_DIVP_VALUE <= 128) && \
(STM32_PLL2_DIVP_VALUE != 3U)) || defined(__DOXYGEN__)
#if ((STM32_PLL2_DIVP_VALUE >= 1) && (STM32_PLL2_DIVP_VALUE <= 128)) || \
defined(__DOXYGEN__)
#define STM32_PLL2_DIVP ((STM32_PLL2_DIVP_VALUE - 1U) << 9U)
#else
#error "invalid STM32_PLL2_DIVP_VALUE value specified"
@ -1725,8 +1725,8 @@
/**
* @brief PLL3 DIVP field.
*/
#if ((STM32_PLL3_DIVP_VALUE >= 1) && (STM32_PLL3_DIVP_VALUE <= 128) && \
(STM32_PLL3_DIVP_VALUE != 3U)) || defined(__DOXYGEN__)
#if ((STM32_PLL3_DIVP_VALUE >= 1) && (STM32_PLL3_DIVP_VALUE <= 128)) || \
defined(__DOXYGEN__)
#define STM32_PLL3_DIVP ((STM32_PLL3_DIVP_VALUE - 1U) << 9U)
#else
#error "invalid STM32_PLL3_DIVP_VALUE value specified"

16
os/hal/ports/STM32/STM32H7xx/hal_lld_type2.h
View File

@ -1660,11 +1660,9 @@
/**
* @brief PLL1 DIVP field.
*/
#if (STM32_PLL1_DIVP_VALUE == 1) || \
((STM32_PLL1_DIVP_VALUE >= 2) && (STM32_PLL1_DIVP_VALUE <= 128) && \
((STM32_PLL1_DIVP_VALUE & 1) == 0)) || \
defined(__DOXYGEN__)
#define STM32_PLL1_DIVP ((STM32_PLL1_DIVP_VALUE - 1U) << RCC_PLL1DIVR_P1_Pos)
#if ((STM32_PLL1_DIVP_VALUE >= 1) && (STM32_PLL1_DIVP_VALUE <= 128)) && \
((STM32_PLL1_DIVP_VALUE == 1) || ((STM32_PLL1_DIVP_VALUE & 1) == 0))
#define STM32_PLL1_DIVP ((STM32_PLL1_DIVP_VALUE - 1U) << 9U)
#else
#error "invalid STM32_PLL1_DIVP_VALUE value specified"
#endif
@ -1672,8 +1670,8 @@
/**
* @brief PLL2 DIVP field.
*/
#if ((STM32_PLL2_DIVP_VALUE >= 1) && (STM32_PLL2_DIVP_VALUE <= 128) && \
(STM32_PLL2_DIVP_VALUE != 3U)) || defined(__DOXYGEN__)
#if ((STM32_PLL2_DIVP_VALUE >= 1) && (STM32_PLL2_DIVP_VALUE <= 128)) || \
defined(__DOXYGEN__)
#define STM32_PLL2_DIVP ((STM32_PLL2_DIVP_VALUE - 1U) << 9U)
#else
#error "invalid STM32_PLL2_DIVP_VALUE value specified"
@ -1682,8 +1680,8 @@
/**
* @brief PLL3 DIVP field.
*/
#if ((STM32_PLL3_DIVP_VALUE >= 1) && (STM32_PLL3_DIVP_VALUE <= 128) && \
(STM32_PLL3_DIVP_VALUE != 3U)) || defined(__DOXYGEN__)
#if ((STM32_PLL3_DIVP_VALUE >= 1) && (STM32_PLL3_DIVP_VALUE <= 128)) || \
defined(__DOXYGEN__)
#define STM32_PLL3_DIVP ((STM32_PLL3_DIVP_VALUE - 1U) << 9U)
#else
#error "invalid STM32_PLL3_DIVP_VALUE value specified"

12
os/hal/ports/STM32/STM32H7xx/hal_lld_type3.h
View File

@ -1725,11 +1725,9 @@
/**
* @brief PLL1 DIVP field.
*/
#if (STM32_PLL1_DIVP_VALUE == 1) || \
((STM32_PLL1_DIVP_VALUE >= 2) && (STM32_PLL1_DIVP_VALUE <= 128) && \
((STM32_PLL1_DIVP_VALUE & 1) == 0)) || \
defined(__DOXYGEN__)
#define STM32_PLL1_DIVP ((STM32_PLL1_DIVP_VALUE - 1U) << RCC_PLL1DIVR_P1_Pos)
#if (STM32_PLL1_DIVP_VALUE >= 1) && (STM32_PLL1_DIVP_VALUE <= 128) && \
((STM32_PLL1_DIVP_VALUE & 1) == 0)
#define STM32_PLL1_DIVP ((STM32_PLL1_DIVP_VALUE - 1U) << 9U)
#else
#error "invalid STM32_PLL1_DIVP_VALUE value specified"
#endif
@ -1739,7 +1737,7 @@
*/
#if ((STM32_PLL2_DIVP_VALUE >= 1) && (STM32_PLL2_DIVP_VALUE <= 128)) || \
defined(__DOXYGEN__)
#define STM32_PLL2_DIVP ((STM32_PLL2_DIVP_VALUE - 1U) << RCC_PLL2DIVR_P2_Pos)
#define STM32_PLL2_DIVP ((STM32_PLL2_DIVP_VALUE - 1U) << 9U)
#else
#error "invalid STM32_PLL2_DIVP_VALUE value specified"
#endif
@ -1749,7 +1747,7 @@
*/
#if ((STM32_PLL3_DIVP_VALUE >= 1) && (STM32_PLL3_DIVP_VALUE <= 128)) || \
defined(__DOXYGEN__)
#define STM32_PLL3_DIVP ((STM32_PLL3_DIVP_VALUE - 1U) << RCC_PLL3DIVR_P3_Pos)
#define STM32_PLL3_DIVP ((STM32_PLL3_DIVP_VALUE - 1U) << 9U)
#else
#error "invalid STM32_PLL3_DIVP_VALUE value specified"
#endif

2
readme.txt
View File

@ -107,6 +107,8 @@
instead of a simple size.
- NEW: RT and NIL upgraded to support the enhanced OSLIB.
- NEW: Memory areas/pointers checker functions added to OSLIB.
- FIX: Fixed invalid checks on PLLP/R/Q dividers on STM32H7 (bug #1253)
(backported to 20.3.5)(backported to 21.11.4).
- FIX: Fixed remote wakeup failure in STM32 OTGv1 driver (bug #1252)
(backported to 20.3.5)(backported to 21.11.4).
- FIX: Fixed wrong use of hooks in RT/NIL (bug #1251)