STM32F7 working... almost.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8151 35acf78f-673a-0410-8e92-d51de3d6d3f4
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@ -494,6 +494,8 @@
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/* Port-specific settings (override port settings defaulted in chcore.h). */
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/*===========================================================================*/
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#define CORTEX_VTOR_INIT 0x08000000U
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#endif /* _CHCONF_H_ */
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/** @} */
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@ -100,7 +100,7 @@ void _pal_lld_init(const PALConfig *config) {
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rccEnableAHB(AHB_EN_MASK, TRUE);
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#elif defined(STM32F3XX) || defined(STM32F37X)
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rccEnableAHB(AHB_EN_MASK, TRUE);
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#elif defined(STM32F2XX) || defined(STM32F4XX)
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#elif defined(STM32F2XX) || defined(STM32F4XX) || defined(STM32F7XX)
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RCC->AHB1ENR |= AHB1_EN_MASK;
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RCC->AHB1LPENR |= AHB1_LPEN_MASK;
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#endif
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@ -135,6 +135,12 @@ void _pal_lld_init(const PALConfig *config) {
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#if STM32_HAS_GPIOI
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initgpio(GPIOI, &config->PIData);
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#endif
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#if STM32_HAS_GPIOJ
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initgpio(GPIOJ, &config->PJData);
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#endif
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#if STM32_HAS_GPIOK
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initgpio(GPIOK, &config->PKData);
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#endif
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}
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/**
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@ -363,6 +363,20 @@ typedef stm32_gpio_t * ioportid_t;
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#define IOPORT9 GPIOI
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#endif
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/**
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* @brief GPIO port J identifier.
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*/
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#if STM32_HAS_GPIOJ || defined(__DOXYGEN__)
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#define IOPORT10 GPIOJ
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#endif
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/**
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* @brief GPIO port K identifier.
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*/
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#if STM32_HAS_GPIOK || defined(__DOXYGEN__)
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#define IOPORT11 GPIOK
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#endif
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/*===========================================================================*/
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/* Implementation, some of the following macros could be implemented as */
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/* functions, if so please put them in pal_lld.c. */
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