git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@13760 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
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@ -105,7 +105,7 @@ include $(CHIBIOS)/os/hal/boards/ST_NUCLEO144_L552ZE/board.mk
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include $(CHIBIOS)/os/hal/osal/rt-nil/osal.mk
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# RTOS files (optional).
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include $(CHIBIOS)/os/rt/rt.mk
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include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v8m-ml.mk
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include $(CHIBIOS)/os/common/ports/ARMv8-M-ML/compilers/GCC/mk/port.mk
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# Auto-build files in ./source recursively.
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include $(CHIBIOS)/tools/mk/autobuild.mk
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# Other files (optional).
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@ -314,34 +314,34 @@ typedef uint64_t stkalign_t;
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* @note It is implemented to match the Cortex-Mx exception context.
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*/
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struct port_extctx {
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uint32_t r0;
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uint32_t r1;
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uint32_t r2;
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uint32_t r3;
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uint32_t r12;
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uint32_t lr_thd;
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uint32_t pc;
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uint32_t xpsr;
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#if CORTEX_USE_FPU
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uint32_t s0;
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uint32_t s1;
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uint32_t s2;
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uint32_t s3;
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uint32_t s4;
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uint32_t s5;
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uint32_t s6;
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uint32_t s7;
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uint32_t s8;
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uint32_t s9;
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uint32_t s10;
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uint32_t s11;
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uint32_t s12;
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uint32_t s13;
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uint32_t s14;
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uint32_t s15;
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uint32_t fpscr;
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uint32_t reserved;
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#endif /* CORTEX_USE_FPU */
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uint32_t r0;
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uint32_t r1;
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uint32_t r2;
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uint32_t r3;
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uint32_t r12;
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uint32_t lr_thd;
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uint32_t pc;
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uint32_t xpsr;
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#if (CORTEX_USE_FPU == TRUE) || defined(__DOXYGEN__)
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uint32_t s0;
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uint32_t s1;
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uint32_t s2;
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uint32_t s3;
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uint32_t s4;
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uint32_t s5;
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uint32_t s6;
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uint32_t s7;
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uint32_t s8;
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uint32_t s9;
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uint32_t s10;
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uint32_t s11;
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uint32_t s12;
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uint32_t s13;
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uint32_t s14;
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uint32_t s15;
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uint32_t fpscr;
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uint32_t reserved;
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#endif /* CORTEX_USE_FPU == TRUE */
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};
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/**
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@ -350,33 +350,36 @@ struct port_extctx {
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* switch.
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*/
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struct port_intctx {
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#if CORTEX_USE_FPU
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uint32_t s16;
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uint32_t s17;
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uint32_t s18;
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uint32_t s19;
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uint32_t s20;
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uint32_t s21;
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uint32_t s22;
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uint32_t s23;
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uint32_t s24;
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uint32_t s25;
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uint32_t s26;
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uint32_t s27;
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uint32_t s28;
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uint32_t s29;
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uint32_t s30;
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uint32_t s31;
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#endif /* CORTEX_USE_FPU */
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uint32_t r4;
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uint32_t r5;
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uint32_t r6;
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uint32_t r7;
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uint32_t r8;
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uint32_t r9;
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uint32_t r10;
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uint32_t r11;
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uint32_t lr;
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#if (CH_DBG_ENABLE_STACK_CHECK == TRUE) || defined(__DOXYGEN__)
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uint32_t splim;
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#endif
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#if (CORTEX_USE_FPU == TRUE) || defined(__DOXYGEN__)
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uint32_t s16;
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uint32_t s17;
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uint32_t s18;
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uint32_t s19;
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uint32_t s20;
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uint32_t s21;
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uint32_t s22;
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uint32_t s23;
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uint32_t s24;
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uint32_t s25;
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uint32_t s26;
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uint32_t s27;
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uint32_t s28;
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uint32_t s29;
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uint32_t s30;
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uint32_t s31;
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#endif /* CORTEX_USE_FPU == TRUE */
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uint32_t r4;
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uint32_t r5;
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uint32_t r6;
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uint32_t r7;
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uint32_t r8;
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uint32_t r9;
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uint32_t r10;
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uint32_t r11;
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uint32_t lr;
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};
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/**
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@ -407,6 +410,31 @@ struct port_context {
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#define PORT_IRQ_IS_VALID_KERNEL_PRIORITY(n) \
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(((n) >= CORTEX_MAX_KERNEL_PRIORITY) && ((n) < CORTEX_PRIORITY_LEVELS))
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/**
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* @brief Initialization of stack check part of thread context.
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*/
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#if (CH_DBG_ENABLE_STACK_CHECK == TRUE) || defined(__DOXYGEN__)
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#define PORT_SETUP_CONTEXT_SPLIM(tp, wbase) \
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(tp)->ctx.sp->splim = (uint32_t)(wbase)
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#else
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#define PORT_SETUP_CONTEXT_SPLIM(tp, wbase)
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#endif
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/**
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* @brief Initialization of FPU part of thread context.
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*/
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#if (CORTEX_USE_FPU == TRUE) || defined(__DOXYGEN__)
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#define PORT_SETUP_CONTEXT_FPU(tp) \
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(tp)->ctx.sp->fpscr = (uint32_t)0
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#else
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#define PORT_SETUP_CONTEXT_FPU(tp)
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#endif
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/**
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* @brief Initialization of MPU part of thread context.
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*/
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#define PORT_SETUP_CONTEXT_MPU(tp)
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/**
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* @brief Platform dependent part of the @p chThdCreateI() API.
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* @details This code usually setup the context switching frame represented
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@ -418,6 +446,9 @@ struct port_context {
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(tp)->ctx.sp->r4 = (uint32_t)(pf); \
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(tp)->ctx.sp->r5 = (uint32_t)(arg); \
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(tp)->ctx.sp->lr = (uint32_t)__port_thread_start; \
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PORT_SETUP_CONTEXT_SPLIM(tp, wbase); \
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PORT_SETUP_CONTEXT_FPU(tp); \
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PORT_SETUP_CONTEXT_MPU(tp); \
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} while (0)
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/**
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@ -89,8 +89,24 @@ __port_switch:
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/* Saving FPU context.*/
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vpush {s16-s31}
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#endif
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#if CH_DBG_ENABLE_STACK_CHECK
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/* Saving stack limit register.*/
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mrs r3, PSPLIM
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push {r3}
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movs r3, #0
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msr PSPLIM, r3 /* Temporarily disabling stack check.*/
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#endif
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/* Switching stacks.*/
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str sp, [r1, #CONTEXT_OFFSET]
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ldr sp, [r0, #CONTEXT_OFFSET]
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#if CH_DBG_ENABLE_STACK_CHECK
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pop {r3}
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msr PSPLIM, r3
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#endif
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#if CORTEX_USE_FPU
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/* Restoring FPU context.*/
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vpop {s16-s31}
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#endif
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bl chSchDoPreemption
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#if CH_DBG_SYSTEM_STATE_CHECK
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bl _dbg_check_unlock
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bl __dbg_check_unlock
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#endif
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#if CH_DBG_STATISTICS
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bl __stats_stop_measure_crit_thd
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