Fixed bug #1089.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@13600 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
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@ -514,7 +514,7 @@ void adc_lld_start_conversion(ADCDriver *adcp) {
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uint32_t dmamode, cfgr;
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const ADCConversionGroup *grpp = adcp->grpp;
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#if STM32_ADC_DUAL_MODE
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uint32_t ccr = grpp->ccr & ~(ADC_CCR_CKMODE_MASK | ADC_CCR_MDMA_MASK);
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uint32_t ccr = grpp->ccr & ~(ADC_CCR_CKMODE_MASK | ADC_CCR_DUAL_MASK);
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#endif
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osalDbgAssert(!STM32_ADC_DUAL_MODE || ((grpp->num_channels & 1) == 0),
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@ -557,7 +557,7 @@ void adc_lld_start_conversion(ADCDriver *adcp) {
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in the conversion group configuration structure, static settings are
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preserved.*/
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adcp->adcc->CCR = (adcp->adcc->CCR &
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(ADC_CCR_CKMODE_MASK | ADC_CCR_MDMA_MASK)) | ccr;
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(ADC_CCR_CKMODE_MASK | ADC_CCR_DUAL_MASK)) | ccr;
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adcp->adcm->CFGR2 = grpp->cfgr2;
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adcp->adcm->PCSEL = grpp->pcsel;
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@ -574,13 +574,13 @@ void adc_lld_start_conversion(ADCDriver *adcp) {
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adcp->adcm->SQR3 = grpp->sqr[2];
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adcp->adcm->SQR4 = grpp->sqr[3];
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adcp->adcs->CFGR2 = grpp->cfgr2;
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adcp->adcs->PCSEL = grpp->spcsel;
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adcp->adcs->LTR1 = grpp->sltr1;
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adcp->adcs->HTR1 = grpp->shtr1;
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adcp->adcs->LTR1 = grpp->sltr2;
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adcp->adcs->HTR1 = grpp->shtr2;
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adcp->adcs->LTR1 = grpp->sltr3;
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adcp->adcs->HTR1 = grpp->shtr3;
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adcp->adcs->PCSEL = grpp->pcsel;
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adcp->adcs->LTR1 = grpp->ltr1;
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adcp->adcs->HTR1 = grpp->htr1;
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adcp->adcs->LTR1 = grpp->ltr2;
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adcp->adcs->HTR1 = grpp->htr2;
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adcp->adcs->LTR1 = grpp->ltr3;
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adcp->adcs->HTR1 = grpp->htr3;
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adcp->adcs->SMPR1 = grpp->ssmpr[0];
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adcp->adcs->SMPR2 = grpp->ssmpr[1];
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adcp->adcs->SQR1 = grpp->ssqr[0] | ADC_SQR1_NUM_CH(grpp->num_channels / 2);
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@ -289,11 +289,6 @@
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#error "STM32_ADC3_NUMBER not defined in registry"
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#endif
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/* Units checks related to dual mode.*/
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#if STM32_ADC_DUAL_MODE && STM32_ADC_USE_ADC1 && !STM32_HAS_ADC2
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#error "ADC2 not present in the selected device, required for dual mode"
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#endif
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/* At least one ADC must be assigned.*/
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#if !STM32_ADC_USE_ADC12 && !STM32_ADC_USE_ADC3
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#error "ADC driver activated but no ADC peripheral assigned"
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@ -525,7 +520,6 @@ typedef union {
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uint32_t cfgr2; \
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uint32_t ccr; \
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uint32_t pcsel; \
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uint32_t difsel; \
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uint32_t ltr1; \
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uint32_t htr1; \
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uint32_t ltr2; \
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@ -86,6 +86,8 @@
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MEMS Accelerometers.
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- NEW: Safer messages mechanism for sandboxes (to be backported to 20.3.1).
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- NEW: Added latency measurement test application.
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- FIX: Fixed STM32H7xx ADC problem in dual mode (bug #1089)
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(backported to 20.3.1)(backported to 19.1.4).
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- FIX: Fixed invalid CHSEL DMA setting in STM32 UART drivers (bug #1088)
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(backported to 20.3.1)(backported to 19.1.4).
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- FIX: Fixed wrong arguments for the cacheBufferInvalidate in the STM32 SPI
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