Demo working now.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2420 35acf78f-673a-0410-8e92-d51de3d6d3f4
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@ -95,24 +95,11 @@ static const SPIConfig spicfg = {
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* calculated as average of the last sampling operations.
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* calculated as average of the last sampling operations.
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*/
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*/
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static void pwmpcb(PWMDriver *pwmp) {
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static void pwmpcb(PWMDriver *pwmp) {
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adcsample_t avg_ch1, avg_ch2;
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/* Calculates the average values from the previous ADC sampling
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operation.*/
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avg_ch1 = (samples[0] + samples[2] + samples[4] + samples[6]) / 4;
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avg_ch2 = (samples[1] + samples[3] + samples[5] + samples[7]) / 4;
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chSysLockFromIsr();
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/* Changes the channels pulse width, the change will be effective
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starting from the next cycle.*/
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pwmEnableChannelI(pwmp, 2, PWM_FRACTION_TO_WIDTH(pwmp, 4096, avg_ch1));
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pwmEnableChannelI(pwmp, 3, PWM_FRACTION_TO_WIDTH(pwmp, 4096, avg_ch2));
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/* Starts an asynchronous ADC conversion operation, the conversion
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/* Starts an asynchronous ADC conversion operation, the conversion
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will be executed in parallel to the current PWM cycle and will
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will be executed in parallel to the current PWM cycle and will
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terminate before the next PWM cycle.*/
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terminate before the next PWM cycle.*/
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chSysLockFromIsr();
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adcStartConversionI(&ADCD1, &adcgrpcfg, samples, ADC_GRP1_BUF_DEPTH);
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adcStartConversionI(&ADCD1, &adcgrpcfg, samples, ADC_GRP1_BUF_DEPTH);
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chSysUnlockFromIsr();
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chSysUnlockFromIsr();
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}
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}
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@ -127,10 +114,23 @@ void adccb(ADCDriver *adcp, adcsample_t *buffer, size_t n) {
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/* Note, only in the ADC_COMPLETE state because the ADC driver fires an
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/* Note, only in the ADC_COMPLETE state because the ADC driver fires an
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intermediate callback when the buffer is half full.*/
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intermediate callback when the buffer is half full.*/
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if (adcp->ad_state == ADC_COMPLETE) {
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if (adcp->ad_state == ADC_COMPLETE) {
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/* SPI slave selection and transmission start.*/
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adcsample_t avg_ch1, avg_ch2;
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/* Calculates the average values from the ADC samples.*/
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avg_ch1 = (samples[0] + samples[2] + samples[4] + samples[6]) / 4;
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avg_ch2 = (samples[1] + samples[3] + samples[5] + samples[7]) / 4;
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chSysLockFromIsr();
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chSysLockFromIsr();
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/* Changes the channels pulse width, the change will be effective
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starting from the next cycle.*/
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pwmEnableChannelI(&PWMD3, 2, PWM_FRACTION_TO_WIDTH(&PWMD3, 4096, avg_ch1));
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pwmEnableChannelI(&PWMD3, 3, PWM_FRACTION_TO_WIDTH(&PWMD3, 4096, avg_ch2));
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/* SPI slave selection and transmission start.*/
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spiSelectI(&SPID1);
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spiSelectI(&SPID1);
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spiStartSendI(&SPID1, ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH, samples);
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spiStartSendI(&SPID1, ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH, samples);
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chSysUnlockFromIsr();
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chSysUnlockFromIsr();
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}
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}
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}
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}
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