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RP WDGv1 basic - to be tested 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@14203 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
This commit is contained in:
cinsights 2021-04-16 13:44:03 +00:00
parent dc69895565
commit b23fe5dcfe
3 changed files with 7 additions and 21 deletions
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8
os/hal/ports/RP/LLD/WDGv1/hal_wdg_lld.c
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@ -1,5 +1,5 @@
/* /*
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio ChibiOS - Copyright (C) 2006..2021 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License"); Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License. you may not use this file except in compliance with the License.
@ -81,13 +81,11 @@ void wdg_lld_start(WDGDriver *wdgp) {
/* Set the time. */ /* Set the time. */
uint32_t time = wdgp->wdg->config.rlr; uint32_t time = wdgp->wdg->config.rlr;
/* Due to a silicon bug (see errata RP2040-E1) WDG counts down at each edge. */ /* Due to a silicon bug (see errata RP2040-E1) WDG decrements at each edge. */
time = ((time == 0U) ? 50 : time) * 2 * 1000; time = ((time == 0U) ? 50 : time) * 2 * 1000;
/* Set ceiling if greater than count capability. */ /* Set ceiling if greater than count capability. */
if (time > WATCHDOG_CTRL_TIME) { time = (time > WATCHDOG_CTRL_TIME) ? WATCHDOG_CTRL_TIME : time;
time = WATCHDOG_CTRL_TIME;
}
/* Set the initial interval, state, control bits and enable WDG. */ /* Set the initial interval, state, control bits and enable WDG. */
wdgp->wdg->LOAD = time; wdgp->wdg->LOAD = time;

17
os/hal/ports/RP/LLD/WDGv1/hal_wdg_lld.h
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@ -1,5 +1,5 @@
/* /*
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio ChibiOS - Copyright (C) 2006..2021 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License"); Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License. you may not use this file except in compliance with the License.
@ -16,7 +16,7 @@
/** /**
* @file hal_wdg_lld.h * @file hal_wdg_lld.h
* @brief WDG Driver subsystem low level driver header template. * @brief WDG driver subsystem low level driver header.
* *
* @addtogroup WDG * @addtogroup WDG
* @{ * @{
@ -40,19 +40,6 @@
/* Driver pre-compile time settings. */ /* Driver pre-compile time settings. */
/*===========================================================================*/ /*===========================================================================*/
/**
* @name Configuration options
* @{
*/
/**
* @brief WDG1 driver enable switch.
* @note The default is @p FALSE.
*/
#if !defined(PLATFORM_WDG_USE_WDG1) || defined(__DOXYGEN__)
#define PLATFORM_WDG_USE_WDG1 FALSE
#endif
/** @} */
/*===========================================================================*/ /*===========================================================================*/
/* Derived constants and error checks. */ /* Derived constants and error checks. */
/*===========================================================================*/ /*===========================================================================*/

1
os/hal/ports/RP/RP2040/platform.mk
View File

@ -30,6 +30,7 @@ include $(CHIBIOS)/os/hal/ports/RP/LLD/GPIOv1/driver.mk
include $(CHIBIOS)/os/hal/ports/RP/LLD/TIMERv1/driver.mk include $(CHIBIOS)/os/hal/ports/RP/LLD/TIMERv1/driver.mk
include $(CHIBIOS)/os/hal/ports/RP/LLD/UARTv1/driver.mk include $(CHIBIOS)/os/hal/ports/RP/LLD/UARTv1/driver.mk
include $(CHIBIOS)/os/hal/ports/RP/LLD/RTCv1/driver.mk include $(CHIBIOS)/os/hal/ports/RP/LLD/RTCv1/driver.mk
include $(CHIBIOS)/os/hal/ports/RP/LLD/WDGv1/driver.mk
# Shared variables # Shared variables
ALLCSRC += $(PLATFORMSRC) ALLCSRC += $(PLATFORMSRC)