I2S starts doing something.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/kernel_3_dev@6750 35acf78f-673a-0410-8e92-d51de3d6d3f4
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@ -195,6 +195,7 @@ void i2s_lld_init(void) {
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I2SD2.dmarx = STM32_DMA_STREAM(STM32_I2S_SPI2_RX_DMA_STREAM);
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I2SD2.rxdmamode = STM32_DMA_CR_CHSEL(I2S2_RX_DMA_CHANNEL) |
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STM32_DMA_CR_PL(STM32_I2S_SPI2_DMA_PRIORITY) |
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STM32_DMA_CR_MSIZE_HWORD |
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STM32_DMA_CR_DIR_P2M |
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STM32_DMA_CR_MINC |
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STM32_DMA_CR_CIRC |
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@ -210,6 +211,7 @@ void i2s_lld_init(void) {
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I2SD2.dmatx = STM32_DMA_STREAM(STM32_I2S_SPI2_TX_DMA_STREAM);
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I2SD2.txdmamode = STM32_DMA_CR_CHSEL(I2S2_TX_DMA_CHANNEL) |
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STM32_DMA_CR_PL(STM32_I2S_SPI2_DMA_PRIORITY) |
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STM32_DMA_CR_MSIZE_HWORD |
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STM32_DMA_CR_DIR_M2P |
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STM32_DMA_CR_MINC |
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STM32_DMA_CR_CIRC |
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@ -231,6 +233,7 @@ void i2s_lld_init(void) {
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I2SD3.dmarx = STM32_DMA_STREAM(STM32_I2S_SPI3_RX_DMA_STREAM);
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I2SD3.rxdmamode = STM32_DMA_CR_CHSEL(I2S3_RX_DMA_CHANNEL) |
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STM32_DMA_CR_PL(STM32_I2S_SPI3_DMA_PRIORITY) |
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STM32_DMA_CR_MSIZE_HWORD |
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STM32_DMA_CR_DIR_P2M |
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STM32_DMA_CR_MINC |
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STM32_DMA_CR_CIRC |
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@ -246,6 +249,7 @@ void i2s_lld_init(void) {
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I2SD3.dmatx = STM32_DMA_STREAM(STM32_I2S_SPI3_TX_DMA_STREAM);
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I2SD3.txdmamode = STM32_DMA_CR_CHSEL(I2S3_TX_DMA_CHANNEL) |
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STM32_DMA_CR_PL(STM32_I2S_SPI3_DMA_PRIORITY) |
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STM32_DMA_CR_MSIZE_HWORD |
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STM32_DMA_CR_DIR_M2P |
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STM32_DMA_CR_MINC |
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STM32_DMA_CR_CIRC |
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@ -271,7 +275,6 @@ void i2s_lld_start(I2SDriver *i2sp) {
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/* If in stopped state then enables the SPI and DMA clocks.*/
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if (i2sp->state == I2S_STOP) {
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uint32_t dmasize;
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#if STM32_I2S_USE_SPI2
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if (&I2SD2 == i2sp) {
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@ -336,14 +339,14 @@ void i2s_lld_start(I2SDriver *i2sp) {
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}
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#endif
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/* DMA configuration.*/
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if ((i2sp->config->i2scfgr & (SPI_I2SCFGR_DATLEN |
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SPI_I2SCFGR_CHLEN)) == 0)
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dmasize = STM32_DMA_CR_PSIZE_HWORD | STM32_DMA_CR_MSIZE_HWORD;
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else
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dmasize = STM32_DMA_CR_PSIZE_WORD | STM32_DMA_CR_MSIZE_WORD;
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dmaStreamSetMode(i2sp->dmarx, i2sp->rxdmamode | dmasize);
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dmaStreamSetMode(i2sp->dmatx, i2sp->txdmamode | dmasize);
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if (NULL != i2sp->dmarx) {
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dmaStreamSetMode(i2sp->dmarx, i2sp->rxdmamode);
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dmaStreamSetPeripheral(i2sp->dmarx, &i2sp->spi->DR);
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}
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if (NULL != i2sp->dmatx) {
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dmaStreamSetMode(i2sp->dmatx, i2sp->txdmamode);
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dmaStreamSetPeripheral(i2sp->dmatx, &i2sp->spi->DR);
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}
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}
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/* I2S (re)configuration.*/
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@ -389,18 +392,24 @@ void i2s_lld_stop(I2SDriver *i2sp) {
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* @notapi
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*/
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void i2s_lld_start_exchange(I2SDriver *i2sp) {
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size_t size = i2sp->config->size;
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/* In 32 bit modes the DMA has to perform double operations because fetches
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are always performed using 16 bit accesses.*/
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if ((i2sp->config->i2scfgr & (SPI_I2SCFGR_DATLEN | SPI_I2SCFGR_CHLEN)) != 0)
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size *= 2;
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/* RX DMA setup.*/
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if (NULL != i2sp->dmarx) {
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dmaStreamSetMemory0(i2sp->dmarx, i2sp->config->rx_buffer);
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dmaStreamSetTransactionSize(i2sp->dmarx, i2sp->config->size);
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dmaStreamSetTransactionSize(i2sp->dmarx, size);
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dmaStreamEnable(i2sp->dmarx);
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}
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/* TX DMA setup.*/
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if (NULL != i2sp->dmatx) {
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dmaStreamSetMemory0(i2sp->dmatx, i2sp->config->tx_buffer);
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dmaStreamSetTransactionSize(i2sp->dmatx, i2sp->config->size);
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dmaStreamSetTransactionSize(i2sp->dmatx, size);
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dmaStreamEnable(i2sp->dmatx);
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}
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@ -58,6 +58,8 @@ int main(void) {
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* Starting and configuring the I2S driver 2.
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*/
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i2sStart(&I2SD2, &i2scfg);
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palSetPadMode(GPIOB, 10, PAL_MODE_ALTERNATE(5));
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palSetPadMode(GPIOC, 3, PAL_MODE_ALTERNATE(5));
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/*
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* Starting continuous I2S transfer.
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