git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@13029 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
This commit is contained in:
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efc3539edf
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c50b64792e
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@ -47,12 +47,12 @@
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#define STM32_HSI16_ENABLED TRUE
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#define STM32_HSI48_ENABLED TRUE
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#define STM32_HSE_ENABLED TRUE
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#define STM32_LSI_ENABLED TRUE
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#define STM32_LSI_ENABLED FALSE
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#define STM32_LSE_ENABLED TRUE
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#define STM32_SW STM32_SW_PLLRCLK
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#define STM32_PLLSRC STM32_PLLSRC_HSI16
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#define STM32_PLLM_VALUE 4
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#define STM32_PLLN_VALUE 84
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#define STM32_PLLSRC STM32_PLLSRC_HSE
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#define STM32_PLLM_VALUE 6
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#define STM32_PLLN_VALUE 85
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#define STM32_PLLPDIV_VALUE 0
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#define STM32_PLLP_VALUE 7
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#define STM32_PLLQ_VALUE 8
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@ -145,6 +145,17 @@
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/*
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* GPT driver system settings.
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*/
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#define STM32_GPT_USE_TIM1 FALSE
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#define STM32_GPT_USE_TIM2 FALSE
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#define STM32_GPT_USE_TIM3 FALSE
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#define STM32_GPT_USE_TIM4 FALSE
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#define STM32_GPT_USE_TIM5 FALSE
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#define STM32_GPT_USE_TIM6 FALSE
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#define STM32_GPT_USE_TIM7 FALSE
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#define STM32_GPT_USE_TIM8 FALSE
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#define STM32_GPT_USE_TIM15 FALSE
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#define STM32_GPT_USE_TIM16 FALSE
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#define STM32_GPT_USE_TIM17 FALSE
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/*
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* I2C driver system settings.
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@ -14,11 +14,10 @@
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limitations under the License.
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*/
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#if 0
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#include "ch.h"
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#include "hal.h"
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#include "rt_test_root.h"
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#include "oslib_test_root.h"
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//#include "rt_test_root.h"
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//#include "oslib_test_root.h"
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/*
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* Green LED blinker thread, times are in milliseconds.
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@ -35,7 +34,6 @@ static THD_FUNCTION(Thread1, arg) {
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chThdSleepMilliseconds(500);
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}
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}
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#endif
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/*
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* Application entry point.
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@ -49,28 +47,28 @@ int main(void) {
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* - Kernel initialization, the main() function becomes a thread and the
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* RTOS is active.
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*/
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// halInit();
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// chSysInit();
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halInit();
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chSysInit();
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/*
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* Activates the serial driver 2 using the driver default configuration.
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*/
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// sdStart(&SD2, NULL);
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// sdStart(&LPSD1, NULL);
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/*
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* Creates the blinker thread.
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*/
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// chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL);
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chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL);
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/*
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* Normal main() thread activity, in this demo it does nothing except
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* sleeping in a loop and check the button state.
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*/
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while (1) {//true) {
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// if (!palReadLine(LINE_BUTTON)) {
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// test_execute((BaseSequentialStream *)&SD2, &rt_test_suite);
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// test_execute((BaseSequentialStream *)&SD2, &oslib_test_suite);
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// }
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// chThdSleepMilliseconds(500);
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if (!palReadLine(LINE_BUTTON)) {
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// test_execute((BaseSequentialStream *)&LPSD1, &rt_test_suite);
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// test_execute((BaseSequentialStream *)&LPSD1, &oslib_test_suite);
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}
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chThdSleepMilliseconds(500);
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}
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}
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@ -26,45 +26,48 @@
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/* Driver local definitions. */
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/*===========================================================================*/
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#if defined(STM32_TIM1_IS_USED) || defined(STM32_TIM15_IS_USED) || \
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defined(STM32_TIM16_IS_USED) || defined(STM32_TIM17_IS_USED) || \
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defined(__DOXYGEN__)
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/**
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* @brief IRQ vectors initialization.
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*/
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#define STM32_TIM1_TIM15_TIM16_TIM17_INIT() do { \
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nvicEnableVector(STM32_TIM1_BRK_TIM15_NUMBER, \
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STM32_IRQ_TIM1_BRK_TIM15_PRIORITY); \
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nvicEnableVector(STM32_TIM1_UP_TIM16_NUMBER, \
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STM32_IRQ_TIM1_UP_TIM16_PRIORITY); \
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nvicEnableVector(STM32_TIM1_TRGCO_TIM17_NUMBER, \
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STM32_IRQ_TIM1_TRGCO_TIM17_PRIORITY); \
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nvicEnableVector(STM32_TIM1_CC_NUMBER, \
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STM32_IRQ_TIM1_CC_PRIORITY); \
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} while (0)
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/**
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* @brief IRQ vectors de-initialization.
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*/
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#define STM32_TIM1_TIM15_TIM16_TIM17_DEINIT() do { \
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nvicDisableVector(STM32_TIM1_BRK_TIM15_NUMBER); \
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nvicDisableVector(STM32_TIM1_UP_TIM16_NUMBER); \
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nvicDisableVector(STM32_TIM1_TRGCO_TIM17_NUMBER); \
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nvicDisableVector(STM32_TIM1_CC_NUMBER); \
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} while (0)
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#else
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#define STM32_TIM1_TIM15_TIM16_TIM17_INIT()
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#define STM32_TIM1_TIM15_TIM16_TIM17_DEINIT()
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#endif
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/*===========================================================================*/
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/* Derived constants and error checks. */
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/*===========================================================================*/
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/* Registry checks for robustness.*/
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#if !defined(STM32_HAS_TIM1)
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#error "STM32_HAS_TIM1 not defined in registry"
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#endif
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#if !defined(STM32_HAS_TIM15)
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#error "STM32_HAS_TIM15 not defined in registry"
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#endif
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#if !defined(STM32_HAS_TIM16)
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#error "STM32_HAS_TIM16 not defined in registry"
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#endif
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#if !defined(STM32_HAS_TIM17)
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#error "STM32_HAS_TIM17 not defined in registry"
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#endif
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#if !defined(STM32_IRQ_TIM1_BRK_TIM15_PRIORITY)
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#error "STM32_IRQ_TIM1_BRK_TIM15_PRIORITY not defined in mcuconf.h"
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#endif
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#if STM32_HAS_TIM1 == FALSE
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#error "TIM1 not present"
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#endif
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#if STM32_HAS_TIM15 == FALSE
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#error "TIM15 not present"
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#endif
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#if STM32_HAS_TIM16 == FALSE
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#error "TIM16 not present"
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#endif
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#if STM32_HAS_TIM17 == FALSE
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#error "TIM17 not present"
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#endif
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/* Priority settings checks.*/
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#if !defined(STM32_IRQ_TIM1_UP_TIM16_PRIORITY)
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#error "STM32_IRQ_TIM1_UP_TIM16_PRIORITY not defined in mcuconf.h"
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#endif
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/* Driver local functions. */
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/*===========================================================================*/
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static inline void tim1_tim15_init(void) {
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#if (HAL_USE_GPT && ( STM32_GPT_USE_TIM15)) || \
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(HAL_USE_ICU && ( STM32_ICU_USE_TIM15)) || \
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(HAL_USE_PWM && ( STM32_PWM_USE_TIM15))
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nvicEnableVector(STM32_TIM1_BRK_TIM15_NUMBER,
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STM32_IRQ_TIM1_BRK_TIM15_PRIORITY);
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#endif
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#if (HAL_USE_GPT && (STM32_GPT_USE_TIM1 || STM32_GPT_USE_TIM16)) || \
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(HAL_USE_ICU && (STM32_ICU_USE_TIM1 )) || \
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(HAL_USE_PWM && (STM32_PWM_USE_TIM1 || STM32_PWM_USE_TIM16))
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nvicEnableVector(STM32_TIM1_UP_TIM16_NUMBER,
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STM32_IRQ_TIM1_UP_TIM16_PRIORITY);
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#endif
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#if (HAL_USE_GPT && ( STM32_GPT_USE_TIM17)) || \
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(HAL_USE_PWM && ( STM32_PWM_USE_TIM17))
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nvicEnableVector(STM32_TIM1_TRGCO_TIM17_NUMBER,
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STM32_IRQ_TIM1_TRGCO_TIM17_PRIORITY);
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#endif
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#if (HAL_USE_ICU && (STM32_ICU_USE_TIM1 )) || \
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(HAL_USE_PWM && (STM32_PWM_USE_TIM1 ))
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nvicEnableVector(STM32_TIM1_CC_NUMBER,
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STM32_IRQ_TIM1_CC_PRIORITY);
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#endif
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}
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static inline void tim1_tim15_deinit(void) {
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#if (HAL_USE_GPT && ( STM32_GPT_USE_TIM15)) || \
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(HAL_USE_ICU && ( STM32_ICU_USE_TIM15)) || \
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(HAL_USE_PWM && ( STM32_PWM_USE_TIM15))
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nvicDisableVector(STM32_TIM1_BRK_TIM15_NUMBER);
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#endif
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#if (HAL_USE_GPT && (STM32_GPT_USE_TIM1 || STM32_GPT_USE_TIM16)) || \
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(HAL_USE_ICU && (STM32_ICU_USE_TIM1 )) || \
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(HAL_USE_PWM && (STM32_PWM_USE_TIM1 || STM32_PWM_USE_TIM16))
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nvicDisableVector(STM32_TIM1_UP_TIM16_NUMBER);
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#endif
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#if (HAL_USE_GPT && ( STM32_GPT_USE_TIM17)) || \
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(HAL_USE_PWM && ( STM32_PWM_USE_TIM17))
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nvicDisableVector(STM32_TIM1_TRGCO_TIM17_NUMBER);
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#endif
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#if (HAL_USE_ICU && (STM32_ICU_USE_TIM1 )) || \
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(HAL_USE_PWM && (STM32_PWM_USE_TIM1 ))
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nvicDisableVector(STM32_TIM1_CC_NUMBER);
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#endif
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}
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/*===========================================================================*/
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/* Driver interrupt handlers. */
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/*===========================================================================*/
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#if HAL_USE_GPT || HAL_USE_ICU || HAL_USE_PWM || defined(__DOXYGEN__)
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#if (HAL_USE_GPT && ( STM32_GPT_USE_TIM15)) || \
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(HAL_USE_ICU && ( STM32_ICU_USE_TIM15)) || \
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(HAL_USE_PWM && ( STM32_PWM_USE_TIM15)) || \
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defined(__DOXYGEN__)
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/**
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* @brief TIM1-BRK, TIM15 interrupt handler.
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*
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OSAL_IRQ_EPILOGUE();
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}
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#endif
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#if (HAL_USE_GPT && (STM32_GPT_USE_TIM1 || STM32_GPT_USE_TIM16)) || \
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(HAL_USE_ICU && (STM32_ICU_USE_TIM1 )) || \
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(HAL_USE_PWM && (STM32_PWM_USE_TIM1 || STM32_PWM_USE_TIM16)) || \
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defined(__DOXYGEN__)
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/**
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* @brief TIM1-UP, TIM16 interrupt handler.
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*
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OSAL_IRQ_EPILOGUE();
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}
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#endif
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#if (HAL_USE_GPT && ( STM32_GPT_USE_TIM17)) || \
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(HAL_USE_PWM && ( STM32_PWM_USE_TIM17)) || \
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defined(__DOXYGEN__)
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/**
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* @brief TIM1-TRG-COM, TIM17 interrupt handler.
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*
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@ -197,7 +258,11 @@ OSAL_IRQ_HANDLER(STM32_TIM1_TRGCO_TIM17_HANDLER) {
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OSAL_IRQ_EPILOGUE();
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}
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#endif
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#if (HAL_USE_ICU && (STM32_ICU_USE_TIM1 )) || \
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(HAL_USE_PWM && (STM32_PWM_USE_TIM1 )) || \
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defined(__DOXYGEN__)
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/**
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* @brief TIM1-CC interrupt handler.
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*
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OSAL_IRQ_EPILOGUE();
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}
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#endif /* HAL_USE_GPT || HAL_USE_ICU || HAL_USE_PWM */
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#endif
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/*===========================================================================*/
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/* Driver exported functions. */
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@ -26,30 +26,20 @@
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/* Driver local definitions. */
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/*===========================================================================*/
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#if defined(STM32_TIM2_IS_USED) || defined(__DOXYGEN__)
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/**
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* @brief IRQ vectors initialization.
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*/
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#define STM32_TIM2_TIM2_INIT() do { \
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nvicEnableVector(STM32_TIM2_NUMBER, \
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STM32_IRQ_TIM2_PRIORITY); \
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} while (0)
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/**
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* @brief IRQ vectors de-initialization.
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*/
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#define STM32_TIM2_TIM2_DEINIT() do { \
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nvicDisableVector(STM32_TIM2_NUMBER); \
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} while (0)
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#else
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#define STM32_TIM2_TIM2_INIT()
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#define STM32_TIM2_TIM2_DEINIT()
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#endif
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/*===========================================================================*/
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/* Derived constants and error checks. */
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/*===========================================================================*/
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/* Registry checks for robustness.*/
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#if !defined(STM32_HAS_TIM2)
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#error "STM32_HAS_TIM2 not defined in registry"
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#endif
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#if STM32_HAS_TIM2 == FALSE
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#error "TIM2 not present"
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#endif
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/* Priority settings checks.*/
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#if !defined(STM32_IRQ_TIM2_PRIORITY)
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#error "STM32_IRQ_TIM2_PRIORITY not defined in mcuconf.h"
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#endif
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/* Driver local functions. */
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/*===========================================================================*/
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static inline void tim2_init(void) {
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#if defined(STM32_TIM2_IS_USED)
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nvicEnableVector(STM32_TIM2_NUMBER, STM32_IRQ_TIM2_PRIORITY);
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#endif
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}
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static inline void tim2_deinit(void) {
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#if defined(STM32_TIM2_IS_USED)
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nvicDisableVector(STM32_TIM2_NUMBER);
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#endif
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}
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/*===========================================================================*/
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/* Driver interrupt handlers. */
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/*===========================================================================*/
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#if HAL_USE_GPT || HAL_USE_ICU || HAL_USE_PWM || defined(__DOXYGEN__)
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#if (HAL_USE_GPT && STM32_GPT_USE_TIM2) || \
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(HAL_USE_ICU && STM32_ICU_USE_TIM2) || \
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(HAL_USE_PWM && STM32_PWM_USE_TIM2) || \
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defined(__DOXYGEN__)
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/**
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* @brief TIM2 interrupt handler.
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*
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@ -102,7 +107,7 @@ OSAL_IRQ_HANDLER(STM32_TIM2_HANDLER) {
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OSAL_IRQ_EPILOGUE();
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}
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#endif /* HAL_USE_GPT || HAL_USE_ICU || HAL_USE_PWM */
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#endif
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/*===========================================================================*/
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/* Driver exported functions. */
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@ -26,33 +26,20 @@
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/* Driver local definitions. */
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/*===========================================================================*/
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#if defined(STM32_TIM20_IS_USED) || defined(__DOXYGEN__)
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/**
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* @brief IRQ vectors initialization.
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*/
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#define STM32_TIM20_TIM205_INIT() do { \
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nvicEnableVector(STM32_TIM20_UP_NUMBER, \
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STM32_IRQ_TIM20_UP_PRIORITY); \
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nvicEnableVector(STM32_TIM20_CC_NUMBER, \
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STM32_IRQ_TIM20_CC_PRIORITY); \
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} while (0)
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/**
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* @brief IRQ vectors de-initialization.
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*/
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#define STM32_TIM20_TIM205_DEINIT() do { \
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nvicDisableVector(STM32_TIM20_UP_NUMBER); \
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nvicDisableVector(STM32_TIM20_CC_NUMBER); \
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} while (0)
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#else
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#define STM32_TIM8_TIM20_INIT()
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#define STM32_TIM8_TIM20_DEINIT()
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#endif
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/*===========================================================================*/
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/* Derived constants and error checks. */
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/*===========================================================================*/
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/* Registry checks for robustness.*/
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#if !defined(STM32_HAS_TIM20)
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#error "STM32_HAS_TIM20 not defined in registry"
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#endif
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#if STM32_HAS_TIM20 == FALSE
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#error "TIM20 not present"
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#endif
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/* Priority settings checks.*/
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#if !defined(STM32_IRQ_TIM20_UP_PRIORITY)
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#error "STM32_IRQ_TIM20_UP_PRIORITY not defined in mcuconf.h"
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#endif
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@ -81,11 +68,27 @@
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/* Driver local functions. */
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/*===========================================================================*/
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static inline void tim20_init(void) {
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#if defined(STM32_TIM20_IS_USED)
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nvicEnableVector(STM32_TIM20_UP_NUMBER, STM32_IRQ_TIM20_UP_PRIORITY);
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nvicEnableVector(STM32_TIM20_CC_NUMBER, STM32_IRQ_TIM20_CC_PRIORITY);
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#endif
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}
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static inline void tim20_deinit(void) {
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#if defined(STM32_TIM20_IS_USED)
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nvicDisableVector(STM32_TIM20_UP_NUMBER);
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nvicDisableVector(STM32_TIM20_CC_NUMBER);
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#endif
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}
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/*===========================================================================*/
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/* Driver interrupt handlers. */
|
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/*===========================================================================*/
|
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|
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#if HAL_USE_GPT || HAL_USE_ICU || HAL_USE_PWM || defined(__DOXYGEN__)
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#if (HAL_USE_ICU && STM32_ICU_USE_TIM20) || \
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(HAL_USE_PWM && STM32_PWM_USE_TIM20) || \
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defined(__DOXYGEN__)
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/**
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* @brief TIM20-UP interrupt handler.
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*
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|
@ -96,9 +99,7 @@ OSAL_IRQ_HANDLER(STM32_TIM20_UP_HANDLER) {
|
|||
OSAL_IRQ_PROLOGUE();
|
||||
|
||||
#if HAL_USE_GPT
|
||||
#if STM32_GPT_USE_TIM20
|
||||
gpt_lld_serve_interrupt(&GPTD20);
|
||||
#endif
|
||||
/* Not used by GPT.*/
|
||||
#endif
|
||||
#if HAL_USE_ICU
|
||||
#if STM32_ICU_USE_TIM20
|
||||
|
@ -113,7 +114,11 @@ OSAL_IRQ_HANDLER(STM32_TIM20_UP_HANDLER) {
|
|||
|
||||
OSAL_IRQ_EPILOGUE();
|
||||
}
|
||||
#endif
|
||||
|
||||
#if (HAL_USE_ICU && STM32_ICU_USE_TIM20) || \
|
||||
(HAL_USE_PWM && STM32_PWM_USE_TIM20) || \
|
||||
defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief TIM20-CC interrupt handler.
|
||||
*
|
||||
|
|
|
@ -26,30 +26,20 @@
|
|||
/* Driver local definitions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if defined(STM32_TIM3_IS_USED) || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief IRQ vectors initialization.
|
||||
*/
|
||||
#define STM32_TIM3_TIM3_INIT() do { \
|
||||
nvicEnableVector(STM32_TIM3_NUMBER, \
|
||||
STM32_IRQ_TIM3_PRIORITY); \
|
||||
} while (0)
|
||||
|
||||
/**
|
||||
* @brief IRQ vectors de-initialization.
|
||||
*/
|
||||
#define STM32_TIM3_TIM3_DEINIT() do { \
|
||||
nvicDisableVector(STM32_TIM3_NUMBER); \
|
||||
} while (0)
|
||||
#else
|
||||
#define STM32_TIM3_TIM3_INIT()
|
||||
#define STM32_TIM3_TIM3_DEINIT()
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Derived constants and error checks. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/* Registry checks for robustness.*/
|
||||
#if !defined(STM32_HAS_TIM3)
|
||||
#error "STM32_HAS_TIM3 not defined in registry"
|
||||
#endif
|
||||
|
||||
#if STM32_HAS_TIM3 == FALSE
|
||||
#error "TIM3 not present"
|
||||
#endif
|
||||
|
||||
/* Priority settings checks.*/
|
||||
#if !defined(STM32_IRQ_TIM3_PRIORITY)
|
||||
#error "STM32_IRQ_TIM3_PRIORITY not defined in mcuconf.h"
|
||||
#endif
|
||||
|
@ -70,11 +60,26 @@
|
|||
/* Driver local functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
static inline void tim3_init(void) {
|
||||
#if defined(STM32_TIM3_IS_USED)
|
||||
nvicEnableVector(STM32_TIM3_NUMBER, STM32_IRQ_TIM3_PRIORITY);
|
||||
#endif
|
||||
}
|
||||
|
||||
static inline void tim3_deinit(void) {
|
||||
#if defined(STM32_TIM3_IS_USED)
|
||||
nvicDisableVector(STM32_TIM3_NUMBER);
|
||||
#endif
|
||||
}
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver interrupt handlers. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if HAL_USE_GPT || HAL_USE_ICU || HAL_USE_PWM || defined(__DOXYGEN__)
|
||||
#if (HAL_USE_GPT && STM32_GPT_USE_TIM3) || \
|
||||
(HAL_USE_ICU && STM32_ICU_USE_TIM3) || \
|
||||
(HAL_USE_PWM && STM32_PWM_USE_TIM3) || \
|
||||
defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief TIM3 interrupt handler.
|
||||
*
|
||||
|
@ -102,7 +107,7 @@ OSAL_IRQ_HANDLER(STM32_TIM3_HANDLER) {
|
|||
|
||||
OSAL_IRQ_EPILOGUE();
|
||||
}
|
||||
#endif /* HAL_USE_GPT || HAL_USE_ICU || HAL_USE_PWM */
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported functions. */
|
||||
|
|
|
@ -26,30 +26,20 @@
|
|||
/* Driver local definitions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if defined(STM32_TIM4_IS_USED) || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief IRQ vectors initialization.
|
||||
*/
|
||||
#define STM32_TIM4_TIM4_INIT() do { \
|
||||
nvicEnableVector(STM32_TIM4_NUMBER, \
|
||||
STM32_IRQ_TIM4_PRIORITY); \
|
||||
} while (0)
|
||||
|
||||
/**
|
||||
* @brief IRQ vectors de-initialization.
|
||||
*/
|
||||
#define STM32_TIM4_TIM4_DEINIT() do { \
|
||||
nvicDisableVector(STM32_TIM4_NUMBER); \
|
||||
} while (0)
|
||||
#else
|
||||
#define STM32_TIM4_TIM4_INIT()
|
||||
#define STM32_TIM4_TIM4_DEINIT()
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Derived constants and error checks. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/* Registry checks for robustness.*/
|
||||
#if !defined(STM32_HAS_TIM4)
|
||||
#error "STM32_HAS_TIM4 not defined in registry"
|
||||
#endif
|
||||
|
||||
#if STM32_HAS_TIM4 == FALSE
|
||||
#error "TIM4 not present"
|
||||
#endif
|
||||
|
||||
/* Priority settings checks.*/
|
||||
#if !defined(STM32_IRQ_TIM4_PRIORITY)
|
||||
#error "STM32_IRQ_TIM4_PRIORITY not defined in mcuconf.h"
|
||||
#endif
|
||||
|
@ -70,11 +60,26 @@
|
|||
/* Driver local functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
static inline void tim4_init(void) {
|
||||
#if defined(STM32_TIM4_IS_USED)
|
||||
nvicEnableVector(STM32_TIM4_NUMBER, STM32_IRQ_TIM4_PRIORITY);
|
||||
#endif
|
||||
}
|
||||
|
||||
static inline void tim4_deinit(void) {
|
||||
#if defined(STM32_TIM4_IS_USED)
|
||||
nvicDisableVector(STM32_TIM4_NUMBER);
|
||||
#endif
|
||||
}
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver interrupt handlers. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if HAL_USE_GPT || HAL_USE_ICU || HAL_USE_PWM || defined(__DOXYGEN__)
|
||||
#if (HAL_USE_GPT && STM32_GPT_USE_TIM4) || \
|
||||
(HAL_USE_ICU && STM32_ICU_USE_TIM4) || \
|
||||
(HAL_USE_PWM && STM32_PWM_USE_TIM4) || \
|
||||
defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief TIM4 interrupt handler.
|
||||
*
|
||||
|
@ -102,7 +107,7 @@ OSAL_IRQ_HANDLER(STM32_TIM4_HANDLER) {
|
|||
|
||||
OSAL_IRQ_EPILOGUE();
|
||||
}
|
||||
#endif /* HAL_USE_GPT || HAL_USE_ICU || HAL_USE_PWM */
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported functions. */
|
||||
|
|
|
@ -26,30 +26,20 @@
|
|||
/* Driver local definitions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if defined(STM32_TIM5_IS_USED) || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief IRQ vectors initialization.
|
||||
*/
|
||||
#define STM32_TIM5_TIM5_INIT() do { \
|
||||
nvicEnableVector(STM32_TIM5_NUMBER, \
|
||||
STM32_IRQ_TIM5_PRIORITY); \
|
||||
} while (0)
|
||||
|
||||
/**
|
||||
* @brief IRQ vectors de-initialization.
|
||||
*/
|
||||
#define STM32_TIM5_TIM5_DEINIT() do { \
|
||||
nvicDisableVector(STM32_TIM5_NUMBER); \
|
||||
} while (0)
|
||||
#else
|
||||
#define STM32_TIM5_TIM5_INIT()
|
||||
#define STM32_TIM5_TIM5_DEINIT()
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Derived constants and error checks. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/* Registry checks for robustness.*/
|
||||
#if !defined(STM32_HAS_TIM5)
|
||||
#error "STM32_HAS_TIM5 not defined in registry"
|
||||
#endif
|
||||
|
||||
#if STM32_HAS_TIM5 == FALSE
|
||||
#error "TIM5 not present"
|
||||
#endif
|
||||
|
||||
/* Priority settings checks.*/
|
||||
#if !defined(STM32_IRQ_TIM5_PRIORITY)
|
||||
#error "STM32_IRQ_TIM5_PRIORITY not defined in mcuconf.h"
|
||||
#endif
|
||||
|
@ -70,11 +60,26 @@
|
|||
/* Driver local functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
static inline void tim5_init(void) {
|
||||
#if defined(STM32_TIM5_IS_USED)
|
||||
nvicEnableVector(STM32_TIM5_NUMBER, STM32_IRQ_TIM5_PRIORITY);
|
||||
#endif
|
||||
}
|
||||
|
||||
static inline void tim5_deinit(void) {
|
||||
#if defined(STM32_TIM5_IS_USED)
|
||||
nvicDisableVector(STM32_TIM5_NUMBER);
|
||||
#endif
|
||||
}
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver interrupt handlers. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if HAL_USE_GPT || HAL_USE_ICU || HAL_USE_PWM || defined(__DOXYGEN__)
|
||||
#if (HAL_USE_GPT && STM32_GPT_USE_TIM5) || \
|
||||
(HAL_USE_ICU && STM32_ICU_USE_TIM5) || \
|
||||
(HAL_USE_PWM && STM32_PWM_USE_TIM5) || \
|
||||
defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief TIM5 interrupt handler.
|
||||
*
|
||||
|
@ -102,7 +107,7 @@ OSAL_IRQ_HANDLER(STM32_TIM5_HANDLER) {
|
|||
|
||||
OSAL_IRQ_EPILOGUE();
|
||||
}
|
||||
#endif /* HAL_USE_GPT || HAL_USE_ICU || HAL_USE_PWM */
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported functions. */
|
||||
|
|
|
@ -26,30 +26,20 @@
|
|||
/* Driver local definitions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if defined(STM32_TIM6_IS_USED) || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief IRQ vectors initialization.
|
||||
*/
|
||||
#define STM32_TIM6_TIM6_INIT() do { \
|
||||
nvicEnableVector(STM32_TIM6_NUMBER, \
|
||||
STM32_IRQ_TIM6_PRIORITY); \
|
||||
} while (0)
|
||||
|
||||
/**
|
||||
* @brief IRQ vectors de-initialization.
|
||||
*/
|
||||
#define STM32_TIM6_TIM6_DEINIT() do { \
|
||||
nvicDisableVector(STM32_TIM6_NUMBER); \
|
||||
} while (0)
|
||||
#else
|
||||
#define STM32_TIM6_TIM6_INIT()
|
||||
#define STM32_TIM6_TIM6_DEINIT()
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Derived constants and error checks. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/* Registry checks for robustness.*/
|
||||
#if !defined(STM32_HAS_TIM6)
|
||||
#error "STM32_HAS_TIM6 not defined in registry"
|
||||
#endif
|
||||
|
||||
#if STM32_HAS_TIM6 == FALSE
|
||||
#error "TIM6 not present"
|
||||
#endif
|
||||
|
||||
/* Priority settings checks.*/
|
||||
#if !defined(STM32_IRQ_TIM6_PRIORITY)
|
||||
#error "STM32_IRQ_TIM6_PRIORITY not defined in mcuconf.h"
|
||||
#endif
|
||||
|
@ -70,11 +60,24 @@
|
|||
/* Driver local functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
static inline void tim6_init(void) {
|
||||
#if defined(STM32_TIM6_IS_USED)
|
||||
nvicEnableVector(STM32_TIM6_NUMBER, STM32_IRQ_TIM6_PRIORITY);
|
||||
#endif
|
||||
}
|
||||
|
||||
static inline void tim6_deinit(void) {
|
||||
#if defined(STM32_TIM6_IS_USED)
|
||||
nvicDisableVector(STM32_TIM6_NUMBER);
|
||||
#endif
|
||||
}
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver interrupt handlers. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if HAL_USE_GPT || HAL_USE_ICU || HAL_USE_PWM || defined(__DOXYGEN__)
|
||||
#if (HAL_USE_GPT && STM32_GPT_USE_TIM6) || \
|
||||
defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief TIM6 interrupt handler.
|
||||
*
|
||||
|
@ -98,7 +101,7 @@ OSAL_IRQ_HANDLER(STM32_TIM6_HANDLER) {
|
|||
|
||||
OSAL_IRQ_EPILOGUE();
|
||||
}
|
||||
#endif /* HAL_USE_GPT || HAL_USE_ICU || HAL_USE_PWM */
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported functions. */
|
||||
|
|
|
@ -26,30 +26,20 @@
|
|||
/* Driver local definitions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if defined(STM32_TIM7_IS_USED) || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief IRQ vectors initialization.
|
||||
*/
|
||||
#define STM32_TIM7_TIM7_INIT() do { \
|
||||
nvicEnableVector(STM32_TIM7_NUMBER, \
|
||||
STM32_IRQ_TIM7_PRIORITY); \
|
||||
} while (0)
|
||||
|
||||
/**
|
||||
* @brief IRQ vectors de-initialization.
|
||||
*/
|
||||
#define STM32_TIM7_TIM7_DEINIT() do { \
|
||||
nvicDisableVector(STM32_TIM7_NUMBER); \
|
||||
} while (0)
|
||||
#else
|
||||
#define STM32_TIM7_TIM7_INIT()
|
||||
#define STM32_TIM7_TIM7_DEINIT()
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Derived constants and error checks. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/* Registry checks for robustness.*/
|
||||
#if !defined(STM32_HAS_TIM7)
|
||||
#error "STM32_HAS_TIM7 not defined in registry"
|
||||
#endif
|
||||
|
||||
#if STM32_HAS_TIM7 == FALSE
|
||||
#error "TIM7 not present"
|
||||
#endif
|
||||
|
||||
/* Priority settings checks.*/
|
||||
#if !defined(STM32_IRQ_TIM7_PRIORITY)
|
||||
#error "STM32_IRQ_TIM7_PRIORITY not defined in mcuconf.h"
|
||||
#endif
|
||||
|
@ -70,11 +60,24 @@
|
|||
/* Driver local functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
static inline void tim7_init(void) {
|
||||
#if defined(STM32_TIM7_IS_USED)
|
||||
nvicEnableVector(STM32_TIM7_NUMBER, STM32_IRQ_TIM7_PRIORITY);
|
||||
#endif
|
||||
}
|
||||
|
||||
static inline void tim7_deinit(void) {
|
||||
#if defined(STM32_TIM7_IS_USED)
|
||||
nvicDisableVector(STM32_TIM7_NUMBER);
|
||||
#endif
|
||||
}
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver interrupt handlers. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if HAL_USE_GPT || HAL_USE_ICU || HAL_USE_PWM || defined(__DOXYGEN__)
|
||||
#if (HAL_USE_GPT && STM32_GPT_USE_TIM7) || \
|
||||
defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief TIM7 interrupt handler.
|
||||
*
|
||||
|
@ -98,7 +101,7 @@ OSAL_IRQ_HANDLER(STM32_TIM7_HANDLER) {
|
|||
|
||||
OSAL_IRQ_EPILOGUE();
|
||||
}
|
||||
#endif /* HAL_USE_GPT || HAL_USE_ICU || HAL_USE_PWM */
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported functions. */
|
||||
|
|
|
@ -26,33 +26,20 @@
|
|||
/* Driver local definitions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if defined(STM32_TIM8_IS_USED) || defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief IRQ vectors initialization.
|
||||
*/
|
||||
#define STM32_TIM8_TIM8_INIT() do { \
|
||||
nvicEnableVector(STM32_TIM8_UP_NUMBER, \
|
||||
STM32_IRQ_TIM8_UP_PRIORITY); \
|
||||
nvicEnableVector(STM32_TIM8_CC_NUMBER, \
|
||||
STM32_IRQ_TIM8_CC_PRIORITY); \
|
||||
} while (0)
|
||||
|
||||
/**
|
||||
* @brief IRQ vectors de-initialization.
|
||||
*/
|
||||
#define STM32_TIM8_TIM8_DEINIT() do { \
|
||||
nvicDisableVector(STM32_TIM8_UP_NUMBER); \
|
||||
nvicDisableVector(STM32_TIM8_CC_NUMBER); \
|
||||
} while (0)
|
||||
#else
|
||||
#define STM32_TIM8_TIM8_INIT()
|
||||
#define STM32_TIM8_TIM8_DEINIT()
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Derived constants and error checks. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/* Registry checks for robustness.*/
|
||||
#if !defined(STM32_HAS_TIM8)
|
||||
#error "STM32_HAS_TIM8 not defined in registry"
|
||||
#endif
|
||||
|
||||
#if STM32_HAS_TIM8 == FALSE
|
||||
#error "TIM8 not present"
|
||||
#endif
|
||||
|
||||
/* Priority settings checks.*/
|
||||
#if !defined(STM32_IRQ_TIM8_UP_PRIORITY)
|
||||
#error "STM32_IRQ_TIM8_UP_PRIORITY not defined in mcuconf.h"
|
||||
#endif
|
||||
|
@ -81,11 +68,27 @@
|
|||
/* Driver local functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
static inline void tim8_init(void) {
|
||||
#if defined(STM32_TIM8_IS_USED)
|
||||
nvicEnableVector(STM32_TIM8_UP_NUMBER, STM32_IRQ_TIM8_UP_PRIORITY);
|
||||
nvicEnableVector(STM32_TIM8_CC_NUMBER, STM32_IRQ_TIM8_CC_PRIORITY);
|
||||
#endif
|
||||
}
|
||||
|
||||
static inline void tim8_deinit(void) {
|
||||
#if defined(STM32_TIM8_IS_USED)
|
||||
nvicDisableVector(STM32_TIM8_UP_NUMBER);
|
||||
nvicDisableVector(STM32_TIM8_CC_NUMBER);
|
||||
#endif
|
||||
}
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver interrupt handlers. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if HAL_USE_GPT || HAL_USE_ICU || HAL_USE_PWM || defined(__DOXYGEN__)
|
||||
#if (HAL_USE_ICU && STM32_ICU_USE_TIM8) || \
|
||||
(HAL_USE_PWM && STM32_PWM_USE_TIM8) || \
|
||||
defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief TIM8-UP interrupt handler.
|
||||
*
|
||||
|
@ -113,7 +116,11 @@ OSAL_IRQ_HANDLER(STM32_TIM8_UP_HANDLER) {
|
|||
|
||||
OSAL_IRQ_EPILOGUE();
|
||||
}
|
||||
#endif
|
||||
|
||||
#if (HAL_USE_ICU && STM32_ICU_USE_TIM8) || \
|
||||
(HAL_USE_PWM && STM32_PWM_USE_TIM8) || \
|
||||
defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief TIM8-CC interrupt handler.
|
||||
*
|
||||
|
@ -139,7 +146,7 @@ OSAL_IRQ_HANDLER(STM32_TIM8_CC_HANDLER) {
|
|||
|
||||
OSAL_IRQ_EPILOGUE();
|
||||
}
|
||||
#endif /* HAL_USE_GPT || HAL_USE_ICU || HAL_USE_PWM */
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported functions. */
|
||||
|
|
|
@ -0,0 +1,104 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file USARTv2/stm32_lpuart1.inc
|
||||
* @brief Shared LPUART1 handler.
|
||||
*
|
||||
* @addtogroup STM32_LPUART1_HANDLER
|
||||
* @{
|
||||
*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local definitions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Derived constants and error checks. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/* Registry checks for robustness.*/
|
||||
#if !defined(STM32_HAS_LPUART1)
|
||||
#error "STM32_HAS_LPUART1 not defined in registry"
|
||||
#endif
|
||||
|
||||
#if STM32_HAS_LPUART1 == FALSE
|
||||
#error "LPUART1 not present"
|
||||
#endif
|
||||
|
||||
/* Priority settings checks.*/
|
||||
#if !defined(STM32_IRQ_LPUART1_PRIORITY)
|
||||
#error "STM32_IRQ_LPUART1_PRIORITY not defined in mcuconf.h"
|
||||
#endif
|
||||
|
||||
#if !OSAL_IRQ_IS_VALID_PRIORITY(STM32_IRQ_LPUART1_PRIORITY)
|
||||
#error "Invalid IRQ priority assigned to STM32_IRQ_LPUART1_PRIORITY"
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported variables. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local variables. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
static inline void lpuart1_irq_init(void) {
|
||||
#if defined(STM32_LPUART1_IS_USED)
|
||||
nvicEnableVector(STM32_LPUART1_NUMBER, STM32_IRQ_LPUART1_PRIORITY);
|
||||
#endif
|
||||
}
|
||||
|
||||
static inline void lpuart1_irq_deinit(void) {
|
||||
#if defined(STM32_LPUART1_IS_USED)
|
||||
nvicDisableVector(STM32_LPUART1_NUMBER);
|
||||
#endif
|
||||
}
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver interrupt handlers. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if (HAL_USE_SERIAL && STM32_SERIAL_USE_LPUART1) || \
|
||||
defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief LPUART1 interrupt handler.
|
||||
*
|
||||
* @isr
|
||||
*/
|
||||
OSAL_IRQ_HANDLER(STM32_LPUART1_HANDLER) {
|
||||
|
||||
OSAL_IRQ_PROLOGUE();
|
||||
|
||||
#if HAL_USE_SERIAL
|
||||
#if STM32_SERIAL_USE_LPUART1
|
||||
sd_lld_serve_interrupt(&LPSD1);
|
||||
#endif
|
||||
#endif
|
||||
|
||||
OSAL_IRQ_EPILOGUE();
|
||||
}
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/** @} */
|
|
@ -0,0 +1,110 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file USARTv2/stm32_uart4.inc
|
||||
* @brief Shared UART4 handler.
|
||||
*
|
||||
* @addtogroup STM32_UART4_HANDLER
|
||||
* @{
|
||||
*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local definitions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Derived constants and error checks. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/* Registry checks for robustness.*/
|
||||
#if !defined(STM32_HAS_UART4)
|
||||
#error "STM32_HAS_UART4 not defined in registry"
|
||||
#endif
|
||||
|
||||
#if STM32_HAS_UART4 == FALSE
|
||||
#error "UART4 not present"
|
||||
#endif
|
||||
|
||||
/* Priority settings checks.*/
|
||||
#if !defined(STM32_IRQ_UART4_PRIORITY)
|
||||
#error "STM32_IRQ_UART4_PRIORITY not defined in mcuconf.h"
|
||||
#endif
|
||||
|
||||
#if !OSAL_IRQ_IS_VALID_PRIORITY(STM32_IRQ_UART4_PRIORITY)
|
||||
#error "Invalid IRQ priority assigned to STM32_IRQ_UART4_PRIORITY"
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported variables. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local variables. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
static inline void uart4_irq_init(void) {
|
||||
#if defined(STM32_UART4_IS_USED)
|
||||
nvicEnableVector(STM32_UART4_NUMBER, STM32_IRQ_UART4_PRIORITY);
|
||||
#endif
|
||||
}
|
||||
|
||||
static inline void uart4_irq_deinit(void) {
|
||||
#if defined(STM32_UART4_IS_USED)
|
||||
nvicDisableVector(STM32_UART4_NUMBER);
|
||||
#endif
|
||||
}
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver interrupt handlers. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if (HAL_USE_SERIAL && STM32_SERIAL_USE_UART4) || \
|
||||
(HAL_USE_UART && STM32_UART_USE_UART4) || \
|
||||
defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief UART4 interrupt handler.
|
||||
*
|
||||
* @isr
|
||||
*/
|
||||
OSAL_IRQ_HANDLER(STM32_UART4_HANDLER) {
|
||||
|
||||
OSAL_IRQ_PROLOGUE();
|
||||
|
||||
#if HAL_USE_SERIAL
|
||||
#if STM32_SERIAL_USE_UART4
|
||||
sd_lld_serve_interrupt(&SD4);
|
||||
#endif
|
||||
#endif
|
||||
#if HAL_USE_UART
|
||||
#if STM32_UART_USE_UART4
|
||||
uart_lld_serve_interrupt(&UARTD4);
|
||||
#endif
|
||||
#endif
|
||||
|
||||
OSAL_IRQ_EPILOGUE();
|
||||
}
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/** @} */
|
|
@ -0,0 +1,110 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file USARTv2/stm32_uart5.inc
|
||||
* @brief Shared UART5 handler.
|
||||
*
|
||||
* @addtogroup STM32_UART5_HANDLER
|
||||
* @{
|
||||
*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local definitions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Derived constants and error checks. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/* Registry checks for robustness.*/
|
||||
#if !defined(STM32_HAS_UART5)
|
||||
#error "STM32_HAS_UART5 not defined in registry"
|
||||
#endif
|
||||
|
||||
#if STM32_HAS_UART5 == FALSE
|
||||
#error "UART5 not present"
|
||||
#endif
|
||||
|
||||
/* Priority settings checks.*/
|
||||
#if !defined(STM32_IRQ_UART5_PRIORITY)
|
||||
#error "STM32_IRQ_UART5_PRIORITY not defined in mcuconf.h"
|
||||
#endif
|
||||
|
||||
#if !OSAL_IRQ_IS_VALID_PRIORITY(STM32_IRQ_UART5_PRIORITY)
|
||||
#error "Invalid IRQ priority assigned to STM32_IRQ_UART5_PRIORITY"
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported variables. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local variables. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
static inline void uart5_irq_init(void) {
|
||||
#if defined(STM32_UART5_IS_USED)
|
||||
nvicEnableVector(STM32_UART5_NUMBER, STM32_IRQ_UART5_PRIORITY);
|
||||
#endif
|
||||
}
|
||||
|
||||
static inline void uart5_irq_deinit(void) {
|
||||
#if defined(STM32_UART5_IS_USED)
|
||||
nvicDisableVector(STM32_UART5_NUMBER);
|
||||
#endif
|
||||
}
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver interrupt handlers. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if (HAL_USE_SERIAL && STM32_SERIAL_USE_UART5) || \
|
||||
(HAL_USE_UART && STM32_UART_USE_UART5) || \
|
||||
defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief UART5 interrupt handler.
|
||||
*
|
||||
* @isr
|
||||
*/
|
||||
OSAL_IRQ_HANDLER(STM32_UART5_HANDLER) {
|
||||
|
||||
OSAL_IRQ_PROLOGUE();
|
||||
|
||||
#if HAL_USE_SERIAL
|
||||
#if STM32_SERIAL_USE_UART5
|
||||
sd_lld_serve_interrupt(&SD5);
|
||||
#endif
|
||||
#endif
|
||||
#if HAL_USE_UART
|
||||
#if STM32_UART_USE_UART5
|
||||
uart_lld_serve_interrupt(&UARTD5);
|
||||
#endif
|
||||
#endif
|
||||
|
||||
OSAL_IRQ_EPILOGUE();
|
||||
}
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/** @} */
|
|
@ -0,0 +1,110 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file USARTv2/stm32_usart1.inc
|
||||
* @brief Shared USART1 handler.
|
||||
*
|
||||
* @addtogroup STM32_USART1_HANDLER
|
||||
* @{
|
||||
*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local definitions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Derived constants and error checks. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/* Registry checks for robustness.*/
|
||||
#if !defined(STM32_HAS_USART1)
|
||||
#error "STM32_HAS_USART1 not defined in registry"
|
||||
#endif
|
||||
|
||||
#if STM32_HAS_USART1 == FALSE
|
||||
#error "USART1 not present"
|
||||
#endif
|
||||
|
||||
/* Priority settings checks.*/
|
||||
#if !defined(STM32_IRQ_USART1_PRIORITY)
|
||||
#error "STM32_IRQ_USART1_PRIORITY not defined in mcuconf.h"
|
||||
#endif
|
||||
|
||||
#if !OSAL_IRQ_IS_VALID_PRIORITY(STM32_IRQ_USART1_PRIORITY)
|
||||
#error "Invalid IRQ priority assigned to STM32_IRQ_USART1_PRIORITY"
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported variables. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local variables. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
static inline void usart1_irq_init(void) {
|
||||
#if defined(STM32_USART1_IS_USED)
|
||||
nvicEnableVector(STM32_USART1_NUMBER, STM32_IRQ_USART1_PRIORITY);
|
||||
#endif
|
||||
}
|
||||
|
||||
static inline void usart1_irq_deinit(void) {
|
||||
#if defined(STM32_USART1_IS_USED)
|
||||
nvicDisableVector(STM32_USART1_NUMBER);
|
||||
#endif
|
||||
}
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver interrupt handlers. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if (HAL_USE_SERIAL && STM32_SERIAL_USE_USART1) || \
|
||||
(HAL_USE_UART && STM32_UART_USE_USART1) || \
|
||||
defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief USART1 interrupt handler.
|
||||
*
|
||||
* @isr
|
||||
*/
|
||||
OSAL_IRQ_HANDLER(STM32_USART1_HANDLER) {
|
||||
|
||||
OSAL_IRQ_PROLOGUE();
|
||||
|
||||
#if HAL_USE_SERIAL
|
||||
#if STM32_SERIAL_USE_USART1
|
||||
sd_lld_serve_interrupt(&SD1);
|
||||
#endif
|
||||
#endif
|
||||
#if HAL_USE_UART
|
||||
#if STM32_UART_USE_USART1
|
||||
uart_lld_serve_interrupt(&UARTD1);
|
||||
#endif
|
||||
#endif
|
||||
|
||||
OSAL_IRQ_EPILOGUE();
|
||||
}
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/** @} */
|
|
@ -0,0 +1,110 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file USARTv2/stm32_usart2.inc
|
||||
* @brief Shared USART2 handler.
|
||||
*
|
||||
* @addtogroup STM32_USART2_HANDLER
|
||||
* @{
|
||||
*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local definitions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Derived constants and error checks. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/* Registry checks for robustness.*/
|
||||
#if !defined(STM32_HAS_USART2)
|
||||
#error "STM32_HAS_USART2 not defined in registry"
|
||||
#endif
|
||||
|
||||
#if STM32_HAS_USART2 == FALSE
|
||||
#error "USART2 not present"
|
||||
#endif
|
||||
|
||||
/* Priority settings checks.*/
|
||||
#if !defined(STM32_IRQ_USART2_PRIORITY)
|
||||
#error "STM32_IRQ_USART2_PRIORITY not defined in mcuconf.h"
|
||||
#endif
|
||||
|
||||
#if !OSAL_IRQ_IS_VALID_PRIORITY(STM32_IRQ_USART2_PRIORITY)
|
||||
#error "Invalid IRQ priority assigned to STM32_IRQ_USART2_PRIORITY"
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported variables. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local variables. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
static inline void usart2_irq_init(void) {
|
||||
#if defined(STM32_USART2_IS_USED)
|
||||
nvicEnableVector(STM32_USART2_NUMBER, STM32_IRQ_USART2_PRIORITY);
|
||||
#endif
|
||||
}
|
||||
|
||||
static inline void usart2_irq_deinit(void) {
|
||||
#if defined(STM32_USART2_IS_USED)
|
||||
nvicDisableVector(STM32_USART2_NUMBER);
|
||||
#endif
|
||||
}
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver interrupt handlers. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if (HAL_USE_SERIAL && STM32_SERIAL_USE_USART2) || \
|
||||
(HAL_USE_UART && STM32_UART_USE_USART2) || \
|
||||
defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief USART2 interrupt handler.
|
||||
*
|
||||
* @isr
|
||||
*/
|
||||
OSAL_IRQ_HANDLER(STM32_USART2_HANDLER) {
|
||||
|
||||
OSAL_IRQ_PROLOGUE();
|
||||
|
||||
#if HAL_USE_SERIAL
|
||||
#if STM32_SERIAL_USE_USART2
|
||||
sd_lld_serve_interrupt(&SD2);
|
||||
#endif
|
||||
#endif
|
||||
#if HAL_USE_UART
|
||||
#if STM32_UART_USE_USART2
|
||||
uart_lld_serve_interrupt(&UARTD2);
|
||||
#endif
|
||||
#endif
|
||||
|
||||
OSAL_IRQ_EPILOGUE();
|
||||
}
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/** @} */
|
|
@ -0,0 +1,110 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file USARTv2/stm32_usart3.inc
|
||||
* @brief Shared USART3 handler.
|
||||
*
|
||||
* @addtogroup STM32_USART3_HANDLER
|
||||
* @{
|
||||
*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local definitions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Derived constants and error checks. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/* Registry checks for robustness.*/
|
||||
#if !defined(STM32_HAS_USART3)
|
||||
#error "STM32_HAS_USART3 not defined in registry"
|
||||
#endif
|
||||
|
||||
#if STM32_HAS_USART3 == FALSE
|
||||
#error "USART3 not present"
|
||||
#endif
|
||||
|
||||
/* Priority settings checks.*/
|
||||
#if !defined(STM32_IRQ_USART3_PRIORITY)
|
||||
#error "STM32_IRQ_USART3_PRIORITY not defined in mcuconf.h"
|
||||
#endif
|
||||
|
||||
#if !OSAL_IRQ_IS_VALID_PRIORITY(STM32_IRQ_USART3_PRIORITY)
|
||||
#error "Invalid IRQ priority assigned to STM32_IRQ_USART3_PRIORITY"
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported variables. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local variables. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver local functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
static inline void usart3_irq_init(void) {
|
||||
#if defined(STM32_USART3_IS_USED)
|
||||
nvicEnableVector(STM32_USART3_NUMBER, STM32_IRQ_USART3_PRIORITY);
|
||||
#endif
|
||||
}
|
||||
|
||||
static inline void usart3_irq_deinit(void) {
|
||||
#if defined(STM32_USART3_IS_USED)
|
||||
nvicDisableVector(STM32_USART3_NUMBER);
|
||||
#endif
|
||||
}
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver interrupt handlers. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if (HAL_USE_SERIAL && STM32_SERIAL_USE_USART3) || \
|
||||
(HAL_USE_UART && STM32_UART_USE_USART3) || \
|
||||
defined(__DOXYGEN__)
|
||||
/**
|
||||
* @brief USART3 interrupt handler.
|
||||
*
|
||||
* @isr
|
||||
*/
|
||||
OSAL_IRQ_HANDLER(STM32_USART3_HANDLER) {
|
||||
|
||||
OSAL_IRQ_PROLOGUE();
|
||||
|
||||
#if HAL_USE_SERIAL
|
||||
#if STM32_SERIAL_USE_USART3
|
||||
sd_lld_serve_interrupt(&SD3);
|
||||
#endif
|
||||
#endif
|
||||
#if HAL_USE_UART
|
||||
#if STM32_UART_USE_USART3
|
||||
uart_lld_serve_interrupt(&UARTD3);
|
||||
#endif
|
||||
#endif
|
||||
|
||||
OSAL_IRQ_EPILOGUE();
|
||||
}
|
||||
#endif
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver exported functions. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/** @} */
|
|
@ -0,0 +1,183 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2019 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file STM32G4xx/stm32_dmamux.h
|
||||
* @brief STM32G4xx DMAMUX handler header.
|
||||
*
|
||||
* @addtogroup STM32G4xx_DMAMUX
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef STM32_DMAMUX_H
|
||||
#define STM32_DMAMUX_H
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver constants. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @name DMAMUX1 request sources
|
||||
* @{
|
||||
*/
|
||||
#define STM32_DMAMUX1_REQ_GEN0 1
|
||||
#define STM32_DMAMUX1_REQ_GEN1 2
|
||||
#define STM32_DMAMUX1_REQ_GEN2 3
|
||||
#define STM32_DMAMUX1_REQ_GEN3 4
|
||||
#define STM32_DMAMUX1_ADC1 5
|
||||
#define STM32_DMAMUX1_DAC1_CH1 6
|
||||
#define STM32_DMAMUX1_DAC1_CH2 7
|
||||
#define STM32_DMAMUX1_TIM6_UP 8
|
||||
#define STM32_DMAMUX1_TIM7_UP 9
|
||||
#define STM32_DMAMUX1_SPI1_RX 10
|
||||
#define STM32_DMAMUX1_SPI1_TX 11
|
||||
#define STM32_DMAMUX1_SPI2_RX 12
|
||||
#define STM32_DMAMUX1_SPI2_TX 13
|
||||
#define STM32_DMAMUX1_SPI3_RX 14
|
||||
#define STM32_DMAMUX1_SPI3_TX 15
|
||||
#define STM32_DMAMUX1_I2C1_RX 16
|
||||
#define STM32_DMAMUX1_I2C1_TX 17
|
||||
#define STM32_DMAMUX1_I2C2_RX 18
|
||||
#define STM32_DMAMUX1_I2C2_TX 19
|
||||
#define STM32_DMAMUX1_I2C3_RX 20
|
||||
#define STM32_DMAMUX1_I2C3_TX 21
|
||||
#define STM32_DMAMUX1_I2C4_RX 22
|
||||
#define STM32_DMAMUX1_I2C4_TX 23
|
||||
#define STM32_DMAMUX1_USART1_RX 24
|
||||
#define STM32_DMAMUX1_USART1_TX 25
|
||||
#define STM32_DMAMUX1_USART2_RX 26
|
||||
#define STM32_DMAMUX1_USART2_TX 27
|
||||
#define STM32_DMAMUX1_USART3_RX 28
|
||||
#define STM32_DMAMUX1_USART3_TX 29
|
||||
#define STM32_DMAMUX1_UART4_RX 30
|
||||
#define STM32_DMAMUX1_UART4_TX 31
|
||||
#define STM32_DMAMUX1_UART5_RX 32
|
||||
#define STM32_DMAMUX1_UART5_TX 33
|
||||
#define STM32_DMAMUX1_LPUART1_RX 34
|
||||
#define STM32_DMAMUX1_LPUART1_TX 35
|
||||
#define STM32_DMAMUX1_ADC2 36
|
||||
#define STM32_DMAMUX1_ADC3 37
|
||||
#define STM32_DMAMUX1_ADC4 38
|
||||
#define STM32_DMAMUX1_ADC5 39
|
||||
#define STM32_DMAMUX1_QUADSPI 40
|
||||
#define STM32_DMAMUX1_DAC2_CH1 41
|
||||
#define STM32_DMAMUX1_TIM1_CH1 42
|
||||
#define STM32_DMAMUX1_TIM1_CH2 43
|
||||
#define STM32_DMAMUX1_TIM1_CH3 44
|
||||
#define STM32_DMAMUX1_TIM1_CH4 45
|
||||
#define STM32_DMAMUX1_TIM1_UP 46
|
||||
#define STM32_DMAMUX1_TIM1_TRIG 47
|
||||
#define STM32_DMAMUX1_TIM1_COM 48
|
||||
#define STM32_DMAMUX1_TIM8_CH1 49
|
||||
#define STM32_DMAMUX1_TIM8_CH2 50
|
||||
#define STM32_DMAMUX1_TIM8_CH3 51
|
||||
#define STM32_DMAMUX1_TIM8_CH4 52
|
||||
#define STM32_DMAMUX1_TIM8_UP 53
|
||||
#define STM32_DMAMUX1_TIM8_TRIG 54
|
||||
#define STM32_DMAMUX1_TIM8_COM 55
|
||||
#define STM32_DMAMUX1_TIM2_CH1 56
|
||||
#define STM32_DMAMUX1_TIM2_CH2 57
|
||||
#define STM32_DMAMUX1_TIM2_CH3 58
|
||||
#define STM32_DMAMUX1_TIM2_CH4 59
|
||||
#define STM32_DMAMUX1_TIM2_UP 60
|
||||
#define STM32_DMAMUX1_TIM3_CH1 61
|
||||
#define STM32_DMAMUX1_TIM3_CH2 62
|
||||
#define STM32_DMAMUX1_TIM3_CH3 63
|
||||
#define STM32_DMAMUX1_TIM3_CH4 64
|
||||
#define STM32_DMAMUX1_TIM3_UP 65
|
||||
#define STM32_DMAMUX1_TIM3_TRIG 66
|
||||
#define STM32_DMAMUX1_TIM4_CH1 67
|
||||
#define STM32_DMAMUX1_TIM4_CH2 68
|
||||
#define STM32_DMAMUX1_TIM4_CH3 69
|
||||
#define STM32_DMAMUX1_TIM4_CH4 70
|
||||
#define STM32_DMAMUX1_TIM4_UP 71
|
||||
#define STM32_DMAMUX1_TIM5_CH1 72
|
||||
#define STM32_DMAMUX1_TIM5_CH2 73
|
||||
#define STM32_DMAMUX1_TIM5_CH3 74
|
||||
#define STM32_DMAMUX1_TIM5_CH4 75
|
||||
#define STM32_DMAMUX1_TIM5_UP 76
|
||||
#define STM32_DMAMUX1_TIM5_TRIG 77
|
||||
#define STM32_DMAMUX1_TIM15_CH1 78
|
||||
#define STM32_DMAMUX1_TIM15_UP 79
|
||||
#define STM32_DMAMUX1_TIM15_TRIG 80
|
||||
#define STM32_DMAMUX1_TIM15_COM 81
|
||||
#define STM32_DMAMUX1_TIM16_CH1 82
|
||||
#define STM32_DMAMUX1_TIM16_UP 83
|
||||
#define STM32_DMAMUX1_TIM17_CH1 84
|
||||
#define STM32_DMAMUX1_TIM17_UP 85
|
||||
#define STM32_DMAMUX1_TIM20_CH1 86
|
||||
#define STM32_DMAMUX1_TIM20_CH2 87
|
||||
#define STM32_DMAMUX1_TIM20_CH3 88
|
||||
#define STM32_DMAMUX1_TIM20_CH4 89
|
||||
#define STM32_DMAMUX1_TIM20_UP 90
|
||||
#define STM32_DMAMUX1_AES_IN 91
|
||||
#define STM32_DMAMUX1_AES_OUT 92
|
||||
#define STM32_DMAMUX1_TIM20_TRIG 93
|
||||
#define STM32_DMAMUX1_TIM20_COM 94
|
||||
#define STM32_DMAMUX1_HRTIM_MASTER 95
|
||||
#define STM32_DMAMUX1_HRTIM_TIMA 96
|
||||
#define STM32_DMAMUX1_HRTIM_TIMB 97
|
||||
#define STM32_DMAMUX1_HRTIM_TIMC 98
|
||||
#define STM32_DMAMUX1_HRTIM_TIMD 99
|
||||
#define STM32_DMAMUX1_HRTIM_TIME 100
|
||||
#define STM32_DMAMUX1_HRTIM_TIMF 101
|
||||
#define STM32_DMAMUX1_DAC3_CH1 102
|
||||
#define STM32_DMAMUX1_DAC3_CH2 103
|
||||
#define STM32_DMAMUX1_DAC4_CH1 104
|
||||
#define STM32_DMAMUX1_DAC4_CH2 105
|
||||
#define STM32_DMAMUX1_SPI4_RX 106
|
||||
#define STM32_DMAMUX1_SPI4_TX 107
|
||||
#define STM32_DMAMUX1_SAI1_A 108
|
||||
#define STM32_DMAMUX1_SAI1_B 109
|
||||
#define STM32_DMAMUX1_FMAC_READ 110
|
||||
#define STM32_DMAMUX1_FMAC_WRITE 111
|
||||
#define STM32_DMAMUX1_CORDIC_READ 112
|
||||
#define STM32_DMAMUX1_CORDIC_WRITE 113
|
||||
#define STM32_DMAMUX1_UCPD1_RX 114
|
||||
#define STM32_DMAMUX1_UCPD1_TX 115
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver pre-compile time settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Derived constants and error checks. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver data structures and types. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver macros. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* External declarations. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* STM32_DMAMUX_H */
|
||||
|
||||
/** @} */
|
|
@ -24,14 +24,21 @@
|
|||
|
||||
#include "hal.h"
|
||||
|
||||
#include "stm32_usart1.inc"
|
||||
#include "stm32_usart2.inc"
|
||||
#include "stm32_usart3.inc"
|
||||
#include "stm32_uart4.inc"
|
||||
#include "stm32_uart5.inc"
|
||||
#include "stm32_lpuart1.inc"
|
||||
|
||||
#include "stm32_tim1_tim15_tim16_tim17.inc"
|
||||
#include "stm32_tim2.inc"
|
||||
#include "stm32_tim2.inc"
|
||||
#include "stm32_tim3.inc"
|
||||
#include "stm32_tim4.inc"
|
||||
#include "stm32_tim5.inc"
|
||||
#include "stm32_tim6.inc"
|
||||
#include "stm32_tim7.inc"
|
||||
#include "stm32_tim8.inc"
|
||||
#include "stm32_tim20.inc"
|
||||
|
||||
/*===========================================================================*/
|
||||
|
@ -74,17 +81,22 @@ void irqInit(void) {
|
|||
nvicEnableVector(STM32_EXTI_LINE5_9_NUMBER, STM32_IRQ_EXTI5_9_PRIORITY);
|
||||
nvicEnableVector(STM32_EXTI_LINE10_15_NUMBER, STM32_IRQ_EXTI10_15_PRIORITY);
|
||||
#endif
|
||||
#if HAL_USE_GPT || HAL_USE_ICU || HAL_USE_PWM || defined(__DOXYGEN__)
|
||||
STM32_TIM1_TIM15_TIM16_TIM17_INIT();
|
||||
STM32_TIM2_INIT();
|
||||
STM32_TIM3_INIT();
|
||||
STM32_TIM4_INIT();
|
||||
STM32_TIM5_INIT();
|
||||
STM32_TIM6_INIT();
|
||||
STM32_TIM7_INIT();
|
||||
STM32_TIM8_INIT();
|
||||
STM32_TIM20_INIT();
|
||||
#endif
|
||||
usart1_irq_init();
|
||||
usart2_irq_init();
|
||||
usart3_irq_init();
|
||||
uart4_irq_init();
|
||||
uart5_irq_init();
|
||||
lpuart1_irq_init();
|
||||
|
||||
tim1_tim15_init();
|
||||
tim2_init();
|
||||
tim3_init();
|
||||
tim4_init();
|
||||
tim5_init();
|
||||
tim6_init();
|
||||
tim7_init();
|
||||
tim8_init();
|
||||
tim20_init();
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -103,17 +115,22 @@ void irqDeinit(void) {
|
|||
nvicDisableVector(STM32_EXTI_LINE5_9_NUMBER);
|
||||
nvicDisableVector(STM32_EXTI_LINE10_15_NUMBER);
|
||||
#endif
|
||||
#if HAL_USE_GPT || HAL_USE_ICU || HAL_USE_PWM || defined(__DOXYGEN__)
|
||||
STM32_TIM1_TIM15_TIM16_TIM17_DEINIT();
|
||||
STM32_TIM2_DEINIT();
|
||||
STM32_TIM3_DEINIT();
|
||||
STM32_TIM4_DEINIT();
|
||||
STM32_TIM5_DEINIT();
|
||||
STM32_TIM6_DEINIT();
|
||||
STM32_TIM7_DEINIT();
|
||||
STM32_TIM8_DEINIT();
|
||||
STM32_TIM20_DEINIT();
|
||||
#endif
|
||||
usart1_irq_deinit();
|
||||
usart2_irq_deinit();
|
||||
usart3_irq_deinit();
|
||||
uart4_irq_deinit();
|
||||
uart5_irq_deinit();
|
||||
lpuart1_irq_deinit();
|
||||
|
||||
tim1_tim15_deinit();
|
||||
tim2_deinit();
|
||||
tim3_deinit();
|
||||
tim4_deinit();
|
||||
tim5_deinit();
|
||||
tim6_deinit();
|
||||
tim7_deinit();
|
||||
tim8_deinit();
|
||||
tim20_deinit();
|
||||
}
|
||||
|
||||
/** @} */
|
||||
|
|
Loading…
Reference in New Issue