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Small documentation errors, DMAMUX for G4. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@13020 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
This commit is contained in:
Giovanni Di Sirio 2019-09-23 10:02:47 +00:00
parent 9eed738e8f
commit c9d5f48b50
5 changed files with 29 additions and 5 deletions
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3
demos/STM32/RT-STM32G474RE-NUCLEO64/cfg/mcuconf.h
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@ -53,12 +53,13 @@
#define STM32_PLLSRC STM32_PLLSRC_HSI16 #define STM32_PLLSRC STM32_PLLSRC_HSI16
#define STM32_PLLM_VALUE 4 #define STM32_PLLM_VALUE 4
#define STM32_PLLN_VALUE 84 #define STM32_PLLN_VALUE 84
#define STM32_PLLPDIV_VALUE 0
#define STM32_PLLP_VALUE 7 #define STM32_PLLP_VALUE 7
#define STM32_PLLQ_VALUE 8 #define STM32_PLLQ_VALUE 8
#define STM32_PLLR_VALUE 2 #define STM32_PLLR_VALUE 2
#define STM32_HPRE STM32_HPRE_DIV1 #define STM32_HPRE STM32_HPRE_DIV1
#define STM32_PPRE1 STM32_PPRE1_DIV1 #define STM32_PPRE1 STM32_PPRE1_DIV1
#define STM32_PPRE2 STM32_PPRE2_DIV2 #define STM32_PPRE2 STM32_PPRE2_DIV1
#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK #define STM32_MCOSEL STM32_MCOSEL_NOCLOCK
#define STM32_MCOPRE STM32_MCOPRE_DIV1 #define STM32_MCOPRE STM32_MCOPRE_DIV1
#define STM32_LSCOSEL STM32_LSCOSEL_NOCLOCK #define STM32_LSCOSEL STM32_LSCOSEL_NOCLOCK

2
os/hal/ports/STM32/STM32G0xx/stm32_dmamux.h
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@ -15,7 +15,7 @@
*/ */
/** /**
* @file STM32G0xx/stm32_isr.h * @file STM32G0xx/stm32_dmamux.h
* @brief STM32G0xx DMAMUX handler header. * @brief STM32G0xx DMAMUX handler header.
* *
* @addtogroup STM32G0xx_DMAMUX * @addtogroup STM32G0xx_DMAMUX

25
os/hal/ports/STM32/STM32G4xx/hal_lld.h
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@ -428,6 +428,14 @@
#define STM32_PLLN_VALUE 84 #define STM32_PLLN_VALUE 84
#endif #endif
/**
* @brief PLLPDIV divider value or zero if disabled.
* @note The allowed values are 0, 2..31.
*/
#if !defined(STM32_PLLPDIV_VALUE) || defined(__DOXYGEN__)
#define STM32_PLLPDIV_VALUE 0
#endif
/** /**
* @brief PLLP divider value. * @brief PLLP divider value.
* @note The allowed values are 7, 17. * @note The allowed values are 7, 17.
@ -1150,6 +1158,17 @@
#error "invalid STM32_PLLR_VALUE value specified" #error "invalid STM32_PLLR_VALUE value specified"
#endif #endif
/**
* @brief STM32_PLLPDIV field. (Only for STM32L496xx/4A6xx)
*/
#if (STM32_PLLPDIV_VALUE == 0) || \
((STM32_PLLPDIV_VALUE >= 2) && (STM32_PLLPDIV_VALUE <= 31)) || \
defined(__DOXYGEN__)
#define STM32_PLLPDIV (STM32_PLLPDIV_VALUE << 27)
#else
#error "invalid STM32_PLLPDIV_VALUE value specified"
#endif
/** /**
* @brief STM32_PLLPEN field. * @brief STM32_PLLPEN field.
*/ */
@ -1202,7 +1221,11 @@
/** /**
* @brief PLL P output clock frequency. * @brief PLL P output clock frequency.
*/ */
#define STM32_PLL_P_CLKOUT (STM32_PLLVCO / STM32_PLLP_VALUE) #if (STM32_PLLPDIV_VALUE == 0) || defined(__DOXYGEN__)
#define STM32_PLL_P_CLKOUT (STM32_PLLVCO / STM32_PLLP_VALUE)
#else
#define STM32_PLL_P_CLKOUT (STM32_PLLVCO / STM32_PLLPDIV_VALUE)
#endif
/** /**
* @brief PLL Q output clock frequency. * @brief PLL Q output clock frequency.

2
os/hal/ports/STM32/STM32H7xx/stm32_dmamux.h
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@ -15,7 +15,7 @@
*/ */
/** /**
* @file STM32H7xx/stm32_isr.h * @file STM32H7xx/stm32_dmamux.h
* @brief STM32H7xx DMAMUX handler header. * @brief STM32H7xx DMAMUX handler header.
* *
* @addtogroup STM32H7xx_DMAMUX * @addtogroup STM32H7xx_DMAMUX

2
os/hal/ports/STM32/STM32L4xx+/stm32_dmamux.h
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@ -15,7 +15,7 @@
*/ */
/** /**
* @file STM32L4xx+/stm32_isr.h * @file STM32L4xx+/stm32_dmamux.h
* @brief STM32L4xx+ DMAMUX handler header. * @brief STM32L4xx+ DMAMUX handler header.
* *
* @addtogroup STM32L4xxp_DMAMUX * @addtogroup STM32L4xxp_DMAMUX