git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@143 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
gdisirio
parent
0bb20d36f4
commit
cae69c784f
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@ -62,16 +62,16 @@ UDEFS =
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UADEFS =
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# List ARM-mode C source files here
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ASRC = chcore.c \
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ASRC = ../../ports/ARM7-LPC214x/GCC/chcore.c \
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../../ports/ARM7-LPC214x/GCC/vic.c \
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../../ports/ARM7-LPC214x/GCC/lpc214x_serial.c \
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../../ports/ARM7-LPC214x/GCC/lpc214x_ssp.c \
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../../src/chinit.c ../../src/chdebug.c ../../src/chlists.c ../../src/chdelta.c \
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../../src/chschd.c ../../src/chthreads.c ../../src/chsem.c ../../src/chmtx.c \
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../../src/chevents.c ../../src/chmsg.c ../../src/chsleep.c ../../src/chqueues.c \
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../../src/chserial.c \
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../../ports/ARM7-LPC214x/GCC/vic.c ../../ports/ARM7-LPC214x/GCC/lpc214x_serial.c \
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../../ports/ARM7-LPC214x/GCC/lpc214x_ssp.c \
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../../src/lib/evtimer.c ../../test/test.c \
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buzzer.c mmcsd.c main.c
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board.c buzzer.c mmcsd.c main.c
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# List THUMB-mode C sources here
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# NOTE: If any module is compiled in thumb mode then -mthumb-interwork is
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@ -79,7 +79,7 @@ ASRC = chcore.c \
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TSRC =
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# List ASM source files here
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ASMSRC = crt0.s chcore2.s
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ASMSRC = ../../ports/ARM7-LPC214x/GCC/crt0.s ../../ports/ARM7-LPC214x/GCC/chcore2.s
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# List all user directories here
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UINCDIR = ../../src/include ../../src/lib ../../ports/ARM7-LPC214x/GCC
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@ -162,7 +162,7 @@ $(TOBJS) : %.o : %.c
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$(ASMOBJS) : %.o : %.s
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@echo
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$(AS) -c $(ASFLAGS) $< -o $@
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$(AS) -c $(ASFLAGS) -I . $(INCDIR) $< -o $@
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%elf: $(OBJS)
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@echo
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@ -27,6 +27,7 @@
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#include <ch.h>
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#include "lpc214x.h"
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#include "board.h"
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#include "buzzer.h"
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EventSource BuzzerSilentEventSource;
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@ -20,123 +20,6 @@
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#include <ch.h>
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#include "lpc214x.h"
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#include "vic.h"
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#include "lpc214x_serial.h"
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#include "lpc214x_ssp.h"
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#include "mmcsd.h"
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#include "buzzer.h"
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extern void IrqHandler(void);
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extern void T0IrqHandler(void);
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#define VAL_TC0_PRESCALER 0
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/*
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* Pins configuration for Olimex LPC-P2148.
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*
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* PINSEL0
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* P0 P0 P0 P0 P0 P0 RXD TXD SSE MOS MIS SCK SDA SCL RXD TXD
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* 15 14 13 12 11 10 1 1 L0 I0 O0 0 0 0 0 0
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* 00 00 00 00 00 00 01 01 01 01 01 01 01 01 01 01
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* IN IN OUT OUT OUT OUT -- -- -- -- -- -- -- -- -- --
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* 0 0 1 1 1 1 0 0 0 0 0 0 0 0 0 0
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*
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* PINSEL1
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* P0 AD P0 P0 -- -- AO -- VB P0 P0 P0 MOS MIS SCK P0
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* 31 03 29 28 -- -- UT -- US 22 21 20 I1 O1 1 16
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* 00 01 00 00 00 00 10 00 01 00 00 00 10 10 10 00
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* OUT -- OUT OUT -- -- -- -- -- OUT OUT OUT -- -- -- IN
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* 1 0 1 1 0 0 0 0 0 1 1 1 0 0 0 0
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*
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* PINSEL2
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* -- -- -- -- -- -- -- -- -- -- -- -- -- -- GP DBG --
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* -- -- -- -- -- -- -- -- -- -- -- -- -- -- IO --
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* 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0 1 00
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* -- -- -- -- -- -- -- -- -- -- -- -- -- -- IN -- --
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*/
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#define VAL_PINSEL0 0x00055555
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#define VAL_PINSEL1 0x100840A8
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#define VAL_PINSEL2 0x00000004
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#define VAL_FIO0DIR 0xB0703C00
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#define VAL_FIO1DIR 0x00000000
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/*
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* Hardware initialization goes here.
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* NOTE: Interrupts are still disabled.
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*/
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void hwinit(void) {
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/*
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* All peripherals clock disabled by default in order to save power.
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*/
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PCONP = PCRTC | PCTIM0;
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/*
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* MAM setup.
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*/
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MAMTIM = 0x3; /* 3 cycles for flash accesses. */
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MAMCR = 0x2; /* MAM fully enabled. */
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/*
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* PLL setup for Fosc=12MHz and CCLK=48MHz.
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* P=2 M=3.
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*/
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PLL *pll = PLLBase;
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pll->PLL0_CFG = 0x23; /* P and M values. */
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pll->PLL0_CON = 0x1; /* Enalbles the PLL 0. */
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pll->PLL0_FEED = 0xAA;
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pll->PLL0_FEED = 0x55;
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while (!(pll->PLL0_STAT & 0x400))
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; /* Wait for PLL lock. */
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pll->PLL0_CON = 0x3; /* Connects the PLL. */
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pll->PLL0_FEED = 0xAA;
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pll->PLL0_FEED = 0x55;
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/*
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* VPB setup.
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* PCLK = CCLK / 4.
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*/
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VPBDIV = VPD_D4;
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/*
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* I/O pins configuration.
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*/
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PINSEL0 = VAL_PINSEL0;
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PINSEL1 = VAL_PINSEL1;
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PINSEL2 = VAL_PINSEL2;
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IO0DIR = VAL_FIO0DIR;
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IO0SET = 0xFFFFFFFF;
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IO1DIR = VAL_FIO1DIR;
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IO1SET = 0xFFFFFFFF;
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/*
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* Interrupt vectors assignment.
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*/
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InitVIC();
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VICDefVectAddr = (IOREG32)IrqHandler;
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/*
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* System Timer initialization, 1ms intervals.
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*/
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SetVICVector(T0IrqHandler, 0, SOURCE_Timer0);
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VICIntEnable = INTMASK(SOURCE_Timer0);
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TC *timer = T0Base;
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timer->TC_PR = VAL_TC0_PRESCALER;
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timer->TC_MR0 = (PCLK / CH_FREQUENCY) / (VAL_TC0_PRESCALER + 1);
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timer->TC_MCR = 3; /* Interrupt and clear TC on match MR0. */
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timer->TC_TCR = 2; /* Reset counter and prescaler. */
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timer->TC_TCR = 1; /* Timer enabled. */
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/*
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* Other subsystems.
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*/
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InitSerial(1, 2);
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InitSSP();
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InitMMC();
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InitBuzzer();
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}
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/*
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* System idle thread loop.
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@ -234,6 +117,7 @@ void IrqCommon(void) {
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*/
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asm(".set MODE_IRQ, 0x12 \n\t" \
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".set MODE_SYS, 0x1F \n\t" \
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".set F_BIT, 0x40 \n\t" \
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".set I_BIT, 0x80 \n\t" \
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"ldmfd sp!, {r0-r3, r12, lr} \n\t" \
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"msr CPSR_c, #MODE_SYS | I_BIT \n\t" \
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@ -275,8 +159,7 @@ void IrqCommon(void) {
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* NOTE: It is included into IrqCommon to make sure the symbol refers to
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* 32 bit code.
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*/
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asm(".set F_BIT, 0x40 \n\t" \
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".weak threadstart \n\t" \
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asm(".weak threadstart \n\t" \
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".globl threadstart \n\t" \
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"threadstart: \n\t" \
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"msr CPSR_c, #MODE_SYS \n\t");
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@ -303,20 +186,9 @@ void IrqCommon(void) {
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__attribute__((naked, weak))
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void chSysHalt(void) {
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asm(".set F_BIT, 0x40 \n\t" \
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".set I_BIT, 0x80 \n\t");
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#ifdef THUMB
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asm(".p2align 2,, \n\t" \
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"mov r0, pc \n\t" \
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asm("ldr r0, =_halt32 \n\t" \
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"bx r0 \n\t");
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#endif
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asm(".code 32 \n\t" \
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".weak _halt32 \n\t" \
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".globl _halt32 \n\t" \
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"_halt32: \n\t" \
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"mrs r0, CPSR \n\t" \
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"orr r0, #I_BIT | F_BIT \n\t" \
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"msr CPSR_c, r0 \n\t" \
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".loop: \n\t" \
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"b .loop \n\t");
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asm("b _halt32 \n\t");
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}
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@ -20,14 +20,6 @@
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#ifndef _CHCORE_H_
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#define _CHCORE_H_
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/*
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* The following values are implementation dependent. You may change them in
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* order to match your HW.
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*/
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#define FOSC 12000000
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#define CCLK 48000000
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#define PCLK 12000000
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typedef void *regarm;
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/*
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@ -17,7 +17,7 @@
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "chconf.h"
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#include <chconf.h>
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.set MODE_USR, 0x10
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.set MODE_FIQ, 0x11
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@ -136,6 +136,8 @@ bssloop:
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mov r1, r0
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bl main
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bl chSysHalt
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.weak hwinit
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hwinit: bx lr
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#else
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add r0, pc, #1
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bx r0
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@ -145,6 +147,8 @@ bssloop:
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mov r1, r0
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bl main
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bl chSysHalt
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.weak hwinit
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hwinit: bx lr
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.code 32
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#endif
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@ -167,4 +171,11 @@ AbortHandler:
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.weak FiqHandler
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.globl FiqHandler
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FiqHandler:
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b _halt32
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.weak _halt32
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.globl _halt32
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_halt32:
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mrs r0, CPSR
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orr r0, #I_BIT | F_BIT
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msr CPSR_c, r0
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.loop: b .loop
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@ -22,6 +22,7 @@
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#include "lpc214x.h"
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#include "vic.h"
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#include "lpc214x_serial.h"
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#include "board.h"
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FullDuplexDriver COM1;
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BYTE8 ib1[SERIAL_BUFFERS_SIZE];
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@ -57,6 +57,9 @@ AVR-AT90CANx-GCC - Port on AVR AT90CAN128, not complete yet.
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for details.
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- Most of the asm code previously in chcore2.s is now inline asm code in
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chcore.c (ARM port).
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- Moved all the board specific definitions/code into two new files: board.c
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and board.h. Moved all the files no more board-dependent under ports/
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(ARM port).
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*** 0.4.5 ***
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- Moved the serial IRQ handlers and VIC vectors initialization inside the
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