andreika-git
/
ChibiOS
mirror of https://github.com/andreika-git/ChibiOS.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

Missing definitions in G0 registry. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@12889 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
This commit is contained in:
Giovanni Di Sirio 2019-07-09 09:27:21 +00:00
parent deca37741b
commit ef53891490
2 changed files with 29 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
os/hal/ports/STM32/STM32G0xx/platform.mk
View File

@ -32,7 +32,7 @@ include $(CHIBIOS)/os/hal/ports/STM32/LLD/EXTIv1/driver.mk
include $(CHIBIOS)/os/hal/ports/STM32/LLD/GPIOv2/driver.mk
#include $(CHIBIOS)/os/hal/ports/STM32/LLD/I2Cv2/driver.mk
#include $(CHIBIOS)/os/hal/ports/STM32/LLD/RTCv2/driver.mk
#include $(CHIBIOS)/os/hal/ports/STM32/LLD/SPIv2/driver.mk
include $(CHIBIOS)/os/hal/ports/STM32/LLD/SPIv2/driver.mk
include $(CHIBIOS)/os/hal/ports/STM32/LLD/TIMv1/driver.mk
include $(CHIBIOS)/os/hal/ports/STM32/LLD/USARTv2/driver.mk
include $(CHIBIOS)/os/hal/ports/STM32/LLD/xWDGv1/driver.mk

30
os/hal/ports/STM32/STM32G0xx/stm32_registry.h
View File

@ -96,6 +96,7 @@
#define STM32_DMA_SUPPORTS_CSELR FALSE
#define STM32_DMA1_NUM_CHANNELS 7
#define STM32_DMA2_NUM_CHANNELS 0
#define STM32_DMA1_CH1_HANDLER Vector64
#define STM32_DMA1_CH23_HANDLER Vector68
#define STM32_DMA1_CH4567_HANDLER Vector6C
@ -103,7 +104,19 @@
#define STM32_DMA1_CH23_NUMBER 10
#define STM32_DMA1_CH4567_NUMBER 11
#define STM32_DMA2_NUM_CHANNELS 0
#define STM32_DMA1_CH2_NUMBER STM32_DMA1_CH23_NUMBER
#define STM32_DMA1_CH3_NUMBER STM32_DMA1_CH23_NUMBER
#define DMA1_CH2_CMASK 0x00000006U
#define DMA1_CH3_CMASK 0x00000006U
#define STM32_DMA1_CH4_NUMBER STM32_DMA1_CH4567_NUMBER
#define STM32_DMA1_CH5_NUMBER STM32_DMA1_CH4567_NUMBER
#define STM32_DMA1_CH6_NUMBER STM32_DMA1_CH4567_NUMBER
#define STM32_DMA1_CH7_NUMBER STM32_DMA1_CH4567_NUMBER
#define DMA1_CH4_CMASK 0x00000078U
#define DMA1_CH5_CMASK 0x00000078U
#define DMA1_CH6_CMASK 0x00000078U
#define DMA1_CH7_CMASK 0x00000078U
/* ETH attributes.*/
#define STM32_HAS_ETH FALSE
@ -292,6 +305,7 @@
#define STM32_DMA_SUPPORTS_CSELR FALSE
#define STM32_DMA1_NUM_CHANNELS 7
#define STM32_DMA2_NUM_CHANNELS 0
#define STM32_DMA1_CH1_HANDLER Vector64
#define STM32_DMA1_CH23_HANDLER Vector68
#define STM32_DMA1_CH4567_HANDLER Vector6C
@ -299,7 +313,19 @@
#define STM32_DMA1_CH23_NUMBER 10
#define STM32_DMA1_CH4567_NUMBER 11
#define STM32_DMA2_NUM_CHANNELS 0
#define STM32_DMA1_CH2_NUMBER STM32_DMA1_CH23_NUMBER
#define STM32_DMA1_CH3_NUMBER STM32_DMA1_CH23_NUMBER
#define DMA1_CH2_CMASK 0x00000006U
#define DMA1_CH3_CMASK 0x00000006U
#define STM32_DMA1_CH4_NUMBER STM32_DMA1_CH4567_NUMBER
#define STM32_DMA1_CH5_NUMBER STM32_DMA1_CH4567_NUMBER
#define STM32_DMA1_CH6_NUMBER STM32_DMA1_CH4567_NUMBER
#define STM32_DMA1_CH7_NUMBER STM32_DMA1_CH4567_NUMBER
#define DMA1_CH4_CMASK 0x00000078U
#define DMA1_CH5_CMASK 0x00000078U
#define DMA1_CH6_CMASK 0x00000078U
#define DMA1_CH7_CMASK 0x00000078U
/* ETH attributes.*/
#define STM32_HAS_ETH FALSE