git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@13498 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
This commit is contained in:
cinsights 2020-04-02 09:28:26 +00:00
parent 9958bc054f
commit fc9c65260b
2 changed files with 6 additions and 3 deletions

View File

@ -717,11 +717,11 @@
#if STM32_ADC_ADC123_CLOCK_MODE == ADC_CCR_CKMODE_ADCCK
#define STM32_ADC123_CLOCK (STM32_ADCCLK / ADC123_PRESC_VALUE)
#elif STM32_ADC_ADC123_CLOCK_MODE == ADC_CCR_CKMODE_AHB_DIV1
#define STM32_ADC123_CLOCK (STM32_HCLK / 1)
#define STM32_ADC123_CLOCK (STM32_ADCCLK / 1)
#elif STM32_ADC_ADC123_CLOCK_MODE == ADC_CCR_CKMODE_AHB_DIV2
#define STM32_ADC123_CLOCK (STM32_HCLK / 2)
#define STM32_ADC123_CLOCK (STM32_ADCCLK / 2)
#elif STM32_ADC_ADC123_CLOCK_MODE == ADC_CCR_CKMODE_AHB_DIV4
#define STM32_ADC123_CLOCK (STM32_HCLK / 4)
#define STM32_ADC123_CLOCK (STM32_ADCCLK / 4)
#else
#error "invalid clock mode selected for STM32_ADC_ADC123_CLOCK_MODE"
#endif

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@ -74,6 +74,8 @@
*****************************************************************************
*** Next ***
- FIX: Fixed incorrect clock check when using PLLSAI1R in ADCv3 (bug #1078)
(backported to 20.3.1).
- RT: Relocated the "ctx" field in the thread structure in order to save
some RAM, it caused unused space in the "ch" variable.
- EX: Added support for ADXL355 Low Noise, Low Drift, Low Power, 3-Axis
@ -86,3 +88,4 @@
(backported to 20.3.1).
- FIX: Fixed problem in chMtxUnlockAllS() (bug #1076).
(backported to 20.3.1)(backported to 19.1.4)(backported to 18.2.3).