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Added support for ADCv3 prescaler, fixed some G4-related problems. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@13370 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
This commit is contained in:
Giovanni Di Sirio 2020-02-19 14:08:01 +00:00
parent f0cb906a76
commit fd3218bd25
11 changed files with 110 additions and 18 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

111
os/hal/ports/STM32/LLD/ADCv3/hal_adc_lld.h
View File

@ -160,17 +160,17 @@
#if !defined(STM32F3XX) #if !defined(STM32F3XX)
#define ADC_CCR_PRESC_MASK (15 << 18) #define ADC_CCR_PRESC_MASK (15 << 18)
#define ADC_CCR_PRESC_NOCLOCK (0 << 18) #define ADC_CCR_PRESC_NOCLOCK (0 << 18)
#define ADC_CCR_PRESC_DIV_2 (1 << 18) #define ADC_CCR_PRESC_DIV2 (1 << 18)
#define ADC_CCR_PRESC_DIV_4 (2 << 18) #define ADC_CCR_PRESC_DIV4 (2 << 18)
#define ADC_CCR_PRESC_DIV_6 (3 << 18) #define ADC_CCR_PRESC_DIV6 (3 << 18)
#define ADC_CCR_PRESC_DIV_8 (4 << 18) #define ADC_CCR_PRESC_DIV8 (4 << 18)
#define ADC_CCR_PRESC_DIV_10 (5 << 18) #define ADC_CCR_PRESC_DIV10 (5 << 18)
#define ADC_CCR_PRESC_DIV_12 (6 << 18) #define ADC_CCR_PRESC_DIV12 (6 << 18)
#define ADC_CCR_PRESC_DIV_16 (7 << 18) #define ADC_CCR_PRESC_DIV16 (7 << 18)
#define ADC_CCR_PRESC_DIV_32 (8 << 18) #define ADC_CCR_PRESC_DIV32 (8 << 18)
#define ADC_CCR_PRESC_DIV_64 (9 << 18) #define ADC_CCR_PRESC_DIV64 (9 << 18)
#define ADC_CCR_PRESC_DIV_128 (10 << 18) #define ADC_CCR_PRESC_DIV128 (10 << 18)
#define ADC_CCR_PRESC_DIV_256 (11 << 18) #define ADC_CCR_PRESC_DIV256 (11 << 18)
#endif /* !defined(STM32F3XX) */ #endif /* !defined(STM32F3XX) */
/* F3 headers do not define the following macros, L4 headers do.*/ /* F3 headers do not define the following macros, L4 headers do.*/
@ -595,6 +595,89 @@
#endif /* !STM32_DMA_SUPPORTS_DMAMUX */ #endif /* !STM32_DMA_SUPPORTS_DMAMUX */
/* ADC clock prescaler checks.*/
#if defined(STM32F3XX)
#endif /* defined(STM32F3XX) */
#if defined(STM32L4XX) || defined(STM32L4XXP)
#if STM32_ADC_ADC123_PRESC == ADC_CCR_PRESC_DIV2
#define ADC123_PRESC_VALUE 2
#elif STM32_ADC_ADC123_PRESC == ADC_CCR_PRESC_DIV4
#define ADC123_PRESC_VALUE 4
#elif STM32_ADC_ADC123_PRESC == ADC_CCR_PRESC_DIV6
#define ADC123_PRESC_VALUE 6
#elif STM32_ADC_ADC123_PRESC == ADC_CCR_PRESC_DIV8
#define ADC123_PRESC_VALUE 8
#elif STM32_ADC_ADC123_PRESC == ADC_CCR_PRESC_DIV10
#define ADC123_PRESC_VALUE 10
#elif STM32_ADC_ADC123_PRESC == ADC_CCR_PRESC_DIV12
#define ADC123_PRESC_VALUE 12
#elif STM32_ADC_ADC123_PRESC == ADC_CCR_PRESC_DIV16
#define ADC123_PRESC_VALUE 16
#elif STM32_ADC_ADC123_PRESC == ADC_CCR_PRESC_DIV32
#define ADC123_PRESC_VALUE 32
#elif STM32_ADC_ADC123_PRESC == ADC_CCR_PRESC_DIV64
#define ADC123_PRESC_VALUE 64
#elif STM32_ADC_ADC123_PRESC == ADC_CCR_PRESC_DIV128
#define ADC123_PRESC_VALUE 128
#elif STM32_ADC_ADC123_PRESC == ADC_CCR_PRESC_DIV256
#define ADC123_PRESC_VALUE 256
#error "invalid clock divider selected for STM32_ADC_ADC12_PRESC"
#endif
#endif /* defined(STM32L4XX) || defined(STM32L4XXP) */
#if defined(STM32G4XX)
#if STM32_ADC_ADC12_PRESC == ADC_CCR_PRESC_DIV2
#define ADC12_PRESC_VALUE 2
#elif STM32_ADC_ADC12_PRESC == ADC_CCR_PRESC_DIV4
#define ADC12_PRESC_VALUE 4
#elif STM32_ADC_ADC12_PRESC == ADC_CCR_PRESC_DIV6
#define ADC12_PRESC_VALUE 6
#elif STM32_ADC_ADC12_PRESC == ADC_CCR_PRESC_DIV8
#define ADC12_PRESC_VALUE 8
#elif STM32_ADC_ADC12_PRESC == ADC_CCR_PRESC_DIV10
#define ADC12_PRESC_VALUE 10
#elif STM32_ADC_ADC12_PRESC == ADC_CCR_PRESC_DIV12
#define ADC12_PRESC_VALUE 12
#elif STM32_ADC_ADC12_PRESC == ADC_CCR_PRESC_DIV16
#define ADC12_PRESC_VALUE 16
#elif STM32_ADC_ADC12_PRESC == ADC_CCR_PRESC_DIV32
#define ADC12_PRESC_VALUE 32
#elif STM32_ADC_ADC12_PRESC == ADC_CCR_PRESC_DIV64
#define ADC12_PRESC_VALUE 64
#elif STM32_ADC_ADC12_PRESC == ADC_CCR_PRESC_DIV128
#define ADC12_PRESC_VALUE 128
#elif STM32_ADC_ADC12_PRESC == ADC_CCR_PRESC_DIV256
#define ADC12_PRESC_VALUE 256
#error "invalid clock divider selected for STM32_ADC_ADC12_PRESC"
#endif
#if STM32_ADC_ADC345_PRESC == ADC_CCR_PRESC_DIV2
#define ADC345_PRESC_VALUE 2
#elif STM32_ADC_ADC345_PRESC == ADC_CCR_PRESC_DIV4
#define ADC345_PRESC_VALUE 4
#elif STM32_ADC_ADC345_PRESC == ADC_CCR_PRESC_DIV6
#define ADC345_PRESC_VALUE 6
#elif STM32_ADC_ADC345_PRESC == ADC_CCR_PRESC_DIV8
#define ADC345_PRESC_VALUE 8
#elif STM32_ADC_ADC345_PRESC == ADC_CCR_PRESC_DIV10
#define ADC345_PRESC_VALUE 10
#elif STM32_ADC_ADC345_PRESC == ADC_CCR_PRESC_DIV12
#define ADC345_PRESC_VALUE 12
#elif STM32_ADC_ADC345_PRESC == ADC_CCR_PRESC_DIV16
#define ADC345_PRESC_VALUE 16
#elif STM32_ADC_ADC345_PRESC == ADC_CCR_PRESC_DIV32
#define ADC345_PRESC_VALUE 32
#elif STM32_ADC_ADC345_PRESC == ADC_CCR_PRESC_DIV64
#define ADC345_PRESC_VALUE 64
#elif STM32_ADC_ADC345_PRESC == ADC_CCR_PRESC_DIV128
#define ADC345_PRESC_VALUE 128
#elif STM32_ADC_ADC345_PRESC == ADC_CCR_PRESC_DIV256
#define ADC345_PRESC_VALUE 256
#error "invalid clock divider selected for STM32_ADC_ADC345_PRESC"
#endif
#endif /* defined(STM32G4XX) */
/* ADC clock source checks.*/ /* ADC clock source checks.*/
#if defined(STM32F3XX) #if defined(STM32F3XX)
#if STM32_ADC_ADC12_CLOCK_MODE == ADC_CCR_CKMODE_ADCCK #if STM32_ADC_ADC12_CLOCK_MODE == ADC_CCR_CKMODE_ADCCK
@ -632,7 +715,7 @@
#if defined(STM32L4XX) || defined(STM32L4XXP) #if defined(STM32L4XX) || defined(STM32L4XXP)
#if STM32_ADC_ADC123_CLOCK_MODE == ADC_CCR_CKMODE_ADCCK #if STM32_ADC_ADC123_CLOCK_MODE == ADC_CCR_CKMODE_ADCCK
#define STM32_ADC123_CLOCK STM32_ADCCLK #define STM32_ADC123_CLOCK (STM32_ADCCLK / ADC123_PRESC_VALUE)
#elif STM32_ADC_ADC123_CLOCK_MODE == ADC_CCR_CKMODE_AHB_DIV1 #elif STM32_ADC_ADC123_CLOCK_MODE == ADC_CCR_CKMODE_AHB_DIV1
#define STM32_ADC123_CLOCK (STM32_HCLK / 1) #define STM32_ADC123_CLOCK (STM32_HCLK / 1)
#elif STM32_ADC_ADC123_CLOCK_MODE == ADC_CCR_CKMODE_AHB_DIV2 #elif STM32_ADC_ADC123_CLOCK_MODE == ADC_CCR_CKMODE_AHB_DIV2
@ -650,7 +733,7 @@
#if defined(STM32G4XX) #if defined(STM32G4XX)
#if STM32_ADC_ADC12_CLOCK_MODE == ADC_CCR_CKMODE_ADCCK #if STM32_ADC_ADC12_CLOCK_MODE == ADC_CCR_CKMODE_ADCCK
#define STM32_ADC12_CLOCK STM32_ADC12CLK #define STM32_ADC12_CLOCK (STM32_ADC12CLK / ADC12_PRESC_VALUE)
#elif STM32_ADC_ADC12_CLOCK_MODE == ADC_CCR_CKMODE_AHB_DIV1 #elif STM32_ADC_ADC12_CLOCK_MODE == ADC_CCR_CKMODE_AHB_DIV1
#define STM32_ADC12_CLOCK (STM32_HCLK / 1) #define STM32_ADC12_CLOCK (STM32_HCLK / 1)
#elif STM32_ADC_ADC12_CLOCK_MODE == ADC_CCR_CKMODE_AHB_DIV2 #elif STM32_ADC_ADC12_CLOCK_MODE == ADC_CCR_CKMODE_AHB_DIV2
@ -662,7 +745,7 @@
#endif #endif
#if STM32_ADC_ADC345_CLOCK_MODE == ADC_CCR_CKMODE_ADCCK #if STM32_ADC_ADC345_CLOCK_MODE == ADC_CCR_CKMODE_ADCCK
#define STM32_ADC345_CLOCK STM32_ADC345CLK #define STM32_ADC345_CLOCK (STM32_ADC345CLK / ADC345_PRESC_VALUE)
#elif STM32_ADC_ADC345_CLOCK_MODE == ADC_CCR_CKMODE_AHB_DIV1 #elif STM32_ADC_ADC345_CLOCK_MODE == ADC_CCR_CKMODE_AHB_DIV1
#define STM32_ADC345_CLOCK (STM32_HCLK / 1) #define STM32_ADC345_CLOCK (STM32_HCLK / 1)
#elif STM32_ADC_ADC345_CLOCK_MODE == ADC_CCR_CKMODE_AHB_DIV2 #elif STM32_ADC_ADC345_CLOCK_MODE == ADC_CCR_CKMODE_AHB_DIV2

7
testhal/STM32/multi/ADC/.cproject
View File

@ -206,7 +206,7 @@
<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/> <storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
</cconfiguration> </cconfiguration>
<cconfiguration id="0.365230168.523175374.763979647.1974782146"> <cconfiguration id="0.365230168.523175374.763979647.1974782146">
<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="0.365230168.523175374.763979647.1974782146" moduleId="org.eclipse.cdt.core.settings" name="Build for STM32G474ZI-Nucleo144"> <storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="0.365230168.523175374.763979647.1974782146" moduleId="org.eclipse.cdt.core.settings" name="Build for STM32G474ZI-Nucleo64">
<externalSettings/> <externalSettings/>
<extensions> <extensions>
<extension id="org.eclipse.cdt.core.VCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/> <extension id="org.eclipse.cdt.core.VCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
@ -218,11 +218,11 @@
</extensions> </extensions>
</storageModule> </storageModule>
<storageModule moduleId="cdtBuildSystem" version="4.0.0"> <storageModule moduleId="cdtBuildSystem" version="4.0.0">
<configuration artifactName="${ProjName}" buildProperties="" description="" id="0.365230168.523175374.763979647.1974782146" name="Build for STM32G474ZI-Nucleo144" parent="org.eclipse.cdt.build.core.prefbase.cfg"> <configuration artifactName="${ProjName}" buildProperties="" description="" id="0.365230168.523175374.763979647.1974782146" name="Build for STM32G474ZI-Nucleo64" parent="org.eclipse.cdt.build.core.prefbase.cfg">
<folderInfo id="0.365230168.523175374.763979647.1974782146." name="/" resourcePath=""> <folderInfo id="0.365230168.523175374.763979647.1974782146." name="/" resourcePath="">
<toolChain id="org.eclipse.cdt.build.core.prefbase.toolchain.511439470" name="No ToolChain" resourceTypeBasedDiscovery="false" superClass="org.eclipse.cdt.build.core.prefbase.toolchain"> <toolChain id="org.eclipse.cdt.build.core.prefbase.toolchain.511439470" name="No ToolChain" resourceTypeBasedDiscovery="false" superClass="org.eclipse.cdt.build.core.prefbase.toolchain">
<targetPlatform id="org.eclipse.cdt.build.core.prefbase.toolchain.511439470.169033670" name=""/> <targetPlatform id="org.eclipse.cdt.build.core.prefbase.toolchain.511439470.169033670" name=""/>
<builder arguments="-f ./make/stm32g474zi_nucleo144.make" autoBuildTarget="all" cleanBuildTarget="clean" command="make" enableAutoBuild="false" enableCleanBuild="true" enabledIncrementalBuild="true" id="org.eclipse.cdt.build.core.settings.default.builder.368430737" incrementalBuildTarget="all" keepEnvironmentInBuildfile="false" managedBuildOn="false" name="Gnu Make Builder" parallelBuildOn="true" parallelizationNumber="optimal" superClass="org.eclipse.cdt.build.core.settings.default.builder"/> <builder arguments="-f ./make/stm32g474zi_nucleo64.make" autoBuildTarget="all" cleanBuildTarget="clean" command="make" enableAutoBuild="false" enableCleanBuild="true" enabledIncrementalBuild="true" id="org.eclipse.cdt.build.core.settings.default.builder.368430737" incrementalBuildTarget="all" keepEnvironmentInBuildfile="false" managedBuildOn="false" name="Gnu Make Builder" parallelBuildOn="true" parallelizationNumber="optimal" superClass="org.eclipse.cdt.build.core.settings.default.builder"/>
<tool id="org.eclipse.cdt.build.core.settings.holder.libs.1592545662" name="holder for library settings" superClass="org.eclipse.cdt.build.core.settings.holder.libs"/> <tool id="org.eclipse.cdt.build.core.settings.holder.libs.1592545662" name="holder for library settings" superClass="org.eclipse.cdt.build.core.settings.holder.libs"/>
<tool id="org.eclipse.cdt.build.core.settings.holder.1870255769" name="Assembly" superClass="org.eclipse.cdt.build.core.settings.holder"> <tool id="org.eclipse.cdt.build.core.settings.holder.1870255769" name="Assembly" superClass="org.eclipse.cdt.build.core.settings.holder">
<inputType id="org.eclipse.cdt.build.core.settings.holder.inType.1642322306" languageId="org.eclipse.cdt.core.assembly" languageName="Assembly" sourceContentType="org.eclipse.cdt.core.asmSource" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/> <inputType id="org.eclipse.cdt.build.core.settings.holder.inType.1642322306" languageId="org.eclipse.cdt.core.assembly" languageName="Assembly" sourceContentType="org.eclipse.cdt.core.asmSource" superClass="org.eclipse.cdt.build.core.settings.holder.inType"/>
@ -246,6 +246,7 @@
<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/> <storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
<storageModule moduleId="refreshScope" versionNumber="2"> <storageModule moduleId="refreshScope" versionNumber="2">
<configuration configurationName="Build for STM32L4R5ZI-Nucleo144"/> <configuration configurationName="Build for STM32L4R5ZI-Nucleo144"/>
<configuration configurationName="Build for STM32G474ZI-Nucleo144"/>
<configuration configurationName="Build for STM32H743ZI-Nucleo144"> <configuration configurationName="Build for STM32H743ZI-Nucleo144">
<resource resourceType="PROJECT" workspacePath="/STM32-ADC"/> <resource resourceType="PROJECT" workspacePath="/STM32-ADC"/>
</configuration> </configuration>

2
testhal/STM32/multi/ADC/Makefile
View File

@ -31,7 +31,7 @@ all:
clean: clean:
@echo @echo
-@make --no-print-directory -f ./make/stm32h743_nucleo144.make clean -@make --no-print-directory -f ./make/stm32h743zi_nucleo144.make clean
@echo @echo
+@make --no-print-directory -f ./make/stm32g071rb_nucleo64.make clean +@make --no-print-directory -f ./make/stm32g071rb_nucleo64.make clean
@echo @echo

0
testhal/STM32/multi/ADC/make/stm32g474zi_nucleo144.make → testhal/STM32/multi/ADC/make/stm32g474zi_nucleo64.make
View File

1
tools/ftl/processors/conf/mcuconf_stm32g4x1xx/mcuconf.h.ftl
View File

@ -145,6 +145,7 @@
#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY ${doc.STM32_ADC_ADC1_DMA_IRQ_PRIORITY!"5"} #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY ${doc.STM32_ADC_ADC1_DMA_IRQ_PRIORITY!"5"}
#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY ${doc.STM32_ADC_ADC2_DMA_IRQ_PRIORITY!"5"} #define STM32_ADC_ADC2_DMA_IRQ_PRIORITY ${doc.STM32_ADC_ADC2_DMA_IRQ_PRIORITY!"5"}
#define STM32_ADC_ADC12_CLOCK_MODE ${doc.STM32_ADC_ADC12_CLOCK_MODE!"ADC_CCR_CKMODE_AHB_DIV4"} #define STM32_ADC_ADC12_CLOCK_MODE ${doc.STM32_ADC_ADC12_CLOCK_MODE!"ADC_CCR_CKMODE_AHB_DIV4"}
#define STM32_ADC_ADC12_PRESC ${doc.STM32_ADC_ADC12_PRESC!"ADC_CCR_PRESC_DIV2"}
/* /*
* CAN driver system settings. * CAN driver system settings.

2
tools/ftl/processors/conf/mcuconf_stm32g4x4xx/mcuconf.h.ftl
View File

@ -166,6 +166,8 @@
#define STM32_ADC_ADC4_DMA_IRQ_PRIORITY ${doc.STM32_ADC_ADC4_DMA_IRQ_PRIORITY!"5"} #define STM32_ADC_ADC4_DMA_IRQ_PRIORITY ${doc.STM32_ADC_ADC4_DMA_IRQ_PRIORITY!"5"}
#define STM32_ADC_ADC12_CLOCK_MODE ${doc.STM32_ADC_ADC12_CLOCK_MODE!"ADC_CCR_CKMODE_AHB_DIV4"} #define STM32_ADC_ADC12_CLOCK_MODE ${doc.STM32_ADC_ADC12_CLOCK_MODE!"ADC_CCR_CKMODE_AHB_DIV4"}
#define STM32_ADC_ADC345_CLOCK_MODE ${doc.STM32_ADC_ADC345_CLOCK_MODE!"ADC_CCR_CKMODE_AHB_DIV4"} #define STM32_ADC_ADC345_CLOCK_MODE ${doc.STM32_ADC_ADC345_CLOCK_MODE!"ADC_CCR_CKMODE_AHB_DIV4"}
#define STM32_ADC_ADC12_PRESC ${doc.STM32_ADC_ADC12_PRESC!"ADC_CCR_PRESC_DIV2"}
#define STM32_ADC_ADC345_PRESC ${doc.STM32_ADC_ADC345_PRESC!"ADC_CCR_PRESC_DIV2"}
/* /*
* CAN driver system settings. * CAN driver system settings.

1
tools/ftl/processors/conf/mcuconf_stm32l432xx/mcuconf.h.ftl
View File

@ -136,6 +136,7 @@
#define STM32_ADC_ADC12_IRQ_PRIORITY ${doc.STM32_ADC_ADC12_IRQ_PRIORITY!"5"} #define STM32_ADC_ADC12_IRQ_PRIORITY ${doc.STM32_ADC_ADC12_IRQ_PRIORITY!"5"}
#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY ${doc.STM32_ADC_ADC1_DMA_IRQ_PRIORITY!"5"} #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY ${doc.STM32_ADC_ADC1_DMA_IRQ_PRIORITY!"5"}
#define STM32_ADC_ADC123_CLOCK_MODE ${doc.STM32_ADC_ADC123_CLOCK_MODE!"ADC_CCR_CKMODE_AHB_DIV1"} #define STM32_ADC_ADC123_CLOCK_MODE ${doc.STM32_ADC_ADC123_CLOCK_MODE!"ADC_CCR_CKMODE_AHB_DIV1"}
#define STM32_ADC_ADC123_PRESC ${doc.STM32_ADC_ADC123_PRESC!"ADC_CCR_PRESC_DIV2"}
/* /*
* CAN driver system settings. * CAN driver system settings.

1
tools/ftl/processors/conf/mcuconf_stm32l452xx/mcuconf.h.ftl
View File

@ -141,6 +141,7 @@
#define STM32_ADC_ADC12_IRQ_PRIORITY ${doc.STM32_ADC_ADC12_IRQ_PRIORITY!"5"} #define STM32_ADC_ADC12_IRQ_PRIORITY ${doc.STM32_ADC_ADC12_IRQ_PRIORITY!"5"}
#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY ${doc.STM32_ADC_ADC1_DMA_IRQ_PRIORITY!"5"} #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY ${doc.STM32_ADC_ADC1_DMA_IRQ_PRIORITY!"5"}
#define STM32_ADC_ADC123_CLOCK_MODE ${doc.STM32_ADC_ADC123_CLOCK_MODE!"ADC_CCR_CKMODE_AHB_DIV1"} #define STM32_ADC_ADC123_CLOCK_MODE ${doc.STM32_ADC_ADC123_CLOCK_MODE!"ADC_CCR_CKMODE_AHB_DIV1"}
#define STM32_ADC_ADC123_PRESC ${doc.STM32_ADC_ADC123_PRESC!"ADC_CCR_PRESC_DIV2"}
/* /*
* CAN driver system settings. * CAN driver system settings.

1
tools/ftl/processors/conf/mcuconf_stm32l476xx/mcuconf.h.ftl
View File

@ -160,6 +160,7 @@
#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY ${doc.STM32_ADC_ADC2_DMA_IRQ_PRIORITY!"5"} #define STM32_ADC_ADC2_DMA_IRQ_PRIORITY ${doc.STM32_ADC_ADC2_DMA_IRQ_PRIORITY!"5"}
#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY ${doc.STM32_ADC_ADC3_DMA_IRQ_PRIORITY!"5"} #define STM32_ADC_ADC3_DMA_IRQ_PRIORITY ${doc.STM32_ADC_ADC3_DMA_IRQ_PRIORITY!"5"}
#define STM32_ADC_ADC123_CLOCK_MODE ${doc.STM32_ADC_ADC123_CLOCK_MODE!"ADC_CCR_CKMODE_AHB_DIV1"} #define STM32_ADC_ADC123_CLOCK_MODE ${doc.STM32_ADC_ADC123_CLOCK_MODE!"ADC_CCR_CKMODE_AHB_DIV1"}
#define STM32_ADC_ADC123_PRESC ${doc.STM32_ADC_ADC123_PRESC!"ADC_CCR_PRESC_DIV2"}
/* /*
* CAN driver system settings. * CAN driver system settings.

1
tools/ftl/processors/conf/mcuconf_stm32l496xx/mcuconf.h.ftl
View File

@ -163,6 +163,7 @@
#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY ${doc.STM32_ADC_ADC2_DMA_IRQ_PRIORITY!"5"} #define STM32_ADC_ADC2_DMA_IRQ_PRIORITY ${doc.STM32_ADC_ADC2_DMA_IRQ_PRIORITY!"5"}
#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY ${doc.STM32_ADC_ADC3_DMA_IRQ_PRIORITY!"5"} #define STM32_ADC_ADC3_DMA_IRQ_PRIORITY ${doc.STM32_ADC_ADC3_DMA_IRQ_PRIORITY!"5"}
#define STM32_ADC_ADC123_CLOCK_MODE ${doc.STM32_ADC_ADC123_CLOCK_MODE!"ADC_CCR_CKMODE_AHB_DIV1"} #define STM32_ADC_ADC123_CLOCK_MODE ${doc.STM32_ADC_ADC123_CLOCK_MODE!"ADC_CCR_CKMODE_AHB_DIV1"}
#define STM32_ADC_ADC123_PRESC ${doc.STM32_ADC_ADC123_PRESC!"ADC_CCR_PRESC_DIV2"}
/* /*
* CAN driver system settings. * CAN driver system settings.

1
tools/ftl/processors/conf/mcuconf_stm32l4rxxx/mcuconf.h.ftl
View File

@ -168,6 +168,7 @@
#define STM32_ADC_ADC12_IRQ_PRIORITY ${doc.STM32_ADC_ADC12_IRQ_PRIORITY!"5"} #define STM32_ADC_ADC12_IRQ_PRIORITY ${doc.STM32_ADC_ADC12_IRQ_PRIORITY!"5"}
#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY ${doc.STM32_ADC_ADC1_DMA_IRQ_PRIORITY!"5"} #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY ${doc.STM32_ADC_ADC1_DMA_IRQ_PRIORITY!"5"}
#define STM32_ADC_ADC123_CLOCK_MODE ${doc.STM32_ADC_ADC123_CLOCK_MODE!"ADC_CCR_CKMODE_AHB_DIV2"} #define STM32_ADC_ADC123_CLOCK_MODE ${doc.STM32_ADC_ADC123_CLOCK_MODE!"ADC_CCR_CKMODE_AHB_DIV2"}
#define STM32_ADC_ADC123_PRESC ${doc.STM32_ADC_ADC123_PRESC!"ADC_CCR_PRESC_DIV2"}
/* /*
* CAN driver system settings. * CAN driver system settings.