git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@203 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
gdisirio
parent
0ea8e4c99f
commit
fe3c494529
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@ -62,8 +62,8 @@ UDEFS =
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UADEFS =
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# List ARM-mode C source files here
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ASRC = ../../ports/ARM7-LPC214x/GCC/chcore.c \
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../../ports/ARM7-LPC214x/GCC/vic.c \
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ASRC = ../../ports/ARM7-LPC214x/chcore.c \
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../../ports/ARM7-LPC214x/vic.c \
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../../src/chinit.c ../../src/chdebug.c ../../src/chlists.c ../../src/chdelta.c \
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../../src/chschd.c ../../src/chthreads.c ../../src/chsem.c ../../src/chmtx.c \
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../../src/chevents.c ../../src/chmsg.c ../../src/chsleep.c ../../src/chqueues.c \
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@ -76,10 +76,11 @@ ASRC = ../../ports/ARM7-LPC214x/GCC/chcore.c \
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TSRC =
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# List ASM source files here
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ASMSRC = ../../ports/ARM7-LPC214x/GCC/crt0.s
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ASMSRC = ../../ports/ARM7-LPC214x/crt0.s ../../ports/ARM7/chsys.s
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# List all user directories here
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UINCDIR = ../../src/include ../../src/lib ../../ports/ARM7-LPC214x/GCC
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UINCDIR = ../../src/include ../../src/lib \
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../../ports/ARM7 ../../ports/ARM7-LPC214x
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# List the user directory to look for the libraries here
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ULIBDIR =
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@ -128,6 +129,7 @@ ODFLAGS = -x --syms
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# Thumb interwork enabled only if needed because it kills performance.
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ifneq ($(TSRC),)
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CPFLAGS += -D THUMB_PRESENT
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ASFLAGS += -D THUMB_PRESENT
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ifneq ($(ASRC),)
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# Mixed ARM and THUMB case.
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CPFLAGS += -mthumb-interwork
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@ -155,7 +157,7 @@ $(AOBJS) : %.o : %.c
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$(TOBJS) : %.o : %.c
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@echo
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$(CC) -c $(CPFLAGS) $(TOPT) -mthumb -I . $(INCDIR) $< -o $@
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$(CC) -c $(CPFLAGS) $(TOPT) -I . $(INCDIR) $< -o $@
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$(ASMOBJS) : %.o : %.s
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@echo
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@ -67,8 +67,8 @@ ASRC =
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# List THUMB-mode C sources here
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# NOTE: If any module is compiled in thumb mode then -mthumb-interwork is
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# enabled for all modules and that lowers performance.
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TSRC = ../../ports/ARM7-LPC214x/GCC/chcore.c \
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../../ports/ARM7-LPC214x/GCC/vic.c \
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TSRC = ../../ports/ARM7-LPC214x/chcore.c \
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../../ports/ARM7-LPC214x/vic.c \
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../../src/chinit.c ../../src/chdebug.c ../../src/chlists.c ../../src/chdelta.c \
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../../src/chschd.c ../../src/chthreads.c ../../src/chsem.c ../../src/chmtx.c \
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../../src/chevents.c ../../src/chmsg.c ../../src/chsleep.c ../../src/chqueues.c \
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@ -76,10 +76,11 @@ TSRC = ../../ports/ARM7-LPC214x/GCC/chcore.c \
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board.c main.c
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# List ASM source files here
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ASMSRC = ../../ports/ARM7-LPC214x/GCC/crt0.s
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ASMSRC = ../../ports/ARM7-LPC214x/crt0.s ../../ports/ARM7/chsys.s
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# List all user directories here
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UINCDIR = ../../src/include ../../src/lib ../../ports/ARM7-LPC214x/GCC
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UINCDIR = ../../src/include ../../src/lib \
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../../ports/ARM7 ../../ports/ARM7-LPC214x
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# List the user directory to look for the libraries here
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ULIBDIR =
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@ -128,6 +129,7 @@ ODFLAGS = -x --syms
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# Thumb interwork enabled only if needed because it kills performance.
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ifneq ($(TSRC),)
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CPFLAGS += -D THUMB_PRESENT
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ASFLAGS += -D THUMB_PRESENT
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ifneq ($(ASRC),)
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# Mixed ARM and THUMB case.
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CPFLAGS += -mthumb-interwork
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@ -79,7 +79,7 @@ ASRC = ../../ports/ARM7-LPC214x/chcore.c \
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TSRC =
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# List ASM source files here
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ASMSRC = ../../ports/ARM7-LPC214x/crt0.s
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ASMSRC = ../../ports/ARM7-LPC214x/crt0.s ../../ports/ARM7/chsys.s
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# List all user directories here
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UINCDIR = ../../src/include ../../src/lib \
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@ -79,7 +79,7 @@ TSRC = ../../ports/ARM7-LPC214x/chcore.c \
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board.c buzzer.c mmcsd.c main.c
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# List ASM source files here
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ASMSRC = ../../ports/ARM7-LPC214x/crt0.s
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ASMSRC = ../../ports/ARM7-LPC214x/crt0.s ../../ports/ARM7/chsys.s
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# List all user directories here
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UINCDIR = ../../src/include ../../src/lib \
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@ -37,6 +37,7 @@ static void IrqHandler(void) {
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chSysIRQEnterI();
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/* nothing */
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VICVectAddr = 0;
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chSysIRQExitI();
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}
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@ -51,6 +52,7 @@ static void T0IrqHandler(void) {
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T0IR = 1; /* Clear interrupt on match MR0. */
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chSysTimerHandlerI();
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VICVectAddr = 0;
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chSysIRQExitI();
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}
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@ -33,194 +33,12 @@ void _IdleThread(void *p) {
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}
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}
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/*
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* The following functions are present only if there is in the system any
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* code compiled as THUMB that may invoke them.
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* NOTE: The undefs are there in case this module is compiled in ARM mode but
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* there are THUMB modules in the system.
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*/
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#ifdef THUMB_PRESENT
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#undef chSysLock
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void chSysLock(void) {
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#ifdef THUMB
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asm(".p2align 2,, \n\t" \
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"mov r0, pc \n\t" \
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"bx r0 \n\t" \
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".code 32 \n\t");
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#endif
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asm("msr CPSR_c, #0x9F \n\t" \
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"bx lr \n\t");
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}
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#undef chSysUnlock
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void chSysUnlock(void) {
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#ifdef THUMB
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asm(".p2align 2,, \n\t" \
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"mov r0, pc \n\t" \
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"bx r0 \n\t" \
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".code 32 \n\t");
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#endif
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asm("msr CPSR_c, #0x1F \n\t" \
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"bx lr \n\t");
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}
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#endif
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void chSysSwitchI(Thread *otp, Thread *ntp) {
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#ifdef THUMB
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asm(".p2align 2,, \n\t" \
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"mov r2, pc \n\t" \
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"bx r2 \n\t" \
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".code 32 \n\t");
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#endif
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#ifdef CH_CURRP_REGISTER_CACHE
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asm("stmfd sp!, {r4, r5, r6, r8, r9, r10, r11, lr} \n\t" \
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"str sp, [r0, #16] \n\t" \
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"ldr sp, [r1, #16] \n\t");
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#ifdef THUMB_PRESENT
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asm("ldmfd sp!, {r4, r5, r6, r8, r9, r10, r11, lr} \n\t" \
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"bx lr \n\t");
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#else /* !THUMB_PRESENT */
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asm("ldmfd sp!, {r4, r5, r6, r8, r9, r10, r11, pc} \n\t");
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#endif /* !THUMB_PRESENT */
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#else /* !CH_CURRP_REGISTER_CACHE */
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asm("stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, r11, lr} \n\t" \
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"str sp, [r0, #16] \n\t" \
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"ldr sp, [r1, #16] \n\t");
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#ifdef THUMB_PRESENT
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asm("ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, r11, lr} \n\t" \
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"bx lr \n\t");
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#else /* !THUMB_PRESENT */
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asm("ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, r11, pc} \n\t");
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#endif /* !THUMB_PRESENT */
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#endif /* !CH_CURRP_REGISTER_CACHE */
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}
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/*
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* System console message (not implemented).
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*/
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void chSysPuts(char *msg) {
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}
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/*
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* Common IRQ exit code, \p chSysIRQExitI() just jumps here.
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*
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* System stack frame structure after a context switch in the
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* interrupt handler:
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*
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* High +------------+
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* | LR_USR | -+
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* | R12 | |
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* | R3 | |
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* | R2 | | External context: IRQ handler frame
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* | R1 | |
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* | R0 | |
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* | LR_IRQ | | (user code return address)
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* | SPSR | -+ (user code status)
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* | .... | <- chSchDoRescheduleI() stack frame, optimize it for space
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* | LR | -+ (system code return address)
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* | R11 | |
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* | R10 | |
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* | R9 | |
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* | R8 | | Internal context: chSysSwitchI() frame
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* | (R7) | | (optional, see CH_CURRP_REGISTER_CACHE)
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* | R6 | |
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* | R5 | |
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* SP-> | R4 | -+
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* Low +------------+
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*/
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__attribute__((naked, weak))
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void IrqCommon(void) {
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register BOOL b asm("r0");
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VICVectAddr = 0;
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b = chSchRescRequiredI();
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#ifdef THUMB
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asm(".p2align 2,, \n\t" \
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"mov lr, pc \n\t" \
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"bx lr \n\t" \
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".code 32 \n\t");
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#endif
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/*
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* If a reschedulation is not required then just returns from the IRQ.
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*/
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asm("cmp r0, #0 \n\t" \
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"ldmeqfd sp!, {r0-r3, r12, lr} \n\t" \
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"subeqs pc, lr, #4 \n\t");
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/*
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* Reschedulation required, saves the external context on the
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* system/user stack and empties the IRQ stack.
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*/
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asm(".set MODE_IRQ, 0x12 \n\t" \
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".set MODE_SYS, 0x1F \n\t" \
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".set F_BIT, 0x40 \n\t" \
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".set I_BIT, 0x80 \n\t" \
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"ldmfd sp!, {r0-r3, r12, lr} \n\t" \
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"msr CPSR_c, #MODE_SYS | I_BIT \n\t" \
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"stmfd sp!, {r0-r3, r12, lr} \n\t" \
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"msr CPSR_c, #MODE_IRQ | I_BIT \n\t" \
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"mrs r0, SPSR \n\t" \
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"mov r1, lr \n\t" \
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"msr CPSR_c, #MODE_SYS | I_BIT \n\t" \
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"stmfd sp!, {r0, r1} \n\t");
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#ifdef THUMB_NO_INTERWORKING
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asm("add r0, pc, #1 \n\t" \
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"bx r0 \n\t" \
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".code 16 \n\t" \
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"bl chSchDoRescheduleI \n\t" \
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".p2align 2,, \n\t" \
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"mov lr, pc \n\t" \
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"bx lr \n\t" \
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".code 32 \n\t");
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#else
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asm("bl chSchDoRescheduleI \n\t");
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#endif
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/*
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* Restores the external context.
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*/
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asm("ldmfd sp!, {r0, r1} \n\t" \
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"msr CPSR_c, #MODE_IRQ | I_BIT \n\t" \
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"msr SPSR_fsxc, r0 \n\t" \
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"mov lr, r1 \n\t" \
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"msr CPSR_c, #MODE_SYS | I_BIT \n\t" \
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"ldmfd sp!, {r0-r3, r12, lr} \n\t" \
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"msr CPSR_c, #MODE_IRQ | I_BIT \n\t" \
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"subs pc, lr, #4 \n\t");
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/*
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* Threads entry/exit code. It is declared weak so you can easily replace it.
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* NOTE: It is always invoked in ARM mode, it does the mode switching.
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* NOTE: It is included into IrqCommon to make sure the symbol refers to
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* 32 bit code.
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*/
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asm(".weak threadstart \n\t" \
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".globl threadstart \n\t" \
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"threadstart: \n\t" \
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"msr CPSR_c, #MODE_SYS \n\t");
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#ifndef THUMB_NO_INTERWORKING
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asm("mov r0, r5 \n\t" \
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"mov lr, pc \n\t" \
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"bx r4 \n\t" \
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"bl chThdExit \n\t");
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#else
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asm("add r0, pc, #1 \n\t" \
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"bx r0 \n\t" \
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".code 16 \n\t" \
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"mov r0, r5 \n\t" \
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"bl jmpr4 \n\t" \
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"bl chThdExit \n\t" \
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"jmpr4: \n\t" \
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"bx r4 \n\t");
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#endif
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}
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/*
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* System halt.
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*/
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void chSysHalt(void) {
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#ifdef THUMB
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asm("ldr r0, =_halt32 \n\t" \
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"bx r0 \n\t");
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asm("b _halt16");
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#else
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asm("b _halt32");
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#endif
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asm("b _halt32 \n\t");
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}
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@ -169,10 +169,4 @@ AbortHandler:
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.globl FiqHandler
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FiqHandler:
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.weak _halt32
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.globl _halt32
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_halt32:
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mrs r0, CPSR
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orr r0, #I_BIT | F_BIT
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msr CPSR_c, r0
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.loop: b .loop
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@ -101,6 +101,7 @@ void UART0IrqHandler(void) {
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chSysIRQEnterI();
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ServeInterrupt(U0Base, &COM1);
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VICVectAddr = 0;
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chSysIRQExitI();
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}
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@ -111,6 +112,7 @@ void UART1IrqHandler(void) {
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chSysIRQEnterI();
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ServeInterrupt(U1Base, &COM2);
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VICVectAddr = 0;
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chSysIRQExitI();
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}
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