git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@203 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
parent
0ea8e4c99f
commit
fe3c494529
|
@ -62,8 +62,8 @@ UDEFS =
|
||||||
UADEFS =
|
UADEFS =
|
||||||
|
|
||||||
# List ARM-mode C source files here
|
# List ARM-mode C source files here
|
||||||
ASRC = ../../ports/ARM7-LPC214x/GCC/chcore.c \
|
ASRC = ../../ports/ARM7-LPC214x/chcore.c \
|
||||||
../../ports/ARM7-LPC214x/GCC/vic.c \
|
../../ports/ARM7-LPC214x/vic.c \
|
||||||
../../src/chinit.c ../../src/chdebug.c ../../src/chlists.c ../../src/chdelta.c \
|
../../src/chinit.c ../../src/chdebug.c ../../src/chlists.c ../../src/chdelta.c \
|
||||||
../../src/chschd.c ../../src/chthreads.c ../../src/chsem.c ../../src/chmtx.c \
|
../../src/chschd.c ../../src/chthreads.c ../../src/chsem.c ../../src/chmtx.c \
|
||||||
../../src/chevents.c ../../src/chmsg.c ../../src/chsleep.c ../../src/chqueues.c \
|
../../src/chevents.c ../../src/chmsg.c ../../src/chsleep.c ../../src/chqueues.c \
|
||||||
|
@ -76,10 +76,11 @@ ASRC = ../../ports/ARM7-LPC214x/GCC/chcore.c \
|
||||||
TSRC =
|
TSRC =
|
||||||
|
|
||||||
# List ASM source files here
|
# List ASM source files here
|
||||||
ASMSRC = ../../ports/ARM7-LPC214x/GCC/crt0.s
|
ASMSRC = ../../ports/ARM7-LPC214x/crt0.s ../../ports/ARM7/chsys.s
|
||||||
|
|
||||||
# List all user directories here
|
# List all user directories here
|
||||||
UINCDIR = ../../src/include ../../src/lib ../../ports/ARM7-LPC214x/GCC
|
UINCDIR = ../../src/include ../../src/lib \
|
||||||
|
../../ports/ARM7 ../../ports/ARM7-LPC214x
|
||||||
|
|
||||||
# List the user directory to look for the libraries here
|
# List the user directory to look for the libraries here
|
||||||
ULIBDIR =
|
ULIBDIR =
|
||||||
|
@ -128,6 +129,7 @@ ODFLAGS = -x --syms
|
||||||
# Thumb interwork enabled only if needed because it kills performance.
|
# Thumb interwork enabled only if needed because it kills performance.
|
||||||
ifneq ($(TSRC),)
|
ifneq ($(TSRC),)
|
||||||
CPFLAGS += -D THUMB_PRESENT
|
CPFLAGS += -D THUMB_PRESENT
|
||||||
|
ASFLAGS += -D THUMB_PRESENT
|
||||||
ifneq ($(ASRC),)
|
ifneq ($(ASRC),)
|
||||||
# Mixed ARM and THUMB case.
|
# Mixed ARM and THUMB case.
|
||||||
CPFLAGS += -mthumb-interwork
|
CPFLAGS += -mthumb-interwork
|
||||||
|
@ -155,7 +157,7 @@ $(AOBJS) : %.o : %.c
|
||||||
|
|
||||||
$(TOBJS) : %.o : %.c
|
$(TOBJS) : %.o : %.c
|
||||||
@echo
|
@echo
|
||||||
$(CC) -c $(CPFLAGS) $(TOPT) -mthumb -I . $(INCDIR) $< -o $@
|
$(CC) -c $(CPFLAGS) $(TOPT) -I . $(INCDIR) $< -o $@
|
||||||
|
|
||||||
$(ASMOBJS) : %.o : %.s
|
$(ASMOBJS) : %.o : %.s
|
||||||
@echo
|
@echo
|
||||||
|
|
|
@ -67,8 +67,8 @@ ASRC =
|
||||||
# List THUMB-mode C sources here
|
# List THUMB-mode C sources here
|
||||||
# NOTE: If any module is compiled in thumb mode then -mthumb-interwork is
|
# NOTE: If any module is compiled in thumb mode then -mthumb-interwork is
|
||||||
# enabled for all modules and that lowers performance.
|
# enabled for all modules and that lowers performance.
|
||||||
TSRC = ../../ports/ARM7-LPC214x/GCC/chcore.c \
|
TSRC = ../../ports/ARM7-LPC214x/chcore.c \
|
||||||
../../ports/ARM7-LPC214x/GCC/vic.c \
|
../../ports/ARM7-LPC214x/vic.c \
|
||||||
../../src/chinit.c ../../src/chdebug.c ../../src/chlists.c ../../src/chdelta.c \
|
../../src/chinit.c ../../src/chdebug.c ../../src/chlists.c ../../src/chdelta.c \
|
||||||
../../src/chschd.c ../../src/chthreads.c ../../src/chsem.c ../../src/chmtx.c \
|
../../src/chschd.c ../../src/chthreads.c ../../src/chsem.c ../../src/chmtx.c \
|
||||||
../../src/chevents.c ../../src/chmsg.c ../../src/chsleep.c ../../src/chqueues.c \
|
../../src/chevents.c ../../src/chmsg.c ../../src/chsleep.c ../../src/chqueues.c \
|
||||||
|
@ -76,10 +76,11 @@ TSRC = ../../ports/ARM7-LPC214x/GCC/chcore.c \
|
||||||
board.c main.c
|
board.c main.c
|
||||||
|
|
||||||
# List ASM source files here
|
# List ASM source files here
|
||||||
ASMSRC = ../../ports/ARM7-LPC214x/GCC/crt0.s
|
ASMSRC = ../../ports/ARM7-LPC214x/crt0.s ../../ports/ARM7/chsys.s
|
||||||
|
|
||||||
# List all user directories here
|
# List all user directories here
|
||||||
UINCDIR = ../../src/include ../../src/lib ../../ports/ARM7-LPC214x/GCC
|
UINCDIR = ../../src/include ../../src/lib \
|
||||||
|
../../ports/ARM7 ../../ports/ARM7-LPC214x
|
||||||
|
|
||||||
# List the user directory to look for the libraries here
|
# List the user directory to look for the libraries here
|
||||||
ULIBDIR =
|
ULIBDIR =
|
||||||
|
@ -128,6 +129,7 @@ ODFLAGS = -x --syms
|
||||||
# Thumb interwork enabled only if needed because it kills performance.
|
# Thumb interwork enabled only if needed because it kills performance.
|
||||||
ifneq ($(TSRC),)
|
ifneq ($(TSRC),)
|
||||||
CPFLAGS += -D THUMB_PRESENT
|
CPFLAGS += -D THUMB_PRESENT
|
||||||
|
ASFLAGS += -D THUMB_PRESENT
|
||||||
ifneq ($(ASRC),)
|
ifneq ($(ASRC),)
|
||||||
# Mixed ARM and THUMB case.
|
# Mixed ARM and THUMB case.
|
||||||
CPFLAGS += -mthumb-interwork
|
CPFLAGS += -mthumb-interwork
|
||||||
|
|
|
@ -79,7 +79,7 @@ ASRC = ../../ports/ARM7-LPC214x/chcore.c \
|
||||||
TSRC =
|
TSRC =
|
||||||
|
|
||||||
# List ASM source files here
|
# List ASM source files here
|
||||||
ASMSRC = ../../ports/ARM7-LPC214x/crt0.s
|
ASMSRC = ../../ports/ARM7-LPC214x/crt0.s ../../ports/ARM7/chsys.s
|
||||||
|
|
||||||
# List all user directories here
|
# List all user directories here
|
||||||
UINCDIR = ../../src/include ../../src/lib \
|
UINCDIR = ../../src/include ../../src/lib \
|
||||||
|
|
|
@ -79,7 +79,7 @@ TSRC = ../../ports/ARM7-LPC214x/chcore.c \
|
||||||
board.c buzzer.c mmcsd.c main.c
|
board.c buzzer.c mmcsd.c main.c
|
||||||
|
|
||||||
# List ASM source files here
|
# List ASM source files here
|
||||||
ASMSRC = ../../ports/ARM7-LPC214x/crt0.s
|
ASMSRC = ../../ports/ARM7-LPC214x/crt0.s ../../ports/ARM7/chsys.s
|
||||||
|
|
||||||
# List all user directories here
|
# List all user directories here
|
||||||
UINCDIR = ../../src/include ../../src/lib \
|
UINCDIR = ../../src/include ../../src/lib \
|
||||||
|
|
|
@ -37,6 +37,7 @@ static void IrqHandler(void) {
|
||||||
chSysIRQEnterI();
|
chSysIRQEnterI();
|
||||||
|
|
||||||
/* nothing */
|
/* nothing */
|
||||||
|
VICVectAddr = 0;
|
||||||
|
|
||||||
chSysIRQExitI();
|
chSysIRQExitI();
|
||||||
}
|
}
|
||||||
|
@ -51,6 +52,7 @@ static void T0IrqHandler(void) {
|
||||||
|
|
||||||
T0IR = 1; /* Clear interrupt on match MR0. */
|
T0IR = 1; /* Clear interrupt on match MR0. */
|
||||||
chSysTimerHandlerI();
|
chSysTimerHandlerI();
|
||||||
|
VICVectAddr = 0;
|
||||||
|
|
||||||
chSysIRQExitI();
|
chSysIRQExitI();
|
||||||
}
|
}
|
||||||
|
|
|
@ -33,194 +33,12 @@ void _IdleThread(void *p) {
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
|
||||||
* The following functions are present only if there is in the system any
|
|
||||||
* code compiled as THUMB that may invoke them.
|
|
||||||
* NOTE: The undefs are there in case this module is compiled in ARM mode but
|
|
||||||
* there are THUMB modules in the system.
|
|
||||||
*/
|
|
||||||
#ifdef THUMB_PRESENT
|
|
||||||
#undef chSysLock
|
|
||||||
void chSysLock(void) {
|
|
||||||
|
|
||||||
#ifdef THUMB
|
|
||||||
asm(".p2align 2,, \n\t" \
|
|
||||||
"mov r0, pc \n\t" \
|
|
||||||
"bx r0 \n\t" \
|
|
||||||
".code 32 \n\t");
|
|
||||||
#endif
|
|
||||||
|
|
||||||
asm("msr CPSR_c, #0x9F \n\t" \
|
|
||||||
"bx lr \n\t");
|
|
||||||
}
|
|
||||||
|
|
||||||
#undef chSysUnlock
|
|
||||||
void chSysUnlock(void) {
|
|
||||||
|
|
||||||
#ifdef THUMB
|
|
||||||
asm(".p2align 2,, \n\t" \
|
|
||||||
"mov r0, pc \n\t" \
|
|
||||||
"bx r0 \n\t" \
|
|
||||||
".code 32 \n\t");
|
|
||||||
#endif
|
|
||||||
|
|
||||||
asm("msr CPSR_c, #0x1F \n\t" \
|
|
||||||
"bx lr \n\t");
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
|
|
||||||
void chSysSwitchI(Thread *otp, Thread *ntp) {
|
|
||||||
|
|
||||||
#ifdef THUMB
|
|
||||||
asm(".p2align 2,, \n\t" \
|
|
||||||
"mov r2, pc \n\t" \
|
|
||||||
"bx r2 \n\t" \
|
|
||||||
".code 32 \n\t");
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#ifdef CH_CURRP_REGISTER_CACHE
|
|
||||||
asm("stmfd sp!, {r4, r5, r6, r8, r9, r10, r11, lr} \n\t" \
|
|
||||||
"str sp, [r0, #16] \n\t" \
|
|
||||||
"ldr sp, [r1, #16] \n\t");
|
|
||||||
#ifdef THUMB_PRESENT
|
|
||||||
asm("ldmfd sp!, {r4, r5, r6, r8, r9, r10, r11, lr} \n\t" \
|
|
||||||
"bx lr \n\t");
|
|
||||||
#else /* !THUMB_PRESENT */
|
|
||||||
asm("ldmfd sp!, {r4, r5, r6, r8, r9, r10, r11, pc} \n\t");
|
|
||||||
#endif /* !THUMB_PRESENT */
|
|
||||||
#else /* !CH_CURRP_REGISTER_CACHE */
|
|
||||||
asm("stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, r11, lr} \n\t" \
|
|
||||||
"str sp, [r0, #16] \n\t" \
|
|
||||||
"ldr sp, [r1, #16] \n\t");
|
|
||||||
#ifdef THUMB_PRESENT
|
|
||||||
asm("ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, r11, lr} \n\t" \
|
|
||||||
"bx lr \n\t");
|
|
||||||
#else /* !THUMB_PRESENT */
|
|
||||||
asm("ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, r11, pc} \n\t");
|
|
||||||
#endif /* !THUMB_PRESENT */
|
|
||||||
#endif /* !CH_CURRP_REGISTER_CACHE */
|
|
||||||
}
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* System console message (not implemented).
|
* System console message (not implemented).
|
||||||
*/
|
*/
|
||||||
void chSysPuts(char *msg) {
|
void chSysPuts(char *msg) {
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
|
||||||
* Common IRQ exit code, \p chSysIRQExitI() just jumps here.
|
|
||||||
*
|
|
||||||
* System stack frame structure after a context switch in the
|
|
||||||
* interrupt handler:
|
|
||||||
*
|
|
||||||
* High +------------+
|
|
||||||
* | LR_USR | -+
|
|
||||||
* | R12 | |
|
|
||||||
* | R3 | |
|
|
||||||
* | R2 | | External context: IRQ handler frame
|
|
||||||
* | R1 | |
|
|
||||||
* | R0 | |
|
|
||||||
* | LR_IRQ | | (user code return address)
|
|
||||||
* | SPSR | -+ (user code status)
|
|
||||||
* | .... | <- chSchDoRescheduleI() stack frame, optimize it for space
|
|
||||||
* | LR | -+ (system code return address)
|
|
||||||
* | R11 | |
|
|
||||||
* | R10 | |
|
|
||||||
* | R9 | |
|
|
||||||
* | R8 | | Internal context: chSysSwitchI() frame
|
|
||||||
* | (R7) | | (optional, see CH_CURRP_REGISTER_CACHE)
|
|
||||||
* | R6 | |
|
|
||||||
* | R5 | |
|
|
||||||
* SP-> | R4 | -+
|
|
||||||
* Low +------------+
|
|
||||||
*/
|
|
||||||
__attribute__((naked, weak))
|
|
||||||
void IrqCommon(void) {
|
|
||||||
register BOOL b asm("r0");
|
|
||||||
|
|
||||||
VICVectAddr = 0;
|
|
||||||
b = chSchRescRequiredI();
|
|
||||||
#ifdef THUMB
|
|
||||||
asm(".p2align 2,, \n\t" \
|
|
||||||
"mov lr, pc \n\t" \
|
|
||||||
"bx lr \n\t" \
|
|
||||||
".code 32 \n\t");
|
|
||||||
#endif
|
|
||||||
/*
|
|
||||||
* If a reschedulation is not required then just returns from the IRQ.
|
|
||||||
*/
|
|
||||||
asm("cmp r0, #0 \n\t" \
|
|
||||||
"ldmeqfd sp!, {r0-r3, r12, lr} \n\t" \
|
|
||||||
"subeqs pc, lr, #4 \n\t");
|
|
||||||
/*
|
|
||||||
* Reschedulation required, saves the external context on the
|
|
||||||
* system/user stack and empties the IRQ stack.
|
|
||||||
*/
|
|
||||||
asm(".set MODE_IRQ, 0x12 \n\t" \
|
|
||||||
".set MODE_SYS, 0x1F \n\t" \
|
|
||||||
".set F_BIT, 0x40 \n\t" \
|
|
||||||
".set I_BIT, 0x80 \n\t" \
|
|
||||||
"ldmfd sp!, {r0-r3, r12, lr} \n\t" \
|
|
||||||
"msr CPSR_c, #MODE_SYS | I_BIT \n\t" \
|
|
||||||
"stmfd sp!, {r0-r3, r12, lr} \n\t" \
|
|
||||||
"msr CPSR_c, #MODE_IRQ | I_BIT \n\t" \
|
|
||||||
"mrs r0, SPSR \n\t" \
|
|
||||||
"mov r1, lr \n\t" \
|
|
||||||
"msr CPSR_c, #MODE_SYS | I_BIT \n\t" \
|
|
||||||
"stmfd sp!, {r0, r1} \n\t");
|
|
||||||
|
|
||||||
#ifdef THUMB_NO_INTERWORKING
|
|
||||||
asm("add r0, pc, #1 \n\t" \
|
|
||||||
"bx r0 \n\t" \
|
|
||||||
".code 16 \n\t" \
|
|
||||||
"bl chSchDoRescheduleI \n\t" \
|
|
||||||
".p2align 2,, \n\t" \
|
|
||||||
"mov lr, pc \n\t" \
|
|
||||||
"bx lr \n\t" \
|
|
||||||
".code 32 \n\t");
|
|
||||||
#else
|
|
||||||
asm("bl chSchDoRescheduleI \n\t");
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Restores the external context.
|
|
||||||
*/
|
|
||||||
asm("ldmfd sp!, {r0, r1} \n\t" \
|
|
||||||
"msr CPSR_c, #MODE_IRQ | I_BIT \n\t" \
|
|
||||||
"msr SPSR_fsxc, r0 \n\t" \
|
|
||||||
"mov lr, r1 \n\t" \
|
|
||||||
"msr CPSR_c, #MODE_SYS | I_BIT \n\t" \
|
|
||||||
"ldmfd sp!, {r0-r3, r12, lr} \n\t" \
|
|
||||||
"msr CPSR_c, #MODE_IRQ | I_BIT \n\t" \
|
|
||||||
"subs pc, lr, #4 \n\t");
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Threads entry/exit code. It is declared weak so you can easily replace it.
|
|
||||||
* NOTE: It is always invoked in ARM mode, it does the mode switching.
|
|
||||||
* NOTE: It is included into IrqCommon to make sure the symbol refers to
|
|
||||||
* 32 bit code.
|
|
||||||
*/
|
|
||||||
asm(".weak threadstart \n\t" \
|
|
||||||
".globl threadstart \n\t" \
|
|
||||||
"threadstart: \n\t" \
|
|
||||||
"msr CPSR_c, #MODE_SYS \n\t");
|
|
||||||
#ifndef THUMB_NO_INTERWORKING
|
|
||||||
asm("mov r0, r5 \n\t" \
|
|
||||||
"mov lr, pc \n\t" \
|
|
||||||
"bx r4 \n\t" \
|
|
||||||
"bl chThdExit \n\t");
|
|
||||||
#else
|
|
||||||
asm("add r0, pc, #1 \n\t" \
|
|
||||||
"bx r0 \n\t" \
|
|
||||||
".code 16 \n\t" \
|
|
||||||
"mov r0, r5 \n\t" \
|
|
||||||
"bl jmpr4 \n\t" \
|
|
||||||
"bl chThdExit \n\t" \
|
|
||||||
"jmpr4: \n\t" \
|
|
||||||
"bx r4 \n\t");
|
|
||||||
#endif
|
|
||||||
}
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* System halt.
|
* System halt.
|
||||||
*/
|
*/
|
||||||
|
@ -228,8 +46,8 @@ __attribute__((naked, weak))
|
||||||
void chSysHalt(void) {
|
void chSysHalt(void) {
|
||||||
|
|
||||||
#ifdef THUMB
|
#ifdef THUMB
|
||||||
asm("ldr r0, =_halt32 \n\t" \
|
asm("b _halt16");
|
||||||
"bx r0 \n\t");
|
#else
|
||||||
|
asm("b _halt32");
|
||||||
#endif
|
#endif
|
||||||
asm("b _halt32 \n\t");
|
|
||||||
}
|
}
|
||||||
|
|
|
@ -169,10 +169,4 @@ AbortHandler:
|
||||||
.globl FiqHandler
|
.globl FiqHandler
|
||||||
FiqHandler:
|
FiqHandler:
|
||||||
|
|
||||||
.weak _halt32
|
|
||||||
.globl _halt32
|
|
||||||
_halt32:
|
|
||||||
mrs r0, CPSR
|
|
||||||
orr r0, #I_BIT | F_BIT
|
|
||||||
msr CPSR_c, r0
|
|
||||||
.loop: b .loop
|
.loop: b .loop
|
||||||
|
|
|
@ -101,6 +101,7 @@ void UART0IrqHandler(void) {
|
||||||
chSysIRQEnterI();
|
chSysIRQEnterI();
|
||||||
|
|
||||||
ServeInterrupt(U0Base, &COM1);
|
ServeInterrupt(U0Base, &COM1);
|
||||||
|
VICVectAddr = 0;
|
||||||
|
|
||||||
chSysIRQExitI();
|
chSysIRQExitI();
|
||||||
}
|
}
|
||||||
|
@ -111,6 +112,7 @@ void UART1IrqHandler(void) {
|
||||||
chSysIRQEnterI();
|
chSysIRQEnterI();
|
||||||
|
|
||||||
ServeInterrupt(U1Base, &COM2);
|
ServeInterrupt(U1Base, &COM2);
|
||||||
|
VICVectAddr = 0;
|
||||||
|
|
||||||
chSysIRQExitI();
|
chSysIRQExitI();
|
||||||
}
|
}
|
||||||
|
|
Loading…
Reference in New Issue