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ChibiOS
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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@9022 35acf78f-673a-0410-8e92-d51de3d6d3f4

This commit is contained in:
gdisirio 2016-03-05 12:23:26 +00:00
parent 091b30ded1
commit ff1d0020c7
4 changed files with 145 additions and 35 deletions
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64
os/hal/ports/STM32/LLD/SPIv1/spi_lld.c
View File

@ -117,7 +117,6 @@ SPIDriver SPID6;
/*===========================================================================*/ /*===========================================================================*/
static uint16_t dummytx; static uint16_t dummytx;
static uint16_t dummyrx;
/*===========================================================================*/ /*===========================================================================*/
/* Driver local functions. */ /* Driver local functions. */
@ -144,6 +143,14 @@ static void spi_lld_serve_rx_interrupt(SPIDriver *spip, uint32_t flags) {
dmaStreamDisable(spip->dmatx); dmaStreamDisable(spip->dmatx);
dmaStreamDisable(spip->dmarx); dmaStreamDisable(spip->dmarx);
#if STM32_SPI_USE_BIDIMODE
spip->spi->CR1 |= SPI_CR1_BIDIOE;
#endif
/* Errors reset sequence.*/
(void)spip->spi->DR;
(void)spip->spi->SR;
/* Portable SPI ISR code defined in the high level driver, note, it is /* Portable SPI ISR code defined in the high level driver, note, it is
a macro.*/ a macro.*/
_spi_isr_code(spip); _spi_isr_code(spip);
@ -304,6 +311,12 @@ void spi_lld_init(void) {
*/ */
void spi_lld_start(SPIDriver *spip) { void spi_lld_start(SPIDriver *spip) {
#if STM32_SPI_USE_BIDIMODE
osalDbgAssert(!(((spip->spi->CR1 & SPI_CR1_BIDIMODE) == 0) ^^
((spip->spi->CR1 & SPI_CR1_BIDIOE) == 0)),
"BIDIOE not set");
#endif
/* If in stopped state then enables the SPI and DMA clocks.*/ /* If in stopped state then enables the SPI and DMA clocks.*/
if (spip->state == SPI_STOP) { if (spip->state == SPI_STOP) {
#if STM32_SPI_USE_SPI1 #if STM32_SPI_USE_SPI1
@ -514,15 +527,16 @@ void spi_lld_unselect(SPIDriver *spip) {
*/ */
void spi_lld_ignore(SPIDriver *spip, size_t n) { void spi_lld_ignore(SPIDriver *spip, size_t n) {
dmaStreamSetMemory0(spip->dmarx, &dummyrx); #if STM32_SPI_USE_BIDIMODE
dmaStreamSetTransactionSize(spip->dmarx, n); if ((spip->spi->CR1 & SPI_CR1_BIDIMODE) != 0) {
dmaStreamSetMode(spip->dmarx, spip->rxdmamode); osalDbgAssert((spip->spi->CR1 & SPI_CR1_BIDIOE) != 0,
"BIDIOE not set");
#endif
dmaStreamSetMemory0(spip->dmatx, &dummytx); dmaStreamSetMemory0(spip->dmatx, &dummytx);
dmaStreamSetTransactionSize(spip->dmatx, n); dmaStreamSetTransactionSize(spip->dmatx, n);
dmaStreamSetMode(spip->dmatx, spip->txdmamode); dmaStreamSetMode(spip->dmatx, spip->txdmamode);
dmaStreamEnable(spip->dmarx);
dmaStreamEnable(spip->dmatx); dmaStreamEnable(spip->dmatx);
} }
@ -544,6 +558,11 @@ void spi_lld_ignore(SPIDriver *spip, size_t n) {
void spi_lld_exchange(SPIDriver *spip, size_t n, void spi_lld_exchange(SPIDriver *spip, size_t n,
const void *txbuf, void *rxbuf) { const void *txbuf, void *rxbuf) {
#if STM32_SPI_USE_BIDIMODE
osalDbgAssert((spip->spi->CR1 & SPI_CR1_BIDIMODE) == 0,
"spiExchange() not possible with BIDIMODE");
#endif
dmaStreamSetMemory0(spip->dmarx, rxbuf); dmaStreamSetMemory0(spip->dmarx, rxbuf);
dmaStreamSetTransactionSize(spip->dmarx, n); dmaStreamSetTransactionSize(spip->dmarx, n);
dmaStreamSetMode(spip->dmarx, spip->rxdmamode| STM32_DMA_CR_MINC); dmaStreamSetMode(spip->dmarx, spip->rxdmamode| STM32_DMA_CR_MINC);
@ -571,15 +590,16 @@ void spi_lld_exchange(SPIDriver *spip, size_t n,
*/ */
void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf) { void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf) {
dmaStreamSetMemory0(spip->dmarx, &dummyrx); #if STM32_SPI_USE_BIDIMODE
dmaStreamSetTransactionSize(spip->dmarx, n); if ((spip->spi->CR1 & SPI_CR1_BIDIMODE) != 0) {
dmaStreamSetMode(spip->dmarx, spip->rxdmamode); osalDbgAssert((spip->spi->CR1 & SPI_CR1_BIDIOE) != 0,
"BIDIOE not set");
#endif
dmaStreamSetMemory0(spip->dmatx, txbuf); dmaStreamSetMemory0(spip->dmatx, txbuf);
dmaStreamSetTransactionSize(spip->dmatx, n); dmaStreamSetTransactionSize(spip->dmatx, n);
dmaStreamSetMode(spip->dmatx, spip->txdmamode | STM32_DMA_CR_MINC); dmaStreamSetMode(spip->dmatx, spip->txdmamode | STM32_DMA_CR_MINC);
dmaStreamEnable(spip->dmarx);
dmaStreamEnable(spip->dmatx); dmaStreamEnable(spip->dmatx);
} }
@ -598,6 +618,21 @@ void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf) {
*/ */
void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf) { void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf) {
#if STM32_SPI_USE_BIDIMODE
osalDbgAssert((spip->spi->CR1 & SPI_CR1_BIDIOE) != 0,
"BIDIOE not set");
if ((spip->spi->CR1 & SPI_CR1_BIDIMODE) != 0) {
dmaStreamSetMemory0(spip->dmarx, rxbuf);
dmaStreamSetTransactionSize(spip->dmarx, n);
dmaStreamSetMode(spip->dmarx, spip->rxdmamode | STM32_DMA_CR_MINC);
dmaStreamEnable(spip->dmarx);
spip->spi->CR1 &= ~SPI_CR1_BIDIOE;
}
else {
#else
dmaStreamSetMemory0(spip->dmarx, rxbuf); dmaStreamSetMemory0(spip->dmarx, rxbuf);
dmaStreamSetTransactionSize(spip->dmarx, n); dmaStreamSetTransactionSize(spip->dmarx, n);
dmaStreamSetMode(spip->dmarx, spip->rxdmamode | STM32_DMA_CR_MINC); dmaStreamSetMode(spip->dmarx, spip->rxdmamode | STM32_DMA_CR_MINC);
@ -608,6 +643,10 @@ void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf) {
dmaStreamEnable(spip->dmarx); dmaStreamEnable(spip->dmarx);
dmaStreamEnable(spip->dmatx); dmaStreamEnable(spip->dmatx);
#endif
#if STM32_SPI_USE_BIDIMODE
}
#endif
} }
/** /**
@ -624,6 +663,13 @@ void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf) {
*/ */
uint16_t spi_lld_polled_exchange(SPIDriver *spip, uint16_t frame) { uint16_t spi_lld_polled_exchange(SPIDriver *spip, uint16_t frame) {
#if STM32_SPI_USE_BIDIMODE
osalDbgAssert((spip->spi->CR1 & SPI_CR1_BIDIMODE) == 0,
"spiExchange() not possible with BIDIMODE");
osalDbgAssert((spip->spi->CR1 & SPI_CR1_BIDIOE) != 0,
"BIDIOE not set");
#endif
spip->spi->DR = frame; spip->spi->DR = frame;
while ((spip->spi->SR & SPI_SR_RXNE) == 0) while ((spip->spi->SR & SPI_SR_RXNE) == 0)
; ;

9
os/hal/ports/STM32/LLD/SPIv1/spi_lld.h
View File

@ -195,6 +195,15 @@
#define STM32_SPI_SPI6_DMA_PRIORITY 1 #define STM32_SPI_SPI6_DMA_PRIORITY 1
#endif #endif
/**
* @brief Enables the SPI BIDIMODE support.
* @details If set to @p TRUE the support for BIDIMODE CR1 bit is included.
* @note The default is @p FALSE.
*/
#if !defined(STM32_SPI_USE_BIDIMODE) || defined(__DOXYGEN__)
#define STM32_SPI_USE_BIDIMODE FALSE
#endif
/** /**
* @brief SPI DMA error hook. * @brief SPI DMA error hook.
*/ */

64
os/hal/ports/STM32/LLD/SPIv2/spi_lld.c
View File

@ -117,7 +117,6 @@ SPIDriver SPID6;
/*===========================================================================*/ /*===========================================================================*/
static const uint16_t dummytx = 0xFFFFU; static const uint16_t dummytx = 0xFFFFU;
static uint16_t dummyrx;
/*===========================================================================*/ /*===========================================================================*/
/* Driver local functions. */ /* Driver local functions. */
@ -144,6 +143,14 @@ static void spi_lld_serve_rx_interrupt(SPIDriver *spip, uint32_t flags) {
dmaStreamDisable(spip->dmatx); dmaStreamDisable(spip->dmatx);
dmaStreamDisable(spip->dmarx); dmaStreamDisable(spip->dmarx);
#if STM32_SPI_USE_BIDIMODE
spip->spi->CR1 |= SPI_CR1_BIDIOE;
#endif
/* Errors reset sequence.*/
(void)spip->spi->DR;
(void)spip->spi->SR;
/* Portable SPI ISR code defined in the high level driver, note, it is /* Portable SPI ISR code defined in the high level driver, note, it is
a macro.*/ a macro.*/
_spi_isr_code(spip); _spi_isr_code(spip);
@ -303,6 +310,12 @@ void spi_lld_init(void) {
void spi_lld_start(SPIDriver *spip) { void spi_lld_start(SPIDriver *spip) {
uint32_t ds; uint32_t ds;
#if STM32_SPI_USE_BIDIMODE
osalDbgAssert(!(((spip->spi->CR1 & SPI_CR1_BIDIMODE) == 0) ^^
((spip->spi->CR1 & SPI_CR1_BIDIOE) == 0)),
"BIDIOE not set");
#endif
/* If in stopped state then enables the SPI and DMA clocks.*/ /* If in stopped state then enables the SPI and DMA clocks.*/
if (spip->state == SPI_STOP) { if (spip->state == SPI_STOP) {
#if STM32_SPI_USE_SPI1 #if STM32_SPI_USE_SPI1
@ -515,15 +528,16 @@ void spi_lld_unselect(SPIDriver *spip) {
*/ */
void spi_lld_ignore(SPIDriver *spip, size_t n) { void spi_lld_ignore(SPIDriver *spip, size_t n) {
dmaStreamSetMemory0(spip->dmarx, &dummyrx); #if STM32_SPI_USE_BIDIMODE
dmaStreamSetTransactionSize(spip->dmarx, n); if ((spip->spi->CR1 & SPI_CR1_BIDIMODE) != 0) {
dmaStreamSetMode(spip->dmarx, spip->rxdmamode); osalDbgAssert((spip->spi->CR1 & SPI_CR1_BIDIOE) != 0,
"BIDIOE not set");
#endif
dmaStreamSetMemory0(spip->dmatx, &dummytx); dmaStreamSetMemory0(spip->dmatx, &dummytx);
dmaStreamSetTransactionSize(spip->dmatx, n); dmaStreamSetTransactionSize(spip->dmatx, n);
dmaStreamSetMode(spip->dmatx, spip->txdmamode); dmaStreamSetMode(spip->dmatx, spip->txdmamode);
dmaStreamEnable(spip->dmarx);
dmaStreamEnable(spip->dmatx); dmaStreamEnable(spip->dmatx);
} }
@ -545,6 +559,11 @@ void spi_lld_ignore(SPIDriver *spip, size_t n) {
void spi_lld_exchange(SPIDriver *spip, size_t n, void spi_lld_exchange(SPIDriver *spip, size_t n,
const void *txbuf, void *rxbuf) { const void *txbuf, void *rxbuf) {
#if STM32_SPI_USE_BIDIMODE
osalDbgAssert((spip->spi->CR1 & SPI_CR1_BIDIMODE) == 0,
"spiExchange() not possible with BIDIMODE");
#endif
dmaStreamSetMemory0(spip->dmarx, rxbuf); dmaStreamSetMemory0(spip->dmarx, rxbuf);
dmaStreamSetTransactionSize(spip->dmarx, n); dmaStreamSetTransactionSize(spip->dmarx, n);
dmaStreamSetMode(spip->dmarx, spip->rxdmamode | STM32_DMA_CR_MINC); dmaStreamSetMode(spip->dmarx, spip->rxdmamode | STM32_DMA_CR_MINC);
@ -572,15 +591,16 @@ void spi_lld_exchange(SPIDriver *spip, size_t n,
*/ */
void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf) { void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf) {
dmaStreamSetMemory0(spip->dmarx, &dummyrx); #if STM32_SPI_USE_BIDIMODE
dmaStreamSetTransactionSize(spip->dmarx, n); if ((spip->spi->CR1 & SPI_CR1_BIDIMODE) != 0) {
dmaStreamSetMode(spip->dmarx, spip->rxdmamode); osalDbgAssert((spip->spi->CR1 & SPI_CR1_BIDIOE) != 0,
"BIDIOE not set");
#endif
dmaStreamSetMemory0(spip->dmatx, txbuf); dmaStreamSetMemory0(spip->dmatx, txbuf);
dmaStreamSetTransactionSize(spip->dmatx, n); dmaStreamSetTransactionSize(spip->dmatx, n);
dmaStreamSetMode(spip->dmatx, spip->txdmamode | STM32_DMA_CR_MINC); dmaStreamSetMode(spip->dmatx, spip->txdmamode | STM32_DMA_CR_MINC);
dmaStreamEnable(spip->dmarx);
dmaStreamEnable(spip->dmatx); dmaStreamEnable(spip->dmatx);
} }
@ -599,6 +619,21 @@ void spi_lld_send(SPIDriver *spip, size_t n, const void *txbuf) {
*/ */
void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf) { void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf) {
#if STM32_SPI_USE_BIDIMODE
osalDbgAssert((spip->spi->CR1 & SPI_CR1_BIDIOE) != 0,
"BIDIOE not set");
if ((spip->spi->CR1 & SPI_CR1_BIDIMODE) != 0) {
dmaStreamSetMemory0(spip->dmarx, rxbuf);
dmaStreamSetTransactionSize(spip->dmarx, n);
dmaStreamSetMode(spip->dmarx, spip->rxdmamode | STM32_DMA_CR_MINC);
dmaStreamEnable(spip->dmarx);
spip->spi->CR1 &= ~SPI_CR1_BIDIOE;
}
else {
#else
dmaStreamSetMemory0(spip->dmarx, rxbuf); dmaStreamSetMemory0(spip->dmarx, rxbuf);
dmaStreamSetTransactionSize(spip->dmarx, n); dmaStreamSetTransactionSize(spip->dmarx, n);
dmaStreamSetMode(spip->dmarx, spip->rxdmamode | STM32_DMA_CR_MINC); dmaStreamSetMode(spip->dmarx, spip->rxdmamode | STM32_DMA_CR_MINC);
@ -609,6 +644,10 @@ void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf) {
dmaStreamEnable(spip->dmarx); dmaStreamEnable(spip->dmarx);
dmaStreamEnable(spip->dmatx); dmaStreamEnable(spip->dmatx);
#endif
#if STM32_SPI_USE_BIDIMODE
}
#endif
} }
/** /**
@ -625,6 +664,13 @@ void spi_lld_receive(SPIDriver *spip, size_t n, void *rxbuf) {
*/ */
uint16_t spi_lld_polled_exchange(SPIDriver *spip, uint16_t frame) { uint16_t spi_lld_polled_exchange(SPIDriver *spip, uint16_t frame) {
#if STM32_SPI_USE_BIDIMODE
osalDbgAssert((spip->spi->CR1 & SPI_CR1_BIDIMODE) == 0,
"spiExchange() not possible with BIDIMODE");
osalDbgAssert((spip->spi->CR1 & SPI_CR1_BIDIOE) != 0,
"BIDIOE not set");
#endif
/* /*
* Data register must be accessed with the appropriate data size. * Data register must be accessed with the appropriate data size.
* Byte size access (uint8_t *) for transactions that are <= 8-bit. * Byte size access (uint8_t *) for transactions that are <= 8-bit.

9
os/hal/ports/STM32/LLD/SPIv2/spi_lld.h
View File

@ -195,6 +195,15 @@
#define STM32_SPI_SPI6_DMA_PRIORITY 1 #define STM32_SPI_SPI6_DMA_PRIORITY 1
#endif #endif
/**
* @brief Enables the SPI BIDIMODE support.
* @details If set to @p TRUE the support for BIDIMODE CR1 bit is included.
* @note The default is @p FALSE.
*/
#if !defined(STM32_SPI_USE_BIDIMODE) || defined(__DOXYGEN__)
#define STM32_SPI_USE_BIDIMODE FALSE
#endif
/** /**
* @brief SPI DMA error hook. * @brief SPI DMA error hook.
*/ */