h7 sdmmc clocking
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@ -115,7 +115,7 @@
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#define STM32_PLL2_FRACN_VALUE 0
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#define STM32_PLL2_FRACN_VALUE 0
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#define STM32_PLL2_DIVP_VALUE 10
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#define STM32_PLL2_DIVP_VALUE 10
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#define STM32_PLL2_DIVQ_VALUE 12
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#define STM32_PLL2_DIVQ_VALUE 12
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#define STM32_PLL2_DIVR_VALUE 2
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#define STM32_PLL2_DIVR_VALUE 20
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#define STM32_PLL3_ENABLED TRUE
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#define STM32_PLL3_ENABLED TRUE
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#define STM32_PLL3_P_ENABLED TRUE
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#define STM32_PLL3_P_ENABLED TRUE
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#define STM32_PLL3_Q_ENABLED TRUE
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#define STM32_PLL3_Q_ENABLED TRUE
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@ -155,7 +155,7 @@
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#define STM32_STOPWUCK 0
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#define STM32_STOPWUCK 0
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#define STM32_RTCPRE_VALUE 8
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#define STM32_RTCPRE_VALUE 8
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#define STM32_CKPERSEL STM32_CKPERSEL_HSE_CK
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#define STM32_CKPERSEL STM32_CKPERSEL_HSE_CK
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#define STM32_SDMMCSEL STM32_SDMMCSEL_PLL1_Q_CK
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#define STM32_SDMMCSEL STM32_SDMMCSEL_PLL2_R_CK
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#define STM32_QSPISEL STM32_QSPISEL_HCLK
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#define STM32_QSPISEL STM32_QSPISEL_HCLK
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#define STM32_FMCSEL STM32_QSPISEL_HCLK
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#define STM32_FMCSEL STM32_QSPISEL_HCLK
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#define STM32_SWPSEL STM32_SWPSEL_PCLK1
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#define STM32_SWPSEL STM32_SWPSEL_PCLK1
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