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CORE_CLOCK replacement progress

This commit is contained in:
rusefi 2025-01-24 22:19:47 -05:00
parent 811b249d0c
commit bd0e04669a
4 changed files with 6 additions and 6 deletions
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2
firmware/development/rfi_perftest.cpp
View File

@ -264,7 +264,7 @@ static int rtcStartTime;
static void timeInfo() {
efiPrintf("chTimeNow as seconds = %d", getTimeNowS());
efiPrintf("hal seconds = %d", halTime.get() / (long)CORE_CLOCK);
efiPrintf("hal seconds = %d", halTime.get() / (long)STM32_SYSCLK);
#if EFI_RTC
int unix = rtcGetTimeUnixSec(&RTCD1) - rtcStartTime;

2
firmware/hw_layer/drivers/sent/sent_hw_icu.cpp
View File

@ -26,7 +26,7 @@
/* TODO: get at runtime */
/* Max timer clock for most timers on STM32 is CPU clock / 2 */
#define SENT_TIMER_CLOCK_DIV 2
#define SENT_ICU_FREQ (CORE_CLOCK / SENT_TIMER_CLOCK_DIV) // == CPU freq / 2
#define SENT_ICU_FREQ (STM32_SYSCLK / SENT_TIMER_CLOCK_DIV) // == CPU freq / 2
static uint16_t lastPulse[SENT_INPUT_COUNT];
static bool overcapture[SENT_INPUT_COUNT];

4
firmware/hw_layer/ports/cypress/port_mpu_util.h
View File

@ -10,8 +10,8 @@
#define PORT_SIZE 16
// todo: stm32 ticks are based on 4MHz timer I wonder if these CORE_CLOCK-based clocks are broken here?!
#define US_TO_NT_MULTIPLIER (CORE_CLOCK / 1000000)
// todo: stm32 ticks are based on 4MHz timer I wonder if these STM32_SYSCLK-based clocks are broken here?!
#define US_TO_NT_MULTIPLIER (STM32_SYSCLK / 1000000)
// Scheduler queue GPT device
#define GPTDEVICE GPTD1

4
firmware/hw_layer/ports/kinetis/port_mpu_util.h
View File

@ -11,8 +11,8 @@
// This is the radical departure from STM32
#define PORT_SIZE 18
// todo: stm32 ticks are based on 4MHz timer I wonder if these CORE_CLOCK-based clocks are broken here?!
#define US_TO_NT_MULTIPLIER (CORE_CLOCK / 1000000)
// todo: stm32 ticks are based on 4MHz timer I wonder if these STM32_SYSCLK-based clocks are broken here?!
#define US_TO_NT_MULTIPLIER (STM32_SYSCLK / 1000000)
// Scheduler queue GPT device
#define GPTDEVICE GPTD1