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Merge remote-tracking branch 'refs/remotes/rogerclarkmelbourne/master'

This commit is contained in:
stevstrong 2017-07-19 18:13:24 +02:00
parent 20fa1dffa7 43299e4544
commit e8a195dd42
14 changed files with 661 additions and 333 deletions
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82
STM32F1/boards.txt
View File

@ -25,17 +25,15 @@ mapleMini.upload.auto_reset=true
mapleMini.menu.bootloader_version.original = Original (17k RAM,108k Flash)
mapleMini.menu.bootloader_version.original.build.vect=VECT_TAB_ADDR=0x8005000
mapleMini.menu.bootloader_version.original.build.ldscript=ld/flash.ld
mapleMini.menu.bootloader_version.original.upload.ram.maximum_size=17408
mapleMini.menu.bootloader_version.original.upload.flash.maximum_size=110592
mapleMini.menu.bootloader_version.original.upload.maximum_size=110592
mapleMini.menu.bootloader_version.original.upload.maximum_data_size=17408
mapleMini.menu.bootloader_version.original.upload.altID=1
mapleMini.menu.bootloader_version.bootloader20 = Bootloader 2.0 (20k RAM,120k Flash)
mapleMini.menu.bootloader_version.bootloader20.build.vect=VECT_TAB_ADDR=0x8002000
mapleMini.menu.bootloader_version.bootloader20.build.ldscript=ld/bootloader_20.ld
mapleMini.menu.bootloader_version.bootloader20.upload.ram.maximum_size=20480
mapleMini.menu.bootloader_version.bootloader20.upload.flash.maximum_size=122880
mapleMini.menu.bootloader_version.bootloader20.upload.maximum_size=122880
mapleMini.menu.bootloader_version.bootloader20.upload.maximum_data_size=20480
mapleMini.menu.bootloader_version.bootloader20.upload.altID=2
#-- CPU Clock frequency
@ -54,10 +52,9 @@ maple.pid.0=0x0004
maple.upload.tool=maple_upload
maple.upload.protocol=maple_dfu
maple.upload.maximum_size=108000
maple.upload.maximum_data_size=17000
maple.upload.use_1200bps_touch=false
maple.upload.file_type=bin
maple.upload.ram.maximum_size=17000
maple.upload.flash.maximum_size=108000
maple.upload.usbID=1EAF:0003
maple.upload.altID=1
maple.upload.auto_reset=true
@ -85,10 +82,9 @@ mapleRET6.build.vect=VECT_TAB_ADDR=0x8005000
mapleRET6.upload.tool=maple_upload
mapleRET6.upload.protocol=maple_dfu
mapleRET6.upload.maximum_size=262144
mapleRET6.upload.maximum_data_size=49152
mapleRET6.upload.use_1200bps_touch=false
mapleRET6.upload.file_type=bin
mapleRET6.upload.ram.maximum_size=49152
mapleRET6.upload.flash.maximum_size=262144
mapleRET6.upload.usbID=1EAF:0003
mapleRET6.upload.altID=1
mapleRET6.upload.auto_reset=true
@ -102,10 +98,9 @@ microduino32_flash.pid.0=0x0004
microduino32_flash.upload.tool=maple_upload
microduino32_flash.upload.protocol=maple_dfu
microduino32_flash.upload.maximum_size=108000
microduino32_flash.upload.maximum_data_size=17000
microduino32_flash.upload.use_1200bps_touch=false
microduino32_flash.upload.file_type=bin
microduino32_flash.upload.ram.maximum_size=17000
microduino32_flash.upload.flash.maximum_size=108000
microduino32_flash.upload.usbID=1EAF:0003
microduino32_flash.upload.altID=1
microduino32_flash.upload.auto_reset=true
@ -131,10 +126,9 @@ nucleo_f103rb.name=STM Nucleo F103RB (STLink)
nucleo_f103rb.upload.tool=stlink_upload
nucleo_f103rb.upload.protocol=maple_dfu
nucleo_f103rb.upload.maximum_size=108000
nucleo_f103rb.upload.maximum_data_size=17000
nucleo_f103rb.upload.use_1200bps_touch=false
nucleo_f103rb.upload.file_type=bin
nucleo_f103rb.upload.ram.maximum_size=17000
nucleo_f103rb.upload.flash.maximum_size=108000
nucleo_f103rb.upload.params.quiet=no
nucleo_f103rb.upload.usbID=1EAF:0003
@ -182,16 +176,14 @@ genericSTM32F103C.menu.device_variant.STM32F103C8=STM32F103C8 (20k RAM. 64k Flas
genericSTM32F103C.menu.device_variant.STM32F103C8.build.cpu_flags=-DMCU_STM32F103C8
genericSTM32F103C.menu.device_variant.STM32F103C8.build.ldscript=ld/jtag_c8.ld
genericSTM32F103C.menu.device_variant.STM32F103C8.upload.maximum_size=65536
genericSTM32F103C.menu.device_variant.STM32F103C8.upload.ram.maximum_size=20480
genericSTM32F103C.menu.device_variant.STM32F103C8.upload.flash.maximum_size=65536
genericSTM32F103C.menu.device_variant.STM32F103C8.upload.maximum_data_size=20480
## STM32F103CB -------------------------
genericSTM32F103C.menu.device_variant.STM32F103CB=STM32F103CB (20k RAM. 128k Flash)
genericSTM32F103C.menu.device_variant.STM32F103CB.build.cpu_flags=-DMCU_STM32F103CB
genericSTM32F103C.menu.device_variant.STM32F103CB.build.ldscript=ld/jtag.ld
genericSTM32F103C.menu.device_variant.STM32F103CB.upload.maximum_size=131072
genericSTM32F103C.menu.device_variant.STM32F103CB.upload.ram.maximum_size=20480
genericSTM32F103C.menu.device_variant.STM32F103CB.upload.flash.maximum_size=131072
genericSTM32F103C.menu.device_variant.STM32F103C8.upload.maximum_data_size=20480
#---------------------------- UPLOAD METHODS ---------------------------
@ -219,7 +211,6 @@ genericSTM32F103C.menu.upload_method.BMPMethod.upload.protocol=gdb_bmp
genericSTM32F103C.menu.upload_method.BMPMethod.upload.tool=bmp_upload
genericSTM32F103C.menu.upload_method.BMPMethod.build.upload_flags=-DCONFIG_MAPLE_MINI_NO_DISABLE_DEBUG
genericSTM32F103C.menu.upload_method.jlinkMethod=JLink
genericSTM32F103C.menu.upload_method.jlinkMethod.upload.protocol=jlink
genericSTM32F103C.menu.upload_method.jlinkMethod.upload.tool=jlink_upload
@ -249,22 +240,21 @@ genericSTM32F103R.menu.device_variant.STM32F103R8=STM32F103R8 (20k RAM. 64k Flas
genericSTM32F103R.menu.device_variant.STM32F103R8.build.variant=generic_stm32f103r8
genericSTM32F103R.menu.device_variant.STM32F103R8.build.cpu_flags=-DMCU_STM32F103R8
genericSTM32F103R.menu.device_variant.STM32F103R8.upload.maximum_size=65536
genericSTM32F103R.menu.device_variant.STM32F103R8.upload.ram.maximum_size=20480
genericSTM32F103R.menu.device_variant.STM32F103R8.upload.flash.maximum_size=65536
genericSTM32F103R.menu.device_variant.STM32F103R8.upload.maximum_data_size=20480
genericSTM32F103R.menu.device_variant.STM32F103R8.build.ldscript=ld/stm32f103r8.ld
genericSTM32F103R.menu.device_variant.STM32F103RB=STM32F103RB (20k RAM. 128k Flash)
genericSTM32F103R.menu.device_variant.STM32F103RB.build.variant=generic_stm32f103r8
genericSTM32F103R.menu.device_variant.STM32F103RB.build.cpu_flags=-DMCU_STM32F103RB
genericSTM32F103R.menu.device_variant.STM32F103RB.upload.maximum_size=131072
genericSTM32F103R.menu.device_variant.STM32F103RB.upload.ram.maximum_size=20480
genericSTM32F103R.menu.device_variant.STM32F103RB.upload.flash.maximum_size=131072
genericSTM32F103R.menu.device_variant.STM32F103RB.upload.maximum_data_size=20480
genericSTM32F103R.menu.device_variant.STM32F103RB.build.ldscript=ld/stm32f103rb.ld
genericSTM32F103R.menu.device_variant.STM32F103RC=STM32F103RC (48k RAM. 256k Flash)
genericSTM32F103R.menu.device_variant.STM32F103RC.build.variant=generic_stm32f103r
genericSTM32F103R.menu.device_variant.STM32F103RC.build.cpu_flags=-DMCU_STM32F103RC
genericSTM32F103R.menu.device_variant.STM32F103RC.upload.maximum_size=262144
genericSTM32F103R.menu.device_variant.STM32F103RC.upload.maximum_data_size=49152
genericSTM32F103R.menu.device_variant.STM32F103RC.upload.ram.maximum_size=49152
genericSTM32F103R.menu.device_variant.STM32F103RC.upload.flash.maximum_size=262144
genericSTM32F103R.menu.device_variant.STM32F103RC.build.ldscript=ld/stm32f103rc.ld
@ -273,8 +263,7 @@ genericSTM32F103R.menu.device_variant.STM32F103RE=STM32F103RE (64k RAM. 512k Fla
genericSTM32F103R.menu.device_variant.STM32F103RE.build.variant=generic_stm32f103r
genericSTM32F103R.menu.device_variant.STM32F103RE.build.cpu_flags=-DMCU_STM32F103RE
genericSTM32F103R.menu.device_variant.STM32F103RE.upload.maximum_size=524288
genericSTM32F103R.menu.device_variant.STM32F103RE.upload.ram.maximum_size=65536
genericSTM32F103R.menu.device_variant.STM32F103RE.upload.flash.maximum_size=524288
genericSTM32F103R.menu.device_variant.STM32F103RE.upload.maximum_data_size=65536
genericSTM32F103R.menu.device_variant.STM32F103RE.build.ldscript=ld/stm32f103re.ld
#---------------------------- UPLOAD METHODS ---------------------------
@ -321,16 +310,14 @@ genericSTM32F103T.menu.device_variant.STM32F103T8=STM32F103T8 (20k RAM. 64k Flas
genericSTM32F103T.menu.device_variant.STM32F103T8.build.cpu_flags=-DMCU_STM32F103T8
genericSTM32F103T.menu.device_variant.STM32F103T8.build.ldscript=ld/jtag_t8.ld
genericSTM32F103T.menu.device_variant.STM32F103T8.upload.maximum_size=65536
genericSTM32F103T.menu.device_variant.STM32F103T8.upload.ram.maximum_size=20480
genericSTM32F103T.menu.device_variant.STM32F103T8.upload.flash.maximum_size=65536
genericSTM32F103T.menu.device_variant.STM32F103T8.upload.maximum_data_size=20480
## STM32F103TB -------------------------
genericSTM32F103T.menu.device_variant.STM32F103TB=STM32F103TB (20k RAM. 128k Flash)
genericSTM32F103T.menu.device_variant.STM32F103TB.build.cpu_flags=-DMCU_STM32F103TB
genericSTM32F103T.menu.device_variant.STM32F103TB.build.ldscript=ld/jtag.ld
genericSTM32F103T.menu.device_variant.STM32F103TB.upload.maximum_size=131072
genericSTM32F103T.menu.device_variant.STM32F103TB.upload.ram.maximum_size=20480
genericSTM32F103T.menu.device_variant.STM32F103TB.upload.flash.maximum_size=131072
genericSTM32F103T.menu.device_variant.STM32F103TB.upload.maximum_data_size=20480
#---------------------------- UPLOAD METHODS ---------------------------
@ -377,22 +364,19 @@ genericSTM32F103V.build.error_led_pin=6
genericSTM32F103V.menu.device_variant.STM32F103VC=STM32F103VC
genericSTM32F103V.menu.device_variant.STM32F103VC.build.cpu_flags=-DMCU_STM32F103VC
genericSTM32F103V.menu.device_variant.STM32F103VC.upload.maximum_size=262144
genericSTM32F103V.menu.device_variant.STM32F103VC.upload.ram.maximum_size=49152
genericSTM32F103V.menu.device_variant.STM32F103VC.upload.flash.maximum_size=262144
genericSTM32F103V.menu.device_variant.STM32F103VC.upload.maximum_data_size=49152
genericSTM32F103V.menu.device_variant.STM32F103VC.build.ldscript=ld/stm32f103vc.ld
genericSTM32F103V.menu.device_variant.STM32F103VD=STM32F103VD
genericSTM32F103V.menu.device_variant.STM32F103VD.build.cpu_flags=-DMCU_STM32F103VD
genericSTM32F103V.menu.device_variant.STM32F103VD.upload.maximum_size=393216
genericSTM32F103V.menu.device_variant.STM32F103VD.upload.ram.maximum_size=65536
genericSTM32F103V.menu.device_variant.STM32F103VD.upload.flash.maximum_size=393216
genericSTM32F103V.menu.device_variant.STM32F103VD.upload.maximum_data_size=65536
genericSTM32F103V.menu.device_variant.STM32F103VD.build.ldscript=ld/stm32f103vd.ld
genericSTM32F103V.menu.device_variant.STM32F103VE=STM32F103VE
genericSTM32F103V.menu.device_variant.STM32F103VE.build.cpu_flags=-DMCU_STM32F103VE
genericSTM32F103V.menu.device_variant.STM32F103VE.upload.maximum_size=524288
genericSTM32F103V.menu.device_variant.STM32F103VE.upload.ram.maximum_size=65536
genericSTM32F103V.menu.device_variant.STM32F103VE.upload.flash.maximum_size=524288
genericSTM32F103V.menu.device_variant.STM32F103VE.upload.maximum_data_size=65536
genericSTM32F103V.menu.device_variant.STM32F103VE.build.ldscript=ld/stm32f103ve.ld
#---------------------------- UPLOAD METHODS ---------------------------
@ -437,22 +421,19 @@ genericSTM32F103Z.upload.auto_reset=true
genericSTM32F103Z.menu.device_variant.STM32F103ZC=STM32F103ZC
genericSTM32F103Z.menu.device_variant.STM32F103ZC.build.cpu_flags=-DMCU_STM32F103ZC
genericSTM32F103Z.menu.device_variant.STM32F103ZC.upload.maximum_size=262144
genericSTM32F103Z.menu.device_variant.STM32F103ZC.upload.ram.maximum_size=49152
genericSTM32F103Z.menu.device_variant.STM32F103ZC.upload.flash.maximum_size=262144
genericSTM32F103Z.menu.device_variant.STM32F103ZC.upload.maximum_data_size=49152
genericSTM32F103Z.menu.device_variant.STM32F103ZC.build.ldscript=ld/stm32f103zc.ld
genericSTM32F103Z.menu.device_variant.STM32F103ZD=STM32F103ZD
genericSTM32F103Z.menu.device_variant.STM32F103ZD.build.cpu_flags=-DMCU_STM32F103ZD
genericSTM32F103Z.menu.device_variant.STM32F103ZD.upload.maximum_size=393216
genericSTM32F103Z.menu.device_variant.STM32F103ZD.upload.ram.maximum_size=65536
genericSTM32F103Z.menu.device_variant.STM32F103ZD.upload.flash.maximum_size=393216
genericSTM32F103Z.menu.device_variant.STM32F103ZD.upload.maximum_data_size=65536
genericSTM32F103Z.menu.device_variant.STM32F103ZD.build.ldscript=ld/stm32f103zd.ld
genericSTM32F103Z.menu.device_variant.STM32F103ZE=STM32F103ZE
genericSTM32F103Z.menu.device_variant.STM32F103ZE.build.cpu_flags=-DMCU_STM32F103ZE
genericSTM32F103Z.menu.device_variant.STM32F103ZE.upload.maximum_size=524288
genericSTM32F103Z.menu.device_variant.STM32F103ZE.upload.ram.maximum_size=65536
genericSTM32F103Z.menu.device_variant.STM32F103ZE.upload.flash.maximum_size=524288
genericSTM32F103Z.menu.device_variant.STM32F103ZE.upload.maximum_data_size=65536
genericSTM32F103Z.menu.device_variant.STM32F103ZE.build.ldscript=ld/stm32f103ze.ld
#---------------------------- UPLOAD METHODS ---------------------------
@ -498,9 +479,7 @@ hytiny-stm32f103t.upload.auto_reset=true
hytiny-stm32f103t.build.cpu_flags=-DMCU_STM32F103CB
hytiny-stm32f103t.build.ldscript=ld/jtag.ld
hytiny-stm32f103t.upload.maximum_size=131072
hytiny-stm32f103t.upload.ram.maximum_size=20480
hytiny-stm32f103t.upload.flash.maximum_size=131072
hytiny-stm32f103t.upload.maximum_data_size=20480
#---------------------------- UPLOAD METHODS ---------------------------
@ -548,20 +527,17 @@ genericGD32F103C.upload.auto_reset=true
genericGD32F103C.build.cpu_flags=-DMCU_STM32F103CB
genericGD32F103C.build.f_cpu=72000000L
## GD32F103CB -------------------------
genericGD32F103C.menu.device_variant.GD32F103CB=GD32F103CB (20k RAM. 128k Flash)
genericGD32F103C.menu.device_variant.GD32F103CB.build.ldscript=ld/jtag.ld
genericGD32F103C.menu.device_variant.GD32F103CB.upload.maximum_size=131072
genericGD32F103C.menu.device_variant.GD32F103CB.upload.ram.maximum_size=20480
genericGD32F103C.menu.device_variant.GD32F103CB.upload.flash.maximum_size=131072
## GD32F103C8 -------------------------
genericGD32F103C.menu.device_variant.GD32F103C8=GD32F103C8 (20k RAM. 64k Flash)
genericGD32F103C.menu.device_variant.GD32F103C8.build.ldscript=ld/jtag_c8.ld
genericGD32F103C.menu.device_variant.GD32F103C8.upload.maximum_size=65536
genericGD32F103C.menu.device_variant.GD32F103C8.upload.ram.maximum_size=20480
genericGD32F103C.menu.device_variant.GD32F103C8.upload.flash.maximum_size=65536
genericGD32F103C.menu.device_variant.GD32F103C8.upload.maximum_data_size=20480
## GD32F103CB -------------------------
genericGD32F103C.menu.device_variant.GD32F103CB=GD32F103CB (20k RAM. 128k Flash)
genericGD32F103C.menu.device_variant.GD32F103CB.build.ldscript=ld/jtag.ld
genericGD32F103C.menu.device_variant.GD32F103CB.upload.maximum_size=131072
genericGD32F103C.menu.device_variant.GD32F103CB.upload.maximum_data_size=20480
#---------------------------- UPLOAD METHODS ---------------------------
@ -620,8 +596,8 @@ STM32VLD.upload.auto_reset=true
STM32VLD.upload.params.quiet=no
STM32VLD.build.cpu_flags=-DMCU_STM32F100RB
##---------------------------- UPLOAD METHODS ---------------------------
#---------------------------- UPLOAD METHODS ---------------------------
STM32VLD.menu.upload_method.STLinkMethod=STLink
STM32VLD.menu.upload_method.STLinkMethod.upload.protocol=STLink

5
STM32F1/cores/maple/HardwareTimer.cpp
View File

@ -142,6 +142,11 @@ void HardwareTimer::refresh(void) {
timer_generate_update(this->dev);
}
void HardwareTimer::setMasterModeTrGo(uint32_t mode) {
this->dev->regs.bas->CR2 &= ~TIMER_CR2_MMS;
this->dev->regs.bas->CR2 |= mode;
}
/* CARLOS Changes to add encoder mode.*/
//direction of movement. (to be better described).

17
STM32F1/cores/maple/HardwareTimer.h
View File

@ -209,6 +209,23 @@ public:
*/
void refresh(void);
// SYFRE
/**
* @brief Set the Master mode TRGO signal
* These bits allow to select the information to be sent in master mode to slave timers for
* synchronization (TRGO).
* mode:
* TIMER_CR2_MMS_RESET
* TIMER_CR2_MMS_ENABLE
* TIMER_CR2_MMS_UPDATE
* TIMER_CR2_MMS_COMPARE_PULSE
* TIMER_CR2_MMS_COMPARE_OC1REF
* TIMER_CR2_MMS_COMPARE_OC2REF
* TIMER_CR2_MMS_COMPARE_OC3REF
* TIMER_CR2_MMS_COMPARE_OC4REF
*/
void setMasterModeTrGo(uint32_t mode);
//CARLOS.
/*
added these functions to make sense for the encoder mode.

1
STM32F1/cores/maple/libmaple/adc.c
View File

@ -59,6 +59,7 @@ void adc_set_extsel(adc_dev *dev, adc_extsel_event event) {
uint32 cr2 = dev->regs->CR2;
cr2 &= ~ADC_CR2_EXTSEL;
cr2 |= event;
cr2 |= ADC_CR2_EXTTRIG;
dev->regs->CR2 = cr2;
}

13
STM32F1/cores/maple/usb_serial.cpp
View File

@ -168,6 +168,19 @@ uint32 USBSerial::read(uint8 * buf, uint32 len) {
return rxed;
}
size_t USBSerial::readBytes(char *buf, const size_t& len)
{
size_t rxed=0;
unsigned long startMillis;
startMillis = millis();
if (len <= 0) return 0;
do {
rxed += usb_cdcacm_rx((uint8 *)buf + rxed, len - rxed);
if (rxed == len) return rxed;
} while(millis() - startMillis < _timeout);
return rxed;
}
/* Blocks forever until 1 byte is received */
int USBSerial::read(void) {
uint8 b;

1
STM32F1/cores/maple/usb_serial.h
View File

@ -51,6 +51,7 @@ public:
virtual int available(void);// Changed to virtual
size_t readBytes(char *buf, const size_t& len);
uint32 read(uint8 * buf, uint32 len);
// uint8 read(void);

246
STM32F1/libraries/SPI/src/SPI.cpp
View File

@ -101,16 +101,19 @@ SPIClass::SPIClass(uint32 spi_num) {
#if BOARD_NR_SPI >= 1
case 1:
_currentSetting->spi_d = SPI1;
_spi1_this = (void*) this;
break;
#endif
#if BOARD_NR_SPI >= 2
case 2:
_currentSetting->spi_d = SPI2;
_spi2_this = (void*) this;
break;
#endif
#if BOARD_NR_SPI >= 3
case 3:
_currentSetting->spi_d = SPI3;
_spi3_this = (void*) this;
break;
#endif
default:
@ -137,6 +140,8 @@ SPIClass::SPIClass(uint32 spi_num) {
_settings[2].spiRxDmaChannel = DMA_CH1;
#endif
// added for DMA callbacks.
_currentSetting->state = SPI_STATE_IDLE;
}
/*
@ -154,6 +159,8 @@ void SPIClass::begin(void) {
spi_init(_currentSetting->spi_d);
configure_gpios(_currentSetting->spi_d, 1);
updateSettings();
// added for DMA callbacks.
_currentSetting->state = SPI_STATE_READY;
}
void SPIClass::beginSlave(void) {
@ -164,6 +171,8 @@ void SPIClass::beginSlave(void) {
Serial.print("spi_slave_enable("); Serial.print(_currentSetting->dataMode); Serial.print(","); Serial.print(flags); Serial.println(")");
#endif
spi_slave_enable(_currentSetting->spi_d, (spi_mode)_currentSetting->dataMode, flags);
// added for DMA callbacks.
_currentSetting->state = SPI_STATE_READY;
}
void SPIClass::end(void) {
@ -182,6 +191,9 @@ void SPIClass::end(void) {
while (spi_is_busy(_currentSetting->spi_d))
;
spi_peripheral_disable(_currentSetting->spi_d);
// added for DMA callbacks.
// Need to add unsetting the callbacks for the DMA channels.
_currentSetting->state = SPI_STATE_IDLE;
}
/* Roger Clark added 3 functions */
@ -384,98 +396,126 @@ uint16_t SPIClass::transfer16(uint16_t wr_data) const
/* Roger Clark and Victor Perez, 2015
* Performs a DMA SPI transfer with at least a receive buffer.
* If a TX buffer is not provided, FF is sent over and over for the length of the transfer.
* On exit TX buffer is not modified, and RX buffer contains the received data.
* If a TX buffer is not provided, FF is sent over and over for the lenght of the transfer.
* On exit TX buffer is not modified, and RX buffer cotains the received data.
* Still in progress.
*/
uint8 SPIClass::dmaTransfer(void * transmitBuf, void * receiveBuf, uint16 length)
{
if (length == 0) return 0;
uint8 b = 0;
// dma1_ch3_Active=true;
void SPIClass::dmaTransferSet(void *transmitBuf, void *receiveBuf) {
dma_init(_currentSetting->spiDmaDev);
// dma_attach_interrupt(DMA1, DMA_CH3, &SPIClass::DMA1_CH3_Event);
// RX
//spi_rx_dma_enable(_currentSetting->spi_d);
//spi_tx_dma_enable(_currentSetting->spi_d);
dma_xfer_size dma_bit_size = (_currentSetting->dataSize==DATA_SIZE_16BIT) ? DMA_SIZE_16BITS : DMA_SIZE_8BITS;
dma_setup_transfer(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel, &_currentSetting->spi_d->regs->DR, dma_bit_size,
receiveBuf, dma_bit_size, (DMA_MINC_MODE));// receive buffer DMA
dma_set_num_transfers(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel, length);
dma_enable(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel);// enable receive
// TX
uint32 flags = (DMA_MINC_MODE | DMA_FROM_MEM);
if ( transmitBuf==0 ) {
static uint8_t ff = 0XFF;
receiveBuf, dma_bit_size, (DMA_MINC_MODE | DMA_TRNS_CMPLT ));// receive buffer DMA
if (!transmitBuf) {
transmitBuf = &ff;
flags ^= DMA_MINC_MODE; // remove increment mode
}
dma_setup_transfer(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &_currentSetting->spi_d->regs->DR, dma_bit_size,
transmitBuf, dma_bit_size, flags);// Transmit buffer DMA
transmitBuf, dma_bit_size, (DMA_FROM_MEM));// Transmit FF repeatedly
}
else {
dma_setup_transfer(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &_currentSetting->spi_d->regs->DR, dma_bit_size,
transmitBuf, dma_bit_size, (DMA_MINC_MODE | DMA_FROM_MEM ));// Transmit buffer DMA
}
dma_set_priority(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, DMA_PRIORITY_LOW);
dma_set_priority(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel, DMA_PRIORITY_VERY_HIGH);
}
uint8 SPIClass::dmaTransferRepeat(uint16 length) {
if (length == 0) return 0;
if (spi_is_rx_nonempty(_currentSetting->spi_d) == 1) spi_rx_reg(_currentSetting->spi_d);
_currentSetting->state = SPI_STATE_TRANSFER;
dma_set_num_transfers(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel, length);
dma_set_num_transfers(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, length);
dma_clear_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);
dma_enable(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel);// enable receive
dma_enable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);// enable transmit
spi_rx_reg(_currentSetting->spi_d); //Clear the RX buffer in case a byte is waiting on it.
spi_rx_dma_enable(_currentSetting->spi_d);
spi_tx_dma_enable(_currentSetting->spi_d); // must be the last enable to avoid DMA error flag
spi_tx_dma_enable(_currentSetting->spi_d);
if (_currentSetting->receiveCallback){
return 0;
}
//uint32_t m = millis();
uint8 b = 0;
uint32_t m = millis();
while ((dma_get_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel) & DMA_ISR_TCIF1)==0) {//Avoid interrupts and just loop waiting for the flag to be set.
//delayMicroseconds(10);
while ((dma_get_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel) & DMA_ISR_TCIF1)==0) {
//Avoid interrupts and just loop waiting for the flag to be set.
if ((millis() - m) > DMA_TIMEOUT) { b = 2; break; }
}
while (spi_is_tx_empty(_currentSetting->spi_d) == 0); // "5. Wait until TXE=1 ..."
while (spi_is_busy(_currentSetting->spi_d) != 0); // "... and then wait until BSY=0 before disabling the SPI."
spi_tx_dma_disable(_currentSetting->spi_d);
spi_rx_dma_disable(_currentSetting->spi_d); // And disable generation of DMA request from the SPI port so other peripherals can use the channels
spi_rx_dma_disable(_currentSetting->spi_d);
dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);
dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel);
dma_clear_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel);
dma_clear_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);
_currentSetting->state = SPI_STATE_READY;
return b;
}
/* Roger Clark and Victor Perez, 2015
* Performs a DMA SPI transfer with at least a receive buffer.
* If a TX buffer is not provided, FF is sent over and over for the length of the transfer.
* On exit TX buffer is not modified, and RX buffer contains the received data.
* Still in progress.
*/
uint8 SPIClass::dmaTransfer(void *transmitBuf, void *receiveBuf, uint16 length) {
dmaTransferSet(transmitBuf, receiveBuf);
return dmaTransferRepeat(length);
}
/* Roger Clark and Victor Perez, 2015
* Performs a DMA SPI send using a TX buffer.
* On exit TX buffer is not modified.
* Still in progress.
* 2016 - stevstrong - reworked to automatically detect bit size from SPI setting
*/
uint8 SPIClass::dmaSend(void * transmitBuf, uint16 length, bool minc)
{
if (length == 0) return 0;
void SPIClass::dmaSendSet(void * transmitBuf, bool minc) {
uint32 flags = ( (DMA_MINC_MODE*minc) | DMA_FROM_MEM | DMA_TRNS_CMPLT);
uint8 b = 0;
dma_init(_currentSetting->spiDmaDev);
// TX
dma_xfer_size dma_bit_size = (_currentSetting->dataSize==DATA_SIZE_16BIT) ? DMA_SIZE_16BITS : DMA_SIZE_8BITS;
dma_setup_transfer(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &_currentSetting->spi_d->regs->DR, dma_bit_size,
transmitBuf, dma_bit_size, flags);// Transmit buffer DMA
dma_set_num_transfers(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, length);
dma_clear_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);
dma_enable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);// enable transmit
spi_tx_dma_enable(_currentSetting->spi_d);
uint32_t m = millis();
while ((dma_get_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel) & DMA_ISR_TCIF1)==0) {//Avoid interrupts and just loop waiting for the flag to be set.
//delayMicroseconds(10);
if ((millis() - m) > DMA_TIMEOUT) { b = 2; break; }
dma_set_priority(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, DMA_PRIORITY_LOW);
}
uint8 SPIClass::dmaSendRepeat(uint16 length) {
if (length == 0) return 0;
dma_clear_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);
dma_set_num_transfers(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, length);
_currentSetting->state = SPI_STATE_TRANSMIT;
dma_enable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);// enable transmit
spi_tx_dma_enable(_currentSetting->spi_d);
if (_currentSetting->transmitCallback)
{
return 0;
}
uint32_t m = millis();
uint8 b = 0;
while ((dma_get_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel) & DMA_ISR_TCIF1)==0) {
//Avoid interrupts and just loop waiting for the flag to be set.
if ((millis() - m) > DMA_TIMEOUT) { b = 2; break; }
}
while (spi_is_tx_empty(_currentSetting->spi_d) == 0); // "5. Wait until TXE=1 ..."
while (spi_is_busy(_currentSetting->spi_d) != 0); // "... and then wait until BSY=0 before disabling the SPI."
spi_tx_dma_disable(_currentSetting->spi_d);
dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);
dma_clear_isr_bits(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);
_currentSetting->state = SPI_STATE_READY;
return b;
}
uint8 SPIClass::dmaSend(void * transmitBuf, uint16 length, bool minc) {
dmaSendSet(transmitBuf, minc);
return dmaSendRepeat(length);
}
uint8 SPIClass::dmaSendAsync(void * transmitBuf, uint16 length, bool minc)
{
static bool isRunning=false;
uint8 SPIClass::dmaSendAsync(void * transmitBuf, uint16 length, bool minc) {
uint8 b = 0;
if (isRunning)
if (_currentSetting->state != SPI_STATE_READY)
{
uint32_t m = millis();
@ -488,13 +528,14 @@ uint8 SPIClass::dmaSendAsync(void * transmitBuf, uint16 length, bool minc)
while (spi_is_busy(_currentSetting->spi_d) != 0); // "... and then wait until BSY=0 before disabling the SPI."
spi_tx_dma_disable(_currentSetting->spi_d);
dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);
isRunning=false;
_currentSetting->state = SPI_STATE_READY;
}
if (length == 0) return 0;
uint32 flags = ( (DMA_MINC_MODE*minc) | DMA_FROM_MEM | DMA_TRNS_CMPLT);
dma_init(_currentSetting->spiDmaDev);
// TX
dma_xfer_size dma_bit_size = (_currentSetting->dataSize==DATA_SIZE_16BIT) ? DMA_SIZE_16BITS : DMA_SIZE_8BITS;
@ -505,12 +546,103 @@ uint8 SPIClass::dmaSendAsync(void * transmitBuf, uint16 length, bool minc)
dma_enable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);// enable transmit
spi_tx_dma_enable(_currentSetting->spi_d);
isRunning=true;
_currentSetting->state = SPI_STATE_TRANSMIT;
return b;
}
/*
New functions added to manage callbacks.
Victor Perez 2017
*/
void SPIClass::onReceive(void(*callback)(void)) {
_currentSetting->receiveCallback = callback;
if (callback){
switch (_currentSetting->spi_d->clk_id) {
case RCC_SPI1:
dma_attach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel, &SPIClass::_spi1EventCallback);
break;
case RCC_SPI2:
dma_attach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel, &SPIClass::_spi2EventCallback);
break;
#if BOARD_NR_SPI >= 3
case RCC_SPI3:
dma_attach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel, &SPIClass::_spi3EventCallback);
break;
#endif
default:
ASSERT(0);
}
}
else {
dma_detach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel);
}
}
void SPIClass::onTransmit(void(*callback)(void)) {
_currentSetting->transmitCallback = callback;
if (callback){
switch (_currentSetting->spi_d->clk_id) {
case RCC_SPI1:
dma_attach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &SPIClass::_spi1EventCallback);
break;
case RCC_SPI2:
dma_attach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &SPIClass::_spi2EventCallback);
break;
#if BOARD_NR_SPI >= 3
case RCC_SPI3:
dma_attach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel, &SPIClass::_spi3EventCallback);
break;
#endif
default:
ASSERT(0);
}
}
else {
dma_detach_interrupt(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);
}
}
/*
TODO: check if better to first call the customer code, next disable the DMA requests.
Also see if we need to check whether callbacks are set or not, may be better to be checked during the initial setup and only set the callback to EventCallback if they are set.
*/
void SPIClass::EventCallback() {
while (spi_is_tx_empty(_currentSetting->spi_d) == 0); // "5. Wait until TXE=1 ..."
while (spi_is_busy(_currentSetting->spi_d) != 0); // "... and then wait until BSY=0"
switch (_currentSetting->state) {
case SPI_STATE_TRANSFER:
while (spi_is_rx_nonempty(_currentSetting->spi_d));
_currentSetting->state = SPI_STATE_READY;
spi_tx_dma_disable(_currentSetting->spi_d);
spi_rx_dma_disable(_currentSetting->spi_d);
//dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);
//dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiRxDmaChannel);
if (_currentSetting->receiveCallback)
{
_currentSetting->receiveCallback();
}
break;
case SPI_STATE_TRANSMIT:
_currentSetting->state = SPI_STATE_READY;
spi_tx_dma_disable(_currentSetting->spi_d);
//dma_disable(_currentSetting->spiDmaDev, _currentSetting->spiTxDmaChannel);
if (_currentSetting->transmitCallback)
{
_currentSetting->transmitCallback();
}
break;
default:
// we shouldn't get here, so better to add an assert and fail.
return;
}
}
void SPIClass::attachInterrupt(void) {
// Should be enableInterrupt()
}
@ -557,7 +689,23 @@ uint8 SPIClass::recv(void) {
return this->read();
}
/*
DMA call back functions, one per port.
*/
void SPIClass::_spi1EventCallback()
{
reinterpret_cast<class SPIClass*>(_spi1_this)->EventCallback();
}
void SPIClass::_spi2EventCallback() {
reinterpret_cast<class SPIClass*>(_spi2_this)->EventCallback();
}
#if BOARD_NR_SPI >= 3
void SPIClass::_spi3EventCallback() {
reinterpret_cast<class SPIClass*>(_spi3_this)->EventCallback();
}
#endif
/*
* Auxiliary functions
*/

61
STM32F1/libraries/SPI/src/SPI.h
View File

@ -99,6 +99,13 @@
#define DATA_SIZE_8BIT SPI_CR1_DFF_8_BIT
#define DATA_SIZE_16BIT SPI_CR1_DFF_16_BIT
typedef enum {
SPI_STATE_IDLE,
SPI_STATE_READY,
SPI_STATE_RECEIVE,
SPI_STATE_TRANSMIT,
SPI_STATE_TRANSFER
} spi_mode_t;
class SPISettings {
public:
SPISettings(uint32_t clock, BitOrder bitOrder, uint8_t dataMode) {
@ -134,21 +141,31 @@ private:
this->dataSize = dataSize;
}
uint32_t clock;
uint32_t dataSize;
uint32_t clockDivider;
BitOrder bitOrder;
uint8_t dataMode;
uint32_t dataSize;
spi_dev *spi_d;
uint8_t _SSPin;
uint32_t clockDivider;
volatile spi_mode_t state;
spi_dev *spi_d;
dma_channel spiRxDmaChannel, spiTxDmaChannel;
dma_dev* spiDmaDev;
void (*receiveCallback)(void) = NULL;
void (*transmitCallback)(void) = NULL;
friend class SPIClass;
};
volatile static bool dma1_ch3_Active;
/*
Should move this to within the class once tested out, just for tidyness
*/
static uint8_t ff = 0XFF;
static void (*_spi1_this);
static void (*_spi2_this);
#if BOARD_NR_SPI >= 3
static void (*_spi3_this);
#endif
/**
* @brief Wirish SPI interface.
@ -217,6 +234,14 @@ public:
*/
void setDataSize(uint32 ds);
/* Victor Perez 2017. Added to set and clear callback functions for callback
* on DMA transfer completion.
* onReceive used to set the callback in case of dmaTransfer (tx/rx), once rx is completed
* onTransmit used to set the callback in case of dmaSend (tx only). That function
* will NOT be called in case of TX/RX
*/
void onReceive(void(*)(void));
void onTransmit(void(*)(void));
/*
* I/O
@ -280,6 +305,8 @@ public:
* @param length Number of bytes in buffer to transmit.
*/
uint8 dmaTransfer(void * transmitBuf, void * receiveBuf, uint16 length);
void dmaTransferSet(void *transmitBuf, void *receiveBuf);
uint8 dmaTransferRepeat(uint16 length);
/**
* @brief Sets up a DMA Transmit for SPI 8 or 16 bit transfer mode.
@ -289,8 +316,12 @@ public:
*
* @param data buffer half words to transmit,
* @param length Number of bytes in buffer to transmit.
* @param minc Set to use Memory Increment mode, clear to use Circular mode.
*/
uint8 dmaSend(void * transmitBuf, uint16 length, bool minc = 1);
void dmaSendSet(void * transmitBuf, bool minc);
uint8 dmaSendRepeat(uint16 length);
uint8 dmaSendAsync(void * transmitBuf, uint16 length, bool minc = 1);
/*
* Pin accessors
@ -374,19 +405,23 @@ public:
uint8 recv(void);
private:
/*
static inline void DMA1_CH3_Event() {
dma1_ch3_Active = 0;
// dma_disable(DMA1, DMA_CH3);
// dma_disable(DMA1, DMA_CH2);
// To Do. Need to wait for
}
*/
SPISettings _settings[BOARD_NR_SPI];
SPISettings *_currentSetting;
void updateSettings(void);
/*
* Functions added for DMA transfers with Callback.
* Experimental.
*/
void EventCallback(void);
static void _spi1EventCallback(void);
static void _spi2EventCallback(void);
#if BOARD_NR_SPI >= 3
static void _spi3EventCallback(void);
#endif
/*
spi_dev *spi_d;
uint8_t _SSPin;

87
STM32F1/libraries/STM32ADC/examples/SingleChannelAtSampleRateCircularBuffer/SingleChannelAtSampleRateCircularBuffer.ino Normal file
View File

@ -0,0 +1,87 @@
#include <HardwareTimer.h>
#include <STM32ADC.h>
#define pinLED PC13
#define pinOUT PB0
#define _SEND_BY_USB
#ifdef SEND_BY_USB
USBSerial usb;
#endif
// Channels to be acquired.
// A0 (adc1 channel 1)
uint8 pins = 0;
#define maxSamples 2000
uint16_t buffer[maxSamples];
uint16_t *buffers[2];
uint8_t bufr;
uint8_t bufw;
#define sampleFreqKhz 200
#define samplePeriodus 1000 / sampleFreqKhz
#define ticksPerSecond 2 * sampleFreqKhz * 1000 / maxSamples
STM32ADC myADC(ADC1);
long ticks;
void TimerIRQ(void) {
ticks++;
}
void DmaIRQ(void) {
digitalWrite(pinOUT, ! digitalRead(pinOUT));
bufw = (bufw+1)%2;
ticks++;
}
void setup() {
pinMode(pinLED, OUTPUT);
pinMode(pinOUT, OUTPUT);
pinMode(pins, INPUT_ANALOG);
Serial.begin(115200);
Serial.println("START");
#ifdef SEND_BY_USB
usb.begin();
while (!usb.isConnected()) ;
#endif
ticks = 0;
bufr = 0;
bufw = 0;
buffers[0] = &buffer[0];
buffers[1] = &buffer[maxSamples/2];
Timer3.setPeriod(samplePeriodus);
Timer3.setMasterModeTrGo(TIMER_CR2_MMS_UPDATE);
myADC.calibrate();
myADC.setSampleRate(ADC_SMPR_1_5); // ?
myADC.setPins(&pins, 1);
myADC.setDMA(buffer, maxSamples, (DMA_MINC_MODE | DMA_CIRC_MODE | DMA_HALF_TRNS | DMA_TRNS_CMPLT), DmaIRQ);
myADC.setTrigger(ADC_EXT_EV_TIM3_TRGO);
myADC.startConversion();
}
void loop() {
if (bufr!=bufw) {
// process data
#ifdef SEND_BY_USB
if (usb.isConnected()) usb.write((uint8_t *)buffers[bufr],maxSamples); // send it : (maxSamples /2 )*2 (bytes)
#endif
bufr = (bufr+1)%2;
}
if (ticks==ticksPerSecond) {
digitalWrite(pinLED, ! digitalRead(pinLED));
ticks = 0;
}
}

2
STM32F1/libraries/STM32ADC/src/utility/util_adc.c
View File

@ -45,7 +45,7 @@ void enable_adc_irq(adc_dev* dev) {//ADC1 for now.
Enable the reading of the internal variables (Temperature and Vref).
*/
void enable_internal_reading(adc_dev *dev) {
dev->regs->CR2 |= ADC_CR2_TSEREFE;
dev->regs->CR2 |= ADC_CR2_TSVREFE;
}
/*

15
STM32F1/libraries/Wire/HardWire.cpp
View File

@ -84,3 +84,18 @@ void HardWire::end() {
i2c_disable(sel_hard);
sel_hard = 0;
}
void HardWire::setClock(uint32_t frequencyHz)
{
switch(frequencyHz)
{
case 400000:
dev_flags |= I2C_FAST_MODE;// set FAST_MODE bit
break;
case 100000:
default:
dev_flags &= ~I2C_FAST_MODE;// clear FAST_MODE bit
break;
}
}

1
STM32F1/libraries/Wire/HardWire.h
View File

@ -66,6 +66,7 @@ public:
*/
void end();
void setClock(uint32_t frequencyHz);
/*
* Disables the I2C device and remove the device address.
*/

26
STM32F1/libraries/Wire/Wire.cpp
View File

@ -56,7 +56,9 @@
void TwoWire::set_scl(bool state) {
I2C_DELAY(this->i2c_delay);
digitalWrite(this->scl_pin,state);
gpio_write_bit(sclDevice,sclBit, state);
// digitalWrite(this->scl_pin,state);
//Allow for clock stretching - dangerous currently
if (state == HIGH) {
while(digitalRead(this->scl_pin) == 0);
@ -65,7 +67,8 @@ void TwoWire::set_scl(bool state) {
void TwoWire::set_sda(bool state) {
I2C_DELAY(this->i2c_delay);
digitalWrite(this->sda_pin, state);
gpio_write_bit(sdaDevice,sdaBit, state);
//digitalWrite(this->sda_pin, state);
}
void TwoWire::i2c_start() {
@ -198,6 +201,11 @@ void TwoWire::begin(uint8 self_addr) {
rx_buf_len = 0;
pinMode(this->scl_pin, OUTPUT_OPEN_DRAIN);
pinMode(this->sda_pin, OUTPUT_OPEN_DRAIN);
sclDevice = PIN_MAP[this->scl_pin].gpio_device;
sclBit = PIN_MAP[this->scl_pin].gpio_bit;
sdaDevice = PIN_MAP[this->sda_pin].gpio_device;
sdaBit = PIN_MAP[this->sda_pin].gpio_bit;
set_scl(HIGH);
set_sda(HIGH);
}
@ -214,6 +222,20 @@ void TwoWire::end()
}
}
void TwoWire::setClock(uint32_t frequencyHz)
{
switch(frequencyHz)
{
case 400000:
i2c_delay = SOFT_FAST;
break;
case 100000:
default:
i2c_delay = SOFT_STANDARD;
break;
}
}
TwoWire::~TwoWire() {
this->scl_pin=0;
this->sda_pin=0;

9
STM32F1/libraries/Wire/Wire.h
View File

@ -50,7 +50,7 @@
#define SDA PB7
#define SCL PB6
#define SOFT_STANDARD 27
#define SOFT_STANDARD 19
#define SOFT_FAST 0
@ -126,6 +126,11 @@ class TwoWire : public WireBase {
*/
uint8 process(uint8);
uint8 process();
private:
gpio_dev *sdaDevice;
uint8 sdaBit;
gpio_dev *sclDevice;
uint8 sclBit;
public:
/*
* Accept pin numbers for SCL and SDA lines. Set the delay needed
@ -140,6 +145,8 @@ class TwoWire : public WireBase {
*/
void begin(uint8 = 0x00);
void setClock(uint32_t frequencyHz);
/*
* Sets pins SDA and SCL to INPUT
*/