88d2457f30
STM32F1 core: Implemented changes already made to the GD32F1 core to use F_CPU instead of hard coded values for 72000000 and (F_CPU -1) instead of 71999999 and to replace other hard coded values related to the clock freqency. Also updated the code so that the USB clock was disabled in setup_clock_prescalers to allow it to be changed in that function during initialisation, in case altermative prescaler values for USB are required, e.g. for operation at 48Mhz
2015-09-06 07:51:40 +10:00
7564830669
Edits to move pinmap to flash
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Initial comit, not tested, but copied from previous working folder.
2015-08-25 00:02:57 -05:00
572b311c3a
Fixed formatting to match existing style + Hardwire comments
2015-08-01 19:09:43 +01:00
3b8b7a79f4
Bugfix for HardWire/I2C + configured/compiled dfu-util to work on Linux again
...
- Fixed 0 byte payload bug, stopping HardWire from sending only addresses to scan for devices
- Fixed I2C bug accessing wrong status register for error flags
- Improved Hardwire endTransmission() return flags to correspond with the actual I2C failure status
- Removed dos endings from dfu-util autogen script breaking compilation
2015-08-01 18:58:14 +01:00
6d18be66ad
Move Timer ISR handlers from timer_f1.c to timer.c to resolve linker issue in which some ISR's were not being linked even though they were being used
2015-07-05 22:38:47 +10:00
657d6dae02
Alternative / better fix provided by @pico based on work by @victor_pv. Commented out AF REMAP of NSS in spi_f1.c
2015-06-10 10:33:13 +10:00
ece9c3681d
Added code to 'get' the gpio mode of a pin, and have used it in SPIClass::begin() to store and reinstate the pin mode of the SPI NSS pin. This is a work around for 'features' in the STM32 silicon, which seem to change the GPIO mode of the SPI NSS (hardware - 'Software Select' pin)
2015-06-10 10:25:22 +10:00
f337329c89
Undid changes to isrs.s from last merge (its not practical to undo the remove, its easier just to replace the file in question with the older / working version
2015-06-02 08:05:32 +10:00
97604fe455
Replaced isrs.s with new version from victor_pv with improved system for weak refs to isr handlers
2015-06-01 19:19:37 +10:00
164c8065c8
Weakrefs used instead of weaks in isrs.S
2015-05-31 09:10:31 -05:00
39787f73e7
Changed isrs.s with update from Rick Kimball to fix issue with hardware timers when not using the --whole-archive flag in the build flags. also changed platform.txt to remove --whole-archive
2015-05-26 14:50:37 +10:00
6fec429e99
Made new generic STM32F103C board variant based on Maple mini. This is a work in process. It seems to work, but needs more tidying up ;-)
2015-04-14 20:18:37 +10:00
f21592574f
Added serial config parameter support to HardwareSerial :: begin(), so that word length (of 8 or 9 bits), parity (None, Even or Odd) and 1 or 2 stop bits can now be set. Note the STM32 doesnt support all the word lengths supprted by AVR or SAM e.g. the hardware doesnt support 5,6 or 7 bit word lengths.
2015-03-04 22:59:11 +11:00
5f83c13285
renamed top level folder STM32F1XX to STM32F1 to correspond to other top level folder names e.g. STM32F3 and STM32F4
2015-02-24 20:13:04 +11:00
Roger Clark
victorpv
Fergus
rogerclarkmelbourne