2015-08-31 20:16:06 -07:00
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/*
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Copyright (C) 2015 Stephen Caudle
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* @file NRF51x22/adc_lld.h
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* @brief NRF51x22 ADC subsystem low level driver header.
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*
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* @addtogroup ADC
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* @{
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*/
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2016-04-04 15:36:24 -07:00
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#ifndef HAL_ADC_LLD_H
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#define HAL_ADC_LLD_H
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2015-08-31 20:16:06 -07:00
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#if HAL_USE_ADC || defined(__DOXYGEN__)
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/*===========================================================================*/
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/* Driver constants. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver pre-compile time settings. */
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/*===========================================================================*/
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/**
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* @name Configuration options
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* @{
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*/
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/**
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* @brief ADC1 driver enable switch.
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* @details If set to @p TRUE the support for ADC1 is included.
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* @note The default is @p FALSE.
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*/
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2016-07-10 01:48:04 -07:00
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#if !defined(NRF5_ADC_USE_ADC1) || defined(__DOXYGEN__)
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#define NRF5_ADC_USE_ADC1 FALSE
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2015-08-31 20:16:06 -07:00
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#endif
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/**
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* @brief ADC interrupt priority level setting.
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*/
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2016-07-10 01:48:04 -07:00
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#if !defined(NRF5_ADC_IRQ_PRIORITY) || defined(__DOXYGEN__)
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#define NRF5_ADC_IRQ_PRIORITY 2
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2015-08-31 20:16:06 -07:00
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#endif
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/** @} */
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/*===========================================================================*/
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/* Derived constants and error checks. */
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/*===========================================================================*/
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2016-07-10 01:48:04 -07:00
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#if !NRF5_ADC_USE_ADC1
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2015-08-31 20:16:06 -07:00
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#error "ADC driver activated but no ADC peripheral assigned"
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#endif
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2016-07-10 01:48:04 -07:00
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#if NRF5_ADC_USE_ADC1 && \
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!OSAL_IRQ_IS_VALID_PRIORITY(NRF5_ADC_IRQ_PRIORITY)
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2015-08-31 20:16:06 -07:00
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#error "Invalid IRQ priority assigned to ADC1"
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#endif
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/*===========================================================================*/
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/* Driver data structures and types. */
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/*===========================================================================*/
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/**
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* @brief ADC sample data type.
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*/
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typedef uint16_t adcsample_t;
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/**
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* @brief Channels number in a conversion group.
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*/
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typedef uint8_t adc_channels_num_t;
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/**
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* @brief Type of a structure representing an ADC driver.
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*/
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typedef struct ADCDriver ADCDriver;
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/**
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* @brief ADC notification callback type.
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*
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* @param[in] adcp pointer to the @p ADCDriver object triggering the
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* callback
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* @param[in] buffer pointer to the most recent samples data
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* @param[in] n number of buffer rows available starting from @p buffer
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*/
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typedef void (*adccallback_t)(ADCDriver *adcp, adcsample_t *buffer, size_t n);
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/**
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* @brief Conversion group configuration structure.
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* @details This implementation-dependent structure describes a conversion
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* operation.
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* @note The use of this configuration structure requires knowledge of
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* STM32 ADC cell registers interface, please refer to the STM32
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* reference manual for details.
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*/
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typedef struct {
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/**
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* @brief Enables the circular buffer mode for the group.
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*/
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bool circular;
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/**
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* @brief Number of the analog channels belonging to the conversion group.
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*/
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adc_channels_num_t num_channels;
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/**
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* @brief Callback function associated to the group or @p NULL.
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*/
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adccallback_t end_cb;
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/* End of the mandatory fields.*/
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/**
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* @brief Bitmask of channels for ADC conversion.
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*/
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uint32_t channel_mask;
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/**
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* @brief ADC CONFIG register details.
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* @note All the required bits must be defined into this field.
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*/
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uint32_t cfg;
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} ADCConversionGroup;
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/**
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* @brief Driver configuration structure.
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* @note It could be empty on some architectures.
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*/
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typedef struct {
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uint32_t dummy;
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} ADCConfig;
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/**
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* @brief Structure representing an ADC driver.
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*/
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struct ADCDriver {
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/**
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* @brief Driver state.
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*/
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adcstate_t state;
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/**
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* @brief Current configuration data.
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*/
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const ADCConfig *config;
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/**
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* @brief Current samples buffer pointer or @p NULL.
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*/
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adcsample_t *samples;
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/**
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* @brief Current samples buffer depth or @p 0.
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*/
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size_t depth;
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/**
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* @brief Current conversion group pointer or @p NULL.
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*/
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const ADCConversionGroup *grpp;
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#if ADC_USE_WAIT || defined(__DOXYGEN__)
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/**
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* @brief Waiting thread.
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*/
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thread_reference_t thread;
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#endif
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#if ADC_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__)
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/**
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* @brief Mutex protecting the peripheral.
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*/
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mutex_t mutex;
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#endif /* ADC_USE_MUTUAL_EXCLUSION */
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#if defined(ADC_DRIVER_EXT_FIELDS)
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ADC_DRIVER_EXT_FIELDS
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#endif
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/* End of the mandatory fields.*/
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/**
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* @brief Pointer to the ADCx registers block.
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*/
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NRF_ADC_Type *adc;
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/**
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* @brief Number of samples expected.
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*/
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size_t number_of_samples;
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/**
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* @brief Current position in the buffer.
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*/
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size_t current_index;
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/**
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* @brief Current channel index into group channel_mask.
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*/
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size_t current_channel;
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};
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/*===========================================================================*/
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/* Driver macros. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* External declarations. */
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/*===========================================================================*/
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2016-07-10 01:48:04 -07:00
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#if NRF5_ADC_USE_ADC1 && !defined(__DOXYGEN__)
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2015-08-31 20:16:06 -07:00
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extern ADCDriver ADCD1;
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#endif
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#ifdef __cplusplus
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extern "C" {
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#endif
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void adc_lld_init(void);
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void adc_lld_start(ADCDriver *adcp);
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void adc_lld_stop(ADCDriver *adcp);
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void adc_lld_start_conversion(ADCDriver *adcp);
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void adc_lld_stop_conversion(ADCDriver *adcp);
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#ifdef __cplusplus
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}
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#endif
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#endif /* HAL_USE_ADC */
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2016-04-04 15:36:24 -07:00
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#endif /* HAL_ADC_LLD_H */
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2015-08-31 20:16:06 -07:00
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/** @} */
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