Add RP2040 PWM driver
All individual RP2040 PWM channels are mapped onto distinct ChibiOS PWM drivers, as this fits driver model which wants an independent timer per driver.
This commit is contained in:
Stefan Kerkmann
parent
2bfb681d68
commit
09dc9d31ea
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ifeq ($(USE_SMART_BUILD),yes)
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ifneq ($(findstring HAL_USE_PWM TRUE,$(HALCONF)),)
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PLATFORMSRC += $(CHIBIOS_CONTRIB)/os/hal/ports/RP/LLD/PWMv1/hal_pwm_lld.c
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endif
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else
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PLATFORMSRC += $(CHIBIOS_CONTRIB)/os/hal/ports/RP/LLD/PWMv1/hal_pwm_lld.c
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endif
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PLATFORMINC += $(CHIBIOS_CONTRIB)/os/hal/ports/RP/LLD/PWMv1
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/*
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ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* @file hal_pwm_lld.c
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* @brief PLATFORM PWM subsystem low level driver source.
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*
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* @addtogroup PWM
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* @{
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*/
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#include "hal.h"
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#if (HAL_USE_PWM == TRUE) || defined(__DOXYGEN__)
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/*===========================================================================*/
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/* Driver local definitions. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver exported variables. */
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/*===========================================================================*/
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/**
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* @brief PWMD0 driver identifier.
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* @note The driver PWMD0 allocates the PWM channel 0 peripheral when enabled.
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*/
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#if (RP_PWM_USE_PWM0 == TRUE) || defined(__DOXYGEN__)
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PWMDriver PWMD0;
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#endif
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/**
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* @brief PWMD1 driver identifier.
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* @note The driver PWMD1 allocates the PWM channel 1 peripheral when enabled.
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*/
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#if (RP_PWM_USE_PWM1 == TRUE) || defined(__DOXYGEN__)
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PWMDriver PWMD1;
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#endif
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/**
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* @brief PWMD2 driver identifier.
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* @note The driver PWMD2 allocates the PWM channel 2 peripheral when enabled.
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*/
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#if (RP_PWM_USE_PWM2 == TRUE) || defined(__DOXYGEN__)
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PWMDriver PWMD2;
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#endif
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/**
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* @brief PWMD3 driver identifier.
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* @note The driver PWMD0 allocates the PWM channel 3 peripheral when enabled.
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*/
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#if (RP_PWM_USE_PWM3 == TRUE) || defined(__DOXYGEN__)
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PWMDriver PWMD3;
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#endif
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/**
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* @brief PWMD4 driver identifier.
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* @note The driver PWMD4 allocates the PWM channel 4 peripheral when enabled.
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*/
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#if (RP_PWM_USE_PWM4 == TRUE) || defined(__DOXYGEN__)
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PWMDriver PWMD4;
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#endif
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/**
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* @brief PWMD5 driver identifier.
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* @note The driver PWMD5 allocates the PWM channel 5 peripheral when enabled.
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*/
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#if (RP_PWM_USE_PWM5 == TRUE) || defined(__DOXYGEN__)
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PWMDriver PWMD5;
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#endif
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/**
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* @brief PWMD6 driver identifier.
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* @note The driver PWMD6 allocates the PWM channel 6 peripheral when enabled.
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*/
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#if (RP_PWM_USE_PWM6 == TRUE) || defined(__DOXYGEN__)
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PWMDriver PWMD6;
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#endif
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/**
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* @brief PWMD7 driver identifier.
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* @note The driver PWMD7 allocates the PWM channel 7 peripheral when enabled.
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*/
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#if (RP_PWM_USE_PWM7 == TRUE) || defined(__DOXYGEN__)
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PWMDriver PWMD7;
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#endif
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/*===========================================================================*/
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/* Driver local variables and types. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver local functions. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver interrupt handlers. */
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/*===========================================================================*/
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#if (RP_PWM_USE_PWM0 == TRUE) || (RP_PWM_USE_PWM1 == TRUE) || \
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(RP_PWM_USE_PWM2 == TRUE) || (RP_PWM_USE_PWM3 == TRUE) || \
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(RP_PWM_USE_PWM4 == TRUE) || (RP_PWM_USE_PWM5 == TRUE) || \
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(RP_PWM_USE_PWM6 == TRUE) || (RP_PWM_USE_PWM7 == TRUE) || \
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defined(__DOXYGEN__)
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OSAL_IRQ_HANDLER(RP_PWM_IRQ_WRAP_HANDLER) {
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OSAL_IRQ_PROLOGUE();
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uint32_t ints = PWM->INTS;
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PWM->INTR = ints;
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#if RP_PWM_USE_PWM0 == TRUE
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if (((ints & PWM_INTS_CH0) != 0) && (PWMD0.config->callback != NULL)) {
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PWMD0.config->callback(&PWMD0);
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}
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#endif
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#if RP_PWM_USE_PWM1 == TRUE
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if (((ints & PWM_INTS_CH1) != 0) && (PWMD1.config->callback != NULL)) {
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PWMD1.config->callback(&PWMD1);
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}
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#endif
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#if RP_PWM_USE_PWM2 == TRUE
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if (((ints & PWM_INTS_CH2) != 0) && (PWMD2.config->callback != NULL)) {
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PWMD2.config->callback(&PWMD2);
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}
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#endif
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#if RP_PWM_USE_PWM3 == TRUE
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if (((ints & PWM_INTS_CH3) != 0) && (PWMD3.config->callback != NULL)) {
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PWMD3.config->callback(&PWMD3);
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}
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#endif
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#if RP_PWM_USE_PWM4 == TRUE
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if (((ints & PWM_INTS_CH4) != 0) && (PWMD4.config->callback != NULL)) {
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PWMD4.config->callback(&PWMD4);
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}
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#endif
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#if RP_PWM_USE_PWM5 == TRUE
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if (((ints & PWM_INTS_CH5) != 0) && (PWMD5.config->callback != NULL)) {
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PWMD5.config->callback(&PWMD5);
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}
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#endif
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#if RP_PWM_USE_PWM6 == TRUE
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if (((ints & PWM_INTS_CH6) != 0) && (PWMD6.config->callback != NULL)) {
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PWMD6.config->callback(&PWMD6);
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}
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#endif
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#if RP_PWM_USE_PWM7 == TRUE
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if (((ints & PWM_INTS_CH7) != 0) && (PWMD7.config->callback != NULL)) {
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PWMD7.config->callback(&PWMD7);
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}
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#endif
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OSAL_IRQ_EPILOGUE();
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}
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#endif
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/*===========================================================================*/
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/* Driver exported functions. */
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/*===========================================================================*/
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/**
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* @brief Low level PWM driver initialization.
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*
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* @notapi
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*/
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void pwm_lld_init(void) {
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#if RP_PWM_USE_PWM0 == TRUE
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/* Driver initialization.*/
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pwmObjectInit(&PWMD0);
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PWMD0.pwm = PWM;
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PWMD0.timer_id = 0;
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PWMD0.channels = PWM_CHANNELS;
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hal_lld_peripheral_reset(RESETS_ALLREG_PWM);
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#endif
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#if RP_PWM_USE_PWM1 == TRUE
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/* Driver initialization.*/
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pwmObjectInit(&PWMD1);
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PWMD1.pwm = PWM;
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PWMD1.timer_id = 1;
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PWMD1.channels = PWM_CHANNELS;
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hal_lld_peripheral_reset(RESETS_ALLREG_PWM);
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#endif
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#if RP_PWM_USE_PWM2 == TRUE
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/* Driver initialization.*/
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pwmObjectInit(&PWMD2);
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PWMD2.pwm = PWM;
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PWMD2.timer_id = 2;
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PWMD2.channels = PWM_CHANNELS;
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hal_lld_peripheral_reset(RESETS_ALLREG_PWM);
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#endif
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#if RP_PWM_USE_PWM3 == TRUE
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/* Driver initialization.*/
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pwmObjectInit(&PWMD3);
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PWMD3.pwm = PWM;
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PWMD3.timer_id = 3;
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PWMD3.channels = PWM_CHANNELS;
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hal_lld_peripheral_reset(RESETS_ALLREG_PWM);
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#endif
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#if RP_PWM_USE_PWM4 == TRUE
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/* Driver initialization.*/
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pwmObjectInit(&PWMD4);
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PWMD4.pwm = PWM;
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PWMD4.timer_id = 4;
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PWMD4.channels = PWM_CHANNELS;
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hal_lld_peripheral_reset(RESETS_ALLREG_PWM);
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#endif
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#if RP_PWM_USE_PWM5 == TRUE
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/* Driver initialization.*/
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pwmObjectInit(&PWMD5);
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PWMD5.pwm = PWM;
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PWMD5.timer_id = 5;
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PWMD5.channels = PWM_CHANNELS;
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hal_lld_peripheral_reset(RESETS_ALLREG_PWM);
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#endif
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#if RP_PWM_USE_PWM6 == TRUE
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/* Driver initialization.*/
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pwmObjectInit(&PWMD6);
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PWMD6.pwm = PWM;
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PWMD6.timer_id = 6;
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PWMD6.channels = PWM_CHANNELS;
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hal_lld_peripheral_reset(RESETS_ALLREG_PWM);
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#endif
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#if RP_PWM_USE_PWM7 == TRUE
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/* Driver initialization.*/
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pwmObjectInit(&PWMD7);
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PWMD7.pwm = PWM;
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PWMD7.timer_id = 7;
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PWMD7.channels = PWM_CHANNELS;
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hal_lld_peripheral_reset(RESETS_ALLREG_PWM);
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#endif
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}
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/**
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* @brief Configures and activates the PWM peripheral.
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* @note Starting a driver that is already in the @p PWM_READY state
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* disables all the active channels.
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*
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* @param[in] pwmp pointer to a @p PWMDriver object
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*
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* @notapi
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*/
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void pwm_lld_start(PWMDriver *pwmp) {
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PWM_TypeDef *p = pwmp->pwm;
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if (pwmp->state == PWM_STOP) {
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/* Clock activation and timer reset.*/
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hal_lld_peripheral_unreset(RESETS_ALLREG_PWM);
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nvicEnableVector(RP_PWM_IRQ_WRAP_NUMBER, RP_PWM_IRQ_WRAP_NUMBER_PRIORITY);
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} else {
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/* Driver re-configuration scenario, it must be stopped first.*/
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p->CH[pwmp->timer_id].CSR = 0;
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p->CH[pwmp->timer_id].CTR = 0;
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p->CH[pwmp->timer_id].CC = 0;
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}
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/* Counter clock divider */
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halfreq_t sys_clk = halClockGetPointX(clk_sys);
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halfreq_t pwm_freq_min = sys_clk / 256;
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osalDbgAssert(pwmp->config->frequency >= pwm_freq_min, "RP2040 pwm counter frequency has a minimal value of the system clock divided by 256");
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/* Integer part must not be zero */
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halfreq_t integer = sys_clk / pwmp->config->frequency;
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integer = integer == 0 ? 1 : integer;
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halfreq_t fraction = (sys_clk << 4) / pwmp->config->frequency;
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p->CH[pwmp->timer_id].DIV = (integer << 4 | (fraction & 0xF));
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p->CH[pwmp->timer_id].TOP = pwmp->period;
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uint32_t csr = PWM_CSR_EN | PWM_CSR_DIVMODE_FREE;
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csr &= ~PWM_CSR_PH_CORRECT;
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switch (pwmp->config->channels[0].mode & PWM_OUTPUT_MASK) {
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case PWM_OUTPUT_ACTIVE_LOW:
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csr |= PWM_CSR_A_INV;
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break;
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case PWM_OUTPUT_ACTIVE_HIGH:
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csr &= ~PWM_CSR_A_INV;
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break;
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default:
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;
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}
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switch (pwmp->config->channels[1].mode & PWM_OUTPUT_MASK) {
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case PWM_OUTPUT_ACTIVE_LOW:
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csr |= PWM_CSR_B_INV;
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break;
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case PWM_OUTPUT_ACTIVE_HIGH:
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csr &= ~PWM_CSR_B_INV;
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break;
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default:
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;
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}
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p->CH[pwmp->timer_id].CSR = csr;
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}
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/**
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* @brief Deactivates the PWM peripheral.
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*
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* @param[in] pwmp pointer to a @p PWMDriver object
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*
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* @notapi
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*/
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void pwm_lld_stop(PWMDriver *pwmp) {
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PWM_TypeDef *p = pwmp->pwm;
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/* If in ready state then disables the PWM clock.*/
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if (pwmp->state == PWM_READY) {
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p->CH[pwmp->timer_id].CSR = 0U;
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p->CH[pwmp->timer_id].CTR = 0U;
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p->CH[pwmp->timer_id].CC = 0U;
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p->CH[pwmp->timer_id].DIV = 1U;
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p->CH[pwmp->timer_id].TOP = 0xFFFF;
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}
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/* If all timers are disabled, disable the interrupt and reset pwm peripheral */
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if (!p->EN) {
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nvicDisableVector(RP_PWM_IRQ_WRAP_NUMBER);
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hal_lld_peripheral_reset(RESETS_ALLREG_PWM);
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}
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}
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/**
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* @brief Enables a PWM channel.
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* @pre The PWM unit must have been activated using @p pwmStart().
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* @post The channel is active using the specified configuration.
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* @note The function has effect at the next cycle start.
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* @note Channel notification is not enabled.
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*
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* @param[in] pwmp pointer to a @p PWMDriver object
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* @param[in] channel PWM channel identifier (0...channels-1)
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* @param[in] width PWM pulse width as clock pulses number
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*
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* @notapi
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*/
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void pwm_lld_enable_channel(PWMDriver *pwmp,
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pwmchannel_t channel,
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pwmcnt_t width) {
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uint32_t current_cc = pwmp->pwm->CH[pwmp->timer_id].CC;
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if (channel == 0) {
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pwmp->pwm->CH[pwmp->timer_id].CC = (width & PWM_CC_A) | (current_cc & PWM_CC_B);
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} else {
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pwmp->pwm->CH[pwmp->timer_id].CC = (current_cc & PWM_CC_A) | ((width << PWM_CC_B_Pos) & PWM_CC_B);
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}
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}
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/**
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* @brief Disables a PWM channel and its notification.
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* @pre The PWM unit must have been activated using @p pwmStart().
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* @post The channel is disabled and its output line returned to the
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* idle state.
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* @note The function has effect at the next cycle start.
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*
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* @param[in] pwmp pointer to a @p PWMDriver object
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* @param[in] channel PWM channel identifier (0...channels-1)
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*
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* @notapi
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*/
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void pwm_lld_disable_channel(PWMDriver *pwmp, pwmchannel_t channel) {
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if (channel == 0) {
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pwmp->pwm->CH[pwmp->timer_id].CC &= ~PWM_CC_A | PWM_CC_B;
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} else {
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pwmp->pwm->CH[pwmp->timer_id].CC &= PWM_CC_A | ~PWM_CC_B;
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}
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}
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/**
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* @brief Enables the periodic activation edge notification.
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* @pre The PWM unit must have been activated using @p pwmStart().
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* @note If the notification is already enabled then the call has no effect.
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*
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* @param[in] pwmp pointer to a @p PWMDriver object
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*
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* @notapi
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*/
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void pwm_lld_enable_periodic_notification(PWMDriver *pwmp) {
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pwmp->pwm->INTE |= PWM_INTE_CH(pwmp->timer_id);
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}
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/**
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* @brief Disables the periodic activation edge notification.
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* @pre The PWM unit must have been activated using @p pwmStart().
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* @note If the notification is already disabled then the call has no effect.
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*
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* @param[in] pwmp pointer to a @p PWMDriver object
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*
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* @notapi
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*/
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void pwm_lld_disable_periodic_notification(PWMDriver *pwmp) {
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pwmp->pwm->INTE &= ~PWM_INTE_CH(pwmp->timer_id);
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}
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/**
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* @brief Enables a channel de-activation edge notification.
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* @pre The PWM unit must have been activated using @p pwmStart().
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* @pre The channel must have been activated using @p pwmEnableChannel().
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* @note If the notification is already enabled then the call has no effect.
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*
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* @param[in] pwmp pointer to a @p PWMDriver object
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* @param[in] channel PWM channel identifier (0...channels-1)
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*
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* @notapi
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*/
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void pwm_lld_enable_channel_notification(PWMDriver *pwmp,
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pwmchannel_t channel) {
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(void)pwmp;
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(void)channel;
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osalDbgAssert(false, "Individual channel notifications are not available on RP2040.");
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}
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/**
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* @brief Disables a channel de-activation edge notification.
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* @pre The PWM unit must have been activated using @p pwmStart().
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* @pre The channel must have been activated using @p pwmEnableChannel().
|
||||
* @note If the notification is already disabled then the call has no effect.
|
||||
*
|
||||
* @param[in] pwmp pointer to a @p PWMDriver object
|
||||
* @param[in] channel PWM channel identifier (0...channels-1)
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
void pwm_lld_disable_channel_notification(PWMDriver *pwmp,
|
||||
pwmchannel_t channel) {
|
||||
(void)pwmp;
|
||||
(void)channel;
|
||||
osalDbgAssert(false, "Individual channel notifications are not available on RP2040.");
|
||||
}
|
||||
|
||||
|
||||
#endif /* HAL_USE_PWM == TRUE */
|
||||
|
||||
/** @} */
|
||||
|
|
@ -0,0 +1,324 @@
|
|||
/*
|
||||
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
*/
|
||||
|
||||
/**
|
||||
* @file hal_pwm_lld.h
|
||||
* @brief PLATFORM PWM subsystem low level driver header.
|
||||
*
|
||||
* @addtogroup PWM
|
||||
* @{
|
||||
*/
|
||||
|
||||
#ifndef HAL_PWM_LLD_H
|
||||
#define HAL_PWM_LLD_H
|
||||
|
||||
#if (HAL_USE_PWM == TRUE) || defined(__DOXYGEN__)
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver constants. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Number of PWM channels per PWM driver.
|
||||
*/
|
||||
#define PWM_CHANNELS 2
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver pre-compile time settings. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @name PLATFORM configuration options
|
||||
* @{
|
||||
*/
|
||||
/**
|
||||
* @brief PWMD0 driver enable switch.
|
||||
* @details If set to @p TRUE the support for PWM0 is included.
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#if !defined(RP_PWM_USE_PWM0) || defined(__DOXYGEN__)
|
||||
#define RP_PWM_USE_PWM0 FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief PWMD1 driver enable switch.
|
||||
* @details If set to @p TRUE the support for PWM1 is included.
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#if !defined(RP_PWM_USE_PWM1) || defined(__DOXYGEN__)
|
||||
#define RP_PWM_USE_PWM1 FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief PWMD2 driver enable switch.
|
||||
* @details If set to @p TRUE the support for PWM2 is included.
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#if !defined(RP_PWM_USE_PWM2) || defined(__DOXYGEN__)
|
||||
#define RP_PWM_USE_PWM2 FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief PWMD3 driver enable switch.
|
||||
* @details If set to @p TRUE the support for PWM3 is included.
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#if !defined(RP_PWM_USE_PWM3) || defined(__DOXYGEN__)
|
||||
#define RP_PWM_USE_PWM3 FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief PWMD4 driver enable switch.
|
||||
* @details If set to @p TRUE the support for PWM4 is included.
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#if !defined(RP_PWM_USE_PWM4) || defined(__DOXYGEN__)
|
||||
#define RP_PWM_USE_PWM4 FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief PWMD5 driver enable switch.
|
||||
* @details If set to @p TRUE the support for PWM5 is included.
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#if !defined(RP_PWM_USE_PWM5) || defined(__DOXYGEN__)
|
||||
#define RP_PWM_USE_PWM5 FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief PWMD6 driver enable switch.
|
||||
* @details If set to @p TRUE the support for PWM6 is included.
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#if !defined(RP_PWM_USE_PWM6) || defined(__DOXYGEN__)
|
||||
#define RP_PWM_USE_PWM6 FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief PWMD7 driver enable switch.
|
||||
* @details If set to @p TRUE the support for PWM7 is included.
|
||||
* @note The default is @p FALSE.
|
||||
*/
|
||||
#if !defined(RP_PWM_USE_PWM7) || defined(__DOXYGEN__)
|
||||
#define RP_PWM_USE_PWM7 FALSE
|
||||
#endif
|
||||
|
||||
/**
|
||||
* @brief PWMD0..7 interrupt priority level setting.
|
||||
*/
|
||||
#if !defined(RP_PWM_IRQ_WRAP_NUMBER_PRIORITY) || defined(__DOXYGEN__)
|
||||
#define RP_PWM_IRQ_WRAP_NUMBER_PRIORITY 3
|
||||
#endif
|
||||
|
||||
/** @} */
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Configuration checks. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver data structures and types. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Type of a PWM mode.
|
||||
*/
|
||||
typedef uint32_t pwmmode_t;
|
||||
|
||||
/**
|
||||
* @brief Type of a PWM channel.
|
||||
*/
|
||||
typedef uint8_t pwmchannel_t;
|
||||
|
||||
/**
|
||||
* @brief Type of a channels mask.
|
||||
*/
|
||||
typedef uint32_t pwmchnmsk_t;
|
||||
|
||||
/**
|
||||
* @brief Type of a PWM counter.
|
||||
*/
|
||||
typedef uint16_t pwmcnt_t;
|
||||
|
||||
/**
|
||||
* @brief Type of a PWM driver channel configuration structure.
|
||||
*/
|
||||
typedef struct {
|
||||
/**
|
||||
* @brief Channel active logic level.
|
||||
*/
|
||||
pwmmode_t mode;
|
||||
/**
|
||||
* @brief Channel callback pointer.
|
||||
* @note This callback is invoked on the channel compare event. If set to
|
||||
* @p NULL then the callback is disabled.
|
||||
*/
|
||||
pwmcallback_t callback;
|
||||
/* End of the mandatory fields.*/
|
||||
} PWMChannelConfig;
|
||||
|
||||
/**
|
||||
* @brief Type of a PWM driver configuration structure.
|
||||
*/
|
||||
typedef struct {
|
||||
/**
|
||||
* @brief Timer clock in Hz.
|
||||
* @note The low level can use assertions in order to catch invalid
|
||||
* frequency specifications.
|
||||
*/
|
||||
uint32_t frequency;
|
||||
/**
|
||||
* @brief PWM period in ticks.
|
||||
* @note The low level can use assertions in order to catch invalid
|
||||
* period specifications.
|
||||
*/
|
||||
pwmcnt_t period;
|
||||
/**
|
||||
* @brief Periodic callback pointer.
|
||||
* @note This callback is invoked on PWM counter reset. If set to
|
||||
* @p NULL then the callback is disabled.
|
||||
*/
|
||||
pwmcallback_t callback;
|
||||
/**
|
||||
* @brief Channels configurations.
|
||||
*/
|
||||
PWMChannelConfig channels[PWM_CHANNELS];
|
||||
/* End of the mandatory fields.*/
|
||||
} PWMConfig;
|
||||
|
||||
/**
|
||||
* @brief Structure representing a PWM driver.
|
||||
*/
|
||||
struct PWMDriver {
|
||||
/**
|
||||
* @brief Driver state.
|
||||
*/
|
||||
pwmstate_t state;
|
||||
/**
|
||||
* @brief Current driver configuration data.
|
||||
*/
|
||||
const PWMConfig *config;
|
||||
/**
|
||||
* @brief Current PWM period in ticks.
|
||||
*/
|
||||
pwmcnt_t period;
|
||||
/**
|
||||
* @brief Mask of the enabled channels.
|
||||
*/
|
||||
pwmchnmsk_t enabled;
|
||||
/**
|
||||
* @brief Number of channels in this instance.
|
||||
*/
|
||||
pwmchannel_t channels;
|
||||
#if defined(PWM_DRIVER_EXT_FIELDS)
|
||||
PWM_DRIVER_EXT_FIELDS
|
||||
#endif
|
||||
/* End of the mandatory fields.*/
|
||||
/**
|
||||
* @brief Pointer to the PWM registers block.
|
||||
*/
|
||||
PWM_TypeDef *pwm;
|
||||
|
||||
/**
|
||||
* @brief Index of the associated PWM timer.
|
||||
*/
|
||||
pwmchannel_t timer_id;
|
||||
};
|
||||
|
||||
/*===========================================================================*/
|
||||
/* Driver macros. */
|
||||
/*===========================================================================*/
|
||||
|
||||
/**
|
||||
* @brief Changes the period the PWM peripheral.
|
||||
* @details This function changes the period of a PWM unit that has already
|
||||
* been activated using @p pwmStart().
|
||||
* @pre The PWM unit must have been activated using @p pwmStart().
|
||||
* @post The PWM unit period is changed to the new value.
|
||||
* @note The function has effect at the next cycle start.
|
||||
* @note If a period is specified that is shorter than the pulse width
|
||||
* programmed in one of the channels then the behavior is not
|
||||
* guaranteed.
|
||||
*
|
||||
* @param[in] pwmp pointer to a @p PWMDriver object
|
||||
* @param[in] period new cycle time in ticks
|
||||
*
|
||||
* @notapi
|
||||
*/
|
||||
#define pwm_lld_change_period(pwmp, period) \
|
||||
((pwmp)->pwm->CH[(pwmp)->timer_id].TOP = (period))
|
||||
|
||||
/*===========================================================================*/
|
||||
/* External declarations. */
|
||||
/*===========================================================================*/
|
||||
|
||||
#if (RP_PWM_USE_PWM0 == TRUE) && !defined(__DOXYGEN__)
|
||||
extern PWMDriver PWMD0;
|
||||
#endif
|
||||
|
||||
#if (RP_PWM_USE_PWM1 == TRUE) && !defined(__DOXYGEN__)
|
||||
extern PWMDriver PWMD1;
|
||||
#endif
|
||||
|
||||
#if (RP_PWM_USE_PWM2 == TRUE) && !defined(__DOXYGEN__)
|
||||
extern PWMDriver PWMD2;
|
||||
#endif
|
||||
|
||||
#if (RP_PWM_USE_PWM3 == TRUE) && !defined(__DOXYGEN__)
|
||||
extern PWMDriver PWMD3;
|
||||
#endif
|
||||
|
||||
#if (RP_PWM_USE_PWM4 == TRUE) && !defined(__DOXYGEN__)
|
||||
extern PWMDriver PWMD4;
|
||||
#endif
|
||||
|
||||
#if (RP_PWM_USE_PWM5 == TRUE) && !defined(__DOXYGEN__)
|
||||
extern PWMDriver PWMD5;
|
||||
#endif
|
||||
|
||||
#if (RP_PWM_USE_PWM6 == TRUE) && !defined(__DOXYGEN__)
|
||||
extern PWMDriver PWMD6;
|
||||
#endif
|
||||
|
||||
#if (RP_PWM_USE_PWM7 == TRUE) && !defined(__DOXYGEN__)
|
||||
extern PWMDriver PWMD7;
|
||||
#endif
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
void pwm_lld_init(void);
|
||||
void pwm_lld_start(PWMDriver *pwmp);
|
||||
void pwm_lld_stop(PWMDriver *pwmp);
|
||||
void pwm_lld_enable_channel(PWMDriver *pwmp,
|
||||
pwmchannel_t channel,
|
||||
pwmcnt_t width);
|
||||
void pwm_lld_disable_channel(PWMDriver *pwmp, pwmchannel_t channel);
|
||||
void pwm_lld_enable_periodic_notification(PWMDriver *pwmp);
|
||||
void pwm_lld_disable_periodic_notification(PWMDriver *pwmp);
|
||||
void pwm_lld_enable_channel_notification(PWMDriver *pwmp,
|
||||
pwmchannel_t channel);
|
||||
void pwm_lld_disable_channel_notification(PWMDriver *pwmp,
|
||||
pwmchannel_t channel);
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* HAL_USE_PWM == TRUE */
|
||||
|
||||
#endif /* HAL_PWM_LLD_H */
|
||||
|
||||
/** @} */
|
||||
|
|
@ -13,6 +13,7 @@ else
|
|||
endif
|
||||
|
||||
include ${CHIBIOS_CONTRIB}/os/hal/ports/RP/LLD/I2Cv1/driver.mk
|
||||
include ${CHIBIOS_CONTRIB}/os/hal/ports/RP/LLD/PWMv1/driver.mk
|
||||
include ${CHIBIOS_CONTRIB}/os/hal/ports/RP/LLD/ADCv1/driver.mk
|
||||
include ${CHIBIOS_CONTRIB}/os/hal/ports/RP/LLD/USBDv1/driver.mk
|
||||
|
||||
|
|
|
|||
|
|
@ -71,6 +71,19 @@
|
|||
#define RP_SPI_SPI1_DMA_PRIORITY 1
|
||||
#define RP_SPI_DMA_ERROR_HOOK(spip)
|
||||
|
||||
/*
|
||||
* PWM driver system settings.
|
||||
*/
|
||||
#define RP_PWM_USE_PWM0 FALSE
|
||||
#define RP_PWM_USE_PWM1 FALSE
|
||||
#define RP_PWM_USE_PWM2 FALSE
|
||||
#define RP_PWM_USE_PWM3 FALSE
|
||||
#define RP_PWM_USE_PWM4 FALSE
|
||||
#define RP_PWM_USE_PWM5 FALSE
|
||||
#define RP_PWM_USE_PWM6 FALSE
|
||||
#define RP_PWM_USE_PWM7 FALSE
|
||||
#define RP_PWM_IRQ_WRAP_NUMBER_PRIORITY 3
|
||||
|
||||
/*
|
||||
* USB driver system settings.
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -71,6 +71,19 @@
|
|||
#define RP_SPI_SPI1_DMA_PRIORITY 1
|
||||
#define RP_SPI_DMA_ERROR_HOOK(spip)
|
||||
|
||||
/*
|
||||
* PWM driver system settings.
|
||||
*/
|
||||
#define RP_PWM_USE_PWM0 FALSE
|
||||
#define RP_PWM_USE_PWM1 FALSE
|
||||
#define RP_PWM_USE_PWM2 FALSE
|
||||
#define RP_PWM_USE_PWM3 FALSE
|
||||
#define RP_PWM_USE_PWM4 FALSE
|
||||
#define RP_PWM_USE_PWM5 FALSE
|
||||
#define RP_PWM_USE_PWM6 FALSE
|
||||
#define RP_PWM_USE_PWM7 FALSE
|
||||
#define RP_PWM_IRQ_WRAP_NUMBER_PRIORITY 3
|
||||
|
||||
/*
|
||||
* USB driver system settings.
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -73,6 +73,19 @@
|
|||
#define RP_SPI_SPI1_DMA_PRIORITY 1
|
||||
#define RP_SPI_DMA_ERROR_HOOK(spip)
|
||||
|
||||
/*
|
||||
* PWM driver system settings.
|
||||
*/
|
||||
#define RP_PWM_USE_PWM0 FALSE
|
||||
#define RP_PWM_USE_PWM1 FALSE
|
||||
#define RP_PWM_USE_PWM2 FALSE
|
||||
#define RP_PWM_USE_PWM3 FALSE
|
||||
#define RP_PWM_USE_PWM4 FALSE
|
||||
#define RP_PWM_USE_PWM5 FALSE
|
||||
#define RP_PWM_USE_PWM6 FALSE
|
||||
#define RP_PWM_USE_PWM7 FALSE
|
||||
#define RP_PWM_IRQ_WRAP_NUMBER_PRIORITY 3
|
||||
|
||||
/*
|
||||
* USB driver system settings.
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -71,6 +71,19 @@
|
|||
#define RP_SPI_SPI1_DMA_PRIORITY 1
|
||||
#define RP_SPI_DMA_ERROR_HOOK(spip)
|
||||
|
||||
/*
|
||||
* PWM driver system settings.
|
||||
*/
|
||||
#define RP_PWM_USE_PWM0 FALSE
|
||||
#define RP_PWM_USE_PWM1 FALSE
|
||||
#define RP_PWM_USE_PWM2 FALSE
|
||||
#define RP_PWM_USE_PWM3 FALSE
|
||||
#define RP_PWM_USE_PWM4 FALSE
|
||||
#define RP_PWM_USE_PWM5 FALSE
|
||||
#define RP_PWM_USE_PWM6 FALSE
|
||||
#define RP_PWM_USE_PWM7 FALSE
|
||||
#define RP_PWM_IRQ_WRAP_NUMBER_PRIORITY 3
|
||||
|
||||
/*
|
||||
* USB driver system settings.
|
||||
*/
|
||||
|
|
|
|||
Loading…
Reference in New Issue