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moved QEI to LLD

This commit is contained in:
Stephane D'Alu 2016-07-10 21:46:46 +02:00
parent e5430a6f71
commit 52107b2ccb
8 changed files with 25 additions and 8 deletions
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2
demos/NRF52/Classic/halconf_community.h
View File

@ -35,7 +35,7 @@
#endif
#define HAL_USE_QEI FALSE
#define HAL_USE_QEI TRUE
/*===========================================================================*/

2
demos/NRF52/Classic/mcuconf.h
View File

@ -43,6 +43,8 @@
#define NRF5_RNG_USE_RNG0 TRUE
#define NRF5_GPT_USE_TIMER0 TRUE
#define NRF5_QEI_USE_QDEC0 TRUE
#define NRF5_QEI_USE_LED FALSE
#define WDG_USE_TIMEOUT_CALLBACK TRUE

4
os/hal/ports/NRF5/LLD/hal_pal_lld.h
View File

@ -130,10 +130,8 @@ typedef NRF_GPIO_Type *ioportid_t;
*/
#if NRF_SERIES == 51
#define IOPORT1 NRF_GPIO
#elif NRF_SERIES == 52
#define IOPORT1 NRF_P0
#else
#error "Unknown NRF_SERIES"
#define IOPORT1 NRF_P0
#endif
/*===========================================================================*/

14
os/hal/ports/NRF5/NRF51822/hal_qei_lld.c → os/hal/ports/NRF5/LLD/hal_qei_lld.c
View File

@ -160,19 +160,31 @@ void qei_lld_start(QEIDriver *qeip) {
#endif
/* Select pin for Phase A and Phase B */
#if NRF_SERIES == 51
qdec->PSELA = PAL_PAD(cfg->phase_a);
qdec->PSELB = PAL_PAD(cfg->phase_b);
#else
qdec->PSEL.A = PAL_PAD(cfg->phase_a);
qdec->PSEL.B = PAL_PAD(cfg->phase_b);
#endif
/* Select (optional) pin for LED, and configure it */
#if NRF5_QEI_USE_LED == TRUE
#if NRF_SERIES == 51
qdec->PSELLED = PAL_PAD(cfg->led);
#else
qdec->PSEL.LED = PAL_PAD(cfg->led);
#endif
qdec->LEDPOL = ((cfg->led_polarity == QEI_LED_POLARITY_LOW)
? QDEC_LEDPOL_LEDPOL_ActiveLow
: QDEC_LEDPOL_LEDPOL_ActiveHigh)
<< QDEC_LEDPOL_LEDPOL_Pos;
qdec->LEDPRE = cfg->led_warming;
#else
#if NRF_SERIES == 51
qdec->PSELLED = (uint32_t)-1;
#else
qdec->PSEL.LED = (uint32_t)-1;
#endif
#endif
/* Set sampling resolution and debouncing */

0
os/hal/ports/NRF5/NRF51822/hal_qei_lld.h → os/hal/ports/NRF5/LLD/hal_qei_lld.h
View File

4
os/hal/ports/NRF5/NRF51822/platform.mk
View File

@ -38,7 +38,7 @@ ifneq ($(findstring HAL_USE_PWM TRUE,$(HALCONF)),)
PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/NRF51822/hal_pwm_lld.c
endif
ifneq ($(findstring HAL_USE_QEI TRUE,$(HALCONF)),)
PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/NRF51822/hal_qei_lld.c
PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_qei_lld.c
endif
else
PLATFORMSRC = ${CHIBIOS}/os/hal/ports/common/ARMCMx/nvic.c \
@ -55,7 +55,7 @@ PLATFORMSRC = ${CHIBIOS}/os/hal/ports/common/ARMCMx/nvic.c \
${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_wdg_lld.c \
${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_rng_lld.c \
${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/NRF51822/hal_pwm_lld.c \
${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/NRF51822/hal_qei_lld.c
${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_qei_lld.c
endif
# Required include directories

6
os/hal/ports/NRF5/NRF52832/platform.mk
View File

@ -21,6 +21,9 @@ endif
ifneq ($(findstring HAL_USE_RNG TRUE,$(HALCONF)),)
PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_rng_lld.c
endif
ifneq ($(findstring HAL_USE_QEI TRUE,$(HALCONF)),)
PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_qei_lld.c
endif
else
PLATFORMSRC = ${CHIBIOS}/os/hal/ports/common/ARMCMx/nvic.c \
${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/NRF52832/hal_lld.c \
@ -29,7 +32,8 @@ PLATFORMSRC = ${CHIBIOS}/os/hal/ports/common/ARMCMx/nvic.c \
${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_st_lld.c \
${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_gpt_lld.c \
${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_wdg_lld.c \
${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_rng_lld.c
${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_rng_lld.c \
${CHIBIOS_CONTRIB}/os/hal/ports/NRF5/LLD/hal_qei_lld.c
endif
# Required include directories

1
os/hal/ports/NRF5/NRF52832/todo.txt
View File

@ -4,3 +4,4 @@
https://devzone.nordicsemi.com/question/86564/nrf52-write-buffer/
* implement pin-reset, swo trace, trace pin configuration
* implement errata (see system_nrf52.c)
* check GPIO DETECTMODE and LATCH