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Merge pull request #283 from KarlK90/gd32vf103-afio-registers 

[GD32VF103] Rename missed AFIO registers and free B4 pin on Longan Nano
This commit is contained in:
Fabien Poussin 2021-07-10 16:55:39 +02:00 committed by GitHub
parent 3fc7254ad3 24ec55baa7
commit 827620f896
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GPG Key ID: 4AEE18F83AFDEB23
3 changed files with 8 additions and 6 deletions
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2
os/hal/boards/SIPEED_LONGAN_NANO/board.c
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@ -44,4 +44,6 @@ void __early_init(void) {
* Board-specific initialization code. * Board-specific initialization code.
*/ */
void boardInit(void) { void boardInit(void) {
/* Free B4 pin by disabling JTAG NJTRST. */
AFIO->PCF0 |= AFIO_PCF0_SWJ_CFG_NOJNTRST;
} }

4
os/hal/ports/GD/GD32VF103/GPIO/hal_pal_lld.c
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@ -215,7 +215,7 @@ void _pal_lld_enablepadevent(ioportid_t port,
portidx = (((uint32_t)port - (uint32_t)GPIOA) >> 10U) & 0xFU; portidx = (((uint32_t)port - (uint32_t)GPIOA) >> 10U) & 0xFU;
/* Port selection in SYSCFG.*/ /* Port selection in SYSCFG.*/
AFIO->EXTICR[cridx] = (AFIO->EXTICR[cridx] & crmask) | (portidx << croff); AFIO->EXTISS[cridx] = (AFIO->EXTISS[cridx] & crmask) | (portidx << croff);
/* Programming edge registers.*/ /* Programming edge registers.*/
if (mode & PAL_EVENT_MODE_RISING_EDGE) if (mode & PAL_EVENT_MODE_RISING_EDGE)
@ -262,7 +262,7 @@ void _pal_lld_disablepadevent(ioportid_t port, iopadid_t pad) {
0x400 intervals in memory space. So far this is true for all devices.*/ 0x400 intervals in memory space. So far this is true for all devices.*/
portidx = (((uint32_t)port - (uint32_t)GPIOA) >> 10U) & 0xFU; portidx = (((uint32_t)port - (uint32_t)GPIOA) >> 10U) & 0xFU;
crport = (AFIO->EXTICR[cridx] >> croff) & 0xFU; crport = (AFIO->EXTISS[cridx] >> croff) & 0xFU;
osalDbgAssert(crport == portidx, "channel mapped on different port"); osalDbgAssert(crport == portidx, "channel mapped on different port");

8
os/hal/ports/GD/GD32VF103/gd32vf103.h
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@ -327,11 +327,11 @@ typedef struct
typedef struct typedef struct
{ {
__IO uint32_t EVCR; __IO uint32_t EC;
__IO uint32_t MAPR; __IO uint32_t PCF0;
__IO uint32_t EXTICR[4]; __IO uint32_t EXTISS[4];
uint32_t RESERVED0; uint32_t RESERVED0;
__IO uint32_t MAPR2; __IO uint32_t PCF1;
} AFIO_TypeDef; } AFIO_TypeDef;
/** /**
* @brief Inter Integrated Circuit Interface * @brief Inter Integrated Circuit Interface