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Updating FSMC driver (SRAM part)

This commit is contained in:
Fabien Poussin 2019-10-29 20:16:08 +01:00
parent 97b7064031
commit 90f32c3546
11 changed files with 143 additions and 193 deletions
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32
os/hal/include/fsmc/sram.h
View File

@ -43,32 +43,32 @@
* @brief SRAM driver enable switch. * @brief SRAM driver enable switch.
* @details If set to @p TRUE the support for SRAM1 is included. * @details If set to @p TRUE the support for SRAM1 is included.
*/ */
#if !defined(STM32_SRAM_USE_FSMC_SRAM1) || defined(__DOXYGEN__) #if !defined(STM32_FSMC_USE_SRAM1) || defined(__DOXYGEN__)
#define STM32_SRAM_USE_FSMC_SRAM1 FALSE #define STM32_FSMC_USE_SRAM1 FALSE
#endif #endif
/** /**
* @brief SRAM driver enable switch. * @brief SRAM driver enable switch.
* @details If set to @p TRUE the support for SRAM2 is included. * @details If set to @p TRUE the support for SRAM2 is included.
*/ */
#if !defined(STM32_SRAM_USE_FSMC_SRAM2) || defined(__DOXYGEN__) #if !defined(STM32_FSMC_USE_SRAM2) || defined(__DOXYGEN__)
#define STM32_SRAM_USE_FSMC_SRAM2 FALSE #define STM32_FSMC_USE_SRAM2 FALSE
#endif #endif
/** /**
* @brief SRAM driver enable switch. * @brief SRAM driver enable switch.
* @details If set to @p TRUE the support for SRAM3 is included. * @details If set to @p TRUE the support for SRAM3 is included.
*/ */
#if !defined(STM32_SRAM_USE_FSMC_SRAM3) || defined(__DOXYGEN__) #if !defined(STM32_FSMC_USE_SRAM3) || defined(__DOXYGEN__)
#define STM32_SRAM_USE_FSMC_SRAM3 FALSE #define STM32_FSMC_USE_SRAM3 FALSE
#endif #endif
/** /**
* @brief SRAM driver enable switch. * @brief SRAM driver enable switch.
* @details If set to @p TRUE the support for SRAM4 is included. * @details If set to @p TRUE the support for SRAM4 is included.
*/ */
#if !defined(STM32_SRAM_USE_FSMC_SRAM4) || defined(__DOXYGEN__) #if !defined(STM32_FSMC_USE_SRAM4) || defined(__DOXYGEN__)
#define STM32_SRAM_USE_FSMC_SRAM4 FALSE #define STM32_FSMC_USE_SRAM4 FALSE
#endif #endif
/** @} */ /** @} */
@ -77,13 +77,13 @@
/* Derived constants and error checks. */ /* Derived constants and error checks. */
/*===========================================================================*/ /*===========================================================================*/
#if !STM32_SRAM_USE_FSMC_SRAM1 && !STM32_SRAM_USE_FSMC_SRAM2 && \ #if !STM32_FSMC_USE_SRAM1 && !STM32_FSMC_USE_SRAM2 && \
!STM32_SRAM_USE_FSMC_SRAM3 && !STM32_SRAM_USE_FSMC_SRAM4 !STM32_FSMC_USE_SRAM3 && !STM32_FSMC_USE_SRAM4
#error "SRAM driver activated but no SRAM peripheral assigned" #error "SRAM driver activated but no SRAM peripheral assigned"
#endif #endif
#if (STM32_SRAM_USE_FSMC_SRAM1 || STM32_SRAM_USE_FSMC_SRAM2 || \ #if (STM32_FSMC_USE_SRAM1 || STM32_FSMC_USE_SRAM2 || \
STM32_SRAM_USE_FSMC_SRAM3 || STM32_SRAM_USE_FSMC_SRAM4) && !STM32_HAS_FSMC STM32_FSMC_USE_SRAM3 || STM32_FSMC_USE_SRAM4) && !STM32_HAS_FSMC
#error "FSMC not present in the selected device" #error "FSMC not present in the selected device"
#endif #endif
@ -137,19 +137,19 @@ struct SRAMDriver {
/* External declarations. */ /* External declarations. */
/*===========================================================================*/ /*===========================================================================*/
#if STM32_SRAM_USE_FSMC_SRAM1 && !defined(__DOXYGEN__) #if STM32_FSMC_USE_SRAM1 && !defined(__DOXYGEN__)
extern SRAMDriver SRAMD1; extern SRAMDriver SRAMD1;
#endif #endif
#if STM32_SRAM_USE_FSMC_SRAM2 && !defined(__DOXYGEN__) #if STM32_FSMC_USE_SRAM2 && !defined(__DOXYGEN__)
extern SRAMDriver SRAMD2; extern SRAMDriver SRAMD2;
#endif #endif
#if STM32_SRAM_USE_FSMC_SRAM3 && !defined(__DOXYGEN__) #if STM32_FSMC_USE_SRAM3 && !defined(__DOXYGEN__)
extern SRAMDriver SRAMD3; extern SRAMDriver SRAMD3;
#endif #endif
#if STM32_SRAM_USE_FSMC_SRAM4 && !defined(__DOXYGEN__) #if STM32_FSMC_USE_SRAM4 && !defined(__DOXYGEN__)
extern SRAMDriver SRAMD4; extern SRAMDriver SRAMD4;
#endif #endif

12
os/hal/include/hal_fsmc.h
View File

@ -327,25 +327,25 @@ struct FSMCDriver {
/* End of the mandatory fields.*/ /* End of the mandatory fields.*/
#if HAL_USE_FSMC_SRAM #if HAL_USE_FSMC_SRAM
#if STM32_SRAM_USE_FSMC_SRAM1 #if STM32_FSMC_USE_SRAM1
FSMC_SRAM_NOR_TypeDef *sram1; FSMC_SRAM_NOR_TypeDef *sram1;
#endif #endif
#if STM32_SRAM_USE_FSMC_SRAM2 #if STM32_FSMC_USE_SRAM2
FSMC_SRAM_NOR_TypeDef *sram2; FSMC_SRAM_NOR_TypeDef *sram2;
#endif #endif
#if STM32_SRAM_USE_FSMC_SRAM3 #if STM32_FSMC_USE_SRAM3
FSMC_SRAM_NOR_TypeDef *sram3; FSMC_SRAM_NOR_TypeDef *sram3;
#endif #endif
#if STM32_SRAM_USE_FSMC_SRAM4 #if STM32_FSMC_USE_SRAM4
FSMC_SRAM_NOR_TypeDef *sram4; FSMC_SRAM_NOR_TypeDef *sram4;
#endif #endif
#endif #endif
#if HAL_USE_FSMC_NAND #if HAL_USE_FSMC_NAND
#if STM32_NAND_USE_FSMC_NAND1 #if STM32_FSMC_USE_NAND1
FSMC_NAND_TypeDef *nand1; FSMC_NAND_TypeDef *nand1;
#endif #endif
#if STM32_NAND_USE_FSMC_NAND2 #if STM32_FSMC_USE_NAND1
FSMC_NAND_TypeDef *nand2; FSMC_NAND_TypeDef *nand2;
#endif #endif
#endif #endif

2
os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc_sdram_lld.c
View File

@ -34,7 +34,7 @@
defined(STM32F769xx) || defined(STM32F777xx) || \ defined(STM32F769xx) || defined(STM32F777xx) || \
defined(STM32F779xx)) defined(STM32F779xx))
#if (STM32_FSMC_USE_SDRAM1 == TRUE) || (STM32_FSMC_USE_SDRAM2 == TRUE) || defined(__DOXYGEN__) #if (HAL_USE_FSMC_SDRAM == TRUE) || defined(__DOXYGEN__)
#include "hal_fsmc_sdram_lld.h" #include "hal_fsmc_sdram_lld.h"

2
os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc_sdram_lld.h
View File

@ -37,7 +37,7 @@
#include "hal_fsmc.h" #include "hal_fsmc.h"
#if (STM32_FSMC_USE_SDRAM1 == TRUE) || (STM32_FSMC_USE_SDRAM2 == TRUE) || defined(__DOXYGEN__) #if (HAL_USE_FSMC_SDRAM == TRUE) || defined(__DOXYGEN__)
/*===========================================================================*/ /*===========================================================================*/
/* Driver constants. */ /* Driver constants. */

61
os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc_sram_lld.c
View File

@ -22,9 +22,10 @@
* @{ * @{
*/ */
#include "hal.h" #include "hal.h"
#include "hal_fsmc_sram.h"
#if (STM32_USE_FSMC_SRAM == TRUE) || defined(__DOXYGEN__) #if (HAL_USE_FSMC_SRAM == TRUE) || defined(__DOXYGEN__)
#include "hal_fsmc_sram_lld.h"
/*===========================================================================*/ /*===========================================================================*/
/* Driver local definitions. */ /* Driver local definitions. */
@ -36,28 +37,28 @@
/** /**
* @brief SRAM1 driver identifier. * @brief SRAM1 driver identifier.
*/ */
#if STM32_SRAM_USE_FSMC_SRAM1 || defined(__DOXYGEN__) #if STM32_FSMC_USE_SRAM1 || defined(__DOXYGEN__)
SRAMDriver SRAMD1; SRAMDriver SRAMD1;
#endif #endif
/** /**
* @brief SRAM2 driver identifier. * @brief SRAM2 driver identifier.
*/ */
#if STM32_SRAM_USE_FSMC_SRAM2 || defined(__DOXYGEN__) #if STM32_FSMC_USE_SRAM2 || defined(__DOXYGEN__)
SRAMDriver SRAMD2; SRAMDriver SRAMD2;
#endif #endif
/** /**
* @brief SRAM3 driver identifier. * @brief SRAM3 driver identifier.
*/ */
#if STM32_SRAM_USE_FSMC_SRAM3 || defined(__DOXYGEN__) #if STM32_FSMC_USE_SRAM3 || defined(__DOXYGEN__)
SRAMDriver SRAMD3; SRAMDriver SRAMD3;
#endif #endif
/** /**
* @brief SRAM4 driver identifier. * @brief SRAM4 driver identifier.
*/ */
#if STM32_SRAM_USE_FSMC_SRAM4 || defined(__DOXYGEN__) #if STM32_FSMC_USE_SRAM4 || defined(__DOXYGEN__)
SRAMDriver SRAMD4; SRAMDriver SRAMD4;
#endif #endif
@ -81,36 +82,6 @@ SRAMDriver SRAMD4;
/* Driver exported functions. */ /* Driver exported functions. */
/*===========================================================================*/ /*===========================================================================*/
/**
* @brief Low level SRAM driver initialization.
*
* @notapi
*/
void fsmcSramInit(void) {
fsmc_init();
#if STM32_SRAM_USE_FSMC_SRAM1
SRAMD1.sram = FSMCD1.sram1;
SRAMD1.state = SRAM_STOP;
#endif /* STM32_SRAM_USE_FSMC_SRAM1 */
#if STM32_SRAM_USE_FSMC_SRAM2
SRAMD2.sram = FSMCD1.sram2;
SRAMD2.state = SRAM_STOP;
#endif /* STM32_SRAM_USE_FSMC_SRAM2 */
#if STM32_SRAM_USE_FSMC_SRAM3
SRAMD3.sram = FSMCD1.sram3;
SRAMD3.state = SRAM_STOP;
#endif /* STM32_SRAM_USE_FSMC_SRAM3 */
#if STM32_SRAM_USE_FSMC_SRAM4
SRAMD4.sram = FSMCD1.sram4;
SRAMD4.state = SRAM_STOP;
#endif /* STM32_SRAM_USE_FSMC_SRAM4 */
}
/** /**
* @brief Configures and activates the SRAM peripheral. * @brief Configures and activates the SRAM peripheral.
* *
@ -119,20 +90,11 @@ void fsmcSramInit(void) {
* *
* @notapi * @notapi
*/ */
void fsmcSramStart(SRAMDriver *sramp, const SRAMConfig *cfgp) { void lld_sram_start(SRAMDriver *sramp, const SRAMConfig *cfgp) {
if (FSMCD1.state == FSMC_STOP)
fsmc_start(&FSMCD1);
osalDbgAssert((sramp->state == SRAM_STOP) || (sramp->state == SRAM_READY),
"invalid state");
if (sramp->state == SRAM_STOP) {
sramp->sram->BTR = cfgp->btr; sramp->sram->BTR = cfgp->btr;
sramp->sram->BWTR = cfgp->bwtr; sramp->sram->BWTR = cfgp->bwtr;
sramp->sram->BCR = cfgp->bcr | FSMC_BCR_MBKEN; sramp->sram->BCR = cfgp->bcr | FSMC_BCR_MBKEN;
sramp->state = SRAM_READY;
}
} }
/** /**
@ -142,9 +104,8 @@ void fsmcSramStart(SRAMDriver *sramp, const SRAMConfig *cfgp) {
* *
* @notapi * @notapi
*/ */
void fsmcSramStop(SRAMDriver *sramp) { void lld_sram_stop(SRAMDriver *sramp) {
if (sramp->state == SRAM_READY) {
uint32_t mask = FSMC_BCR_MBKEN; uint32_t mask = FSMC_BCR_MBKEN;
#if (defined(STM32F427xx) || defined(STM32F437xx) || \ #if (defined(STM32F427xx) || defined(STM32F437xx) || \
defined(STM32F429xx) || defined(STM32F439xx) || \ defined(STM32F429xx) || defined(STM32F439xx) || \
@ -155,11 +116,9 @@ void fsmcSramStop(SRAMDriver *sramp) {
mask |= FSMC_BCR_CCLKEN; mask |= FSMC_BCR_CCLKEN;
#endif #endif
sramp->sram->BCR &= ~mask; sramp->sram->BCR &= ~mask;
sramp->state = SRAM_STOP;
}
} }
#endif /* STM32_USE_FSMC_SRAM */ #endif /* STM32_FSMC_USE_SRAM */
/** @} */ /** @} */

97
os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc_sram_lld.h
View File

@ -27,7 +27,7 @@
#include "hal_fsmc.h" #include "hal_fsmc.h"
#if (STM32_USE_FSMC_SRAM == TRUE) || defined(__DOXYGEN__) #if (HAL_USE_FSMC_SRAM == TRUE) || defined(__DOXYGEN__)
/*===========================================================================*/ /*===========================================================================*/
/* Driver constants. */ /* Driver constants. */
@ -41,95 +41,15 @@
* @{ * @{
*/ */
/**
* @brief SRAM driver enable switch.
* @details If set to @p TRUE the support for SRAM1 is included.
*/
#if !defined(STM32_SRAM_USE_FSMC_SRAM1) || defined(__DOXYGEN__)
#define STM32_SRAM_USE_FSMC_SRAM1 FALSE
#endif
/**
* @brief SRAM driver enable switch.
* @details If set to @p TRUE the support for SRAM2 is included.
*/
#if !defined(STM32_SRAM_USE_FSMC_SRAM2) || defined(__DOXYGEN__)
#define STM32_SRAM_USE_FSMC_SRAM2 FALSE
#endif
/**
* @brief SRAM driver enable switch.
* @details If set to @p TRUE the support for SRAM3 is included.
*/
#if !defined(STM32_SRAM_USE_FSMC_SRAM3) || defined(__DOXYGEN__)
#define STM32_SRAM_USE_FSMC_SRAM3 FALSE
#endif
/**
* @brief SRAM driver enable switch.
* @details If set to @p TRUE the support for SRAM4 is included.
*/
#if !defined(STM32_SRAM_USE_FSMC_SRAM4) || defined(__DOXYGEN__)
#define STM32_SRAM_USE_FSMC_SRAM4 FALSE
#endif
/** @} */ /** @} */
/*===========================================================================*/ /*===========================================================================*/
/* Derived constants and error checks. */ /* Derived constants and error checks. */
/*===========================================================================*/ /*===========================================================================*/
#if !STM32_SRAM_USE_FSMC_SRAM1 && !STM32_SRAM_USE_FSMC_SRAM2 && \
!STM32_SRAM_USE_FSMC_SRAM3 && !STM32_SRAM_USE_FSMC_SRAM4
#error "SRAM driver activated but no SRAM peripheral assigned"
#endif
#if (STM32_SRAM_USE_FSMC_SRAM1 || STM32_SRAM_USE_FSMC_SRAM2 || \
STM32_SRAM_USE_FSMC_SRAM3 || STM32_SRAM_USE_FSMC_SRAM4) && !STM32_HAS_FSMC
#error "FSMC not present in the selected device"
#endif
/*===========================================================================*/ /*===========================================================================*/
/* Driver data structures and types. */ /* Driver data structures and types. */
/*===========================================================================*/ /*===========================================================================*/
/**
* @brief Driver state machine possible states.
*/
typedef enum {
SRAM_UNINIT = 0, /**< Not initialized. */
SRAM_STOP = 1, /**< Stopped. */
SRAM_READY = 2, /**< Ready. */
} sramstate_t;
/**
* @brief Type of a structure representing an NAND driver.
*/
typedef struct SRAMDriver SRAMDriver;
/**
* @brief Driver configuration structure.
* @note It could be empty on some architectures.
* @note Some bits in BCR register will be forced by driver.
*/
typedef struct {
uint32_t bcr;
uint32_t btr;
uint32_t bwtr;
} SRAMConfig;
/**
* @brief Structure representing an NAND driver.
*/
struct SRAMDriver {
/**
* @brief Driver state.
*/
sramstate_t state;
/**
* @brief Pointer to the FSMC SRAM registers block.
*/
FSMC_SRAM_NOR_TypeDef *sram;
};
/*===========================================================================*/ /*===========================================================================*/
/* Driver macros. */ /* Driver macros. */
@ -139,33 +59,32 @@ struct SRAMDriver {
/* External declarations. */ /* External declarations. */
/*===========================================================================*/ /*===========================================================================*/
#if STM32_SRAM_USE_FSMC_SRAM1 && !defined(__DOXYGEN__) #if STM32_FSMC_USE_SRAM1 && !defined(__DOXYGEN__)
extern SRAMDriver SRAMD1; extern SRAMDriver SRAMD1;
#endif #endif
#if STM32_SRAM_USE_FSMC_SRAM2 && !defined(__DOXYGEN__) #if STM32_FSMC_USE_SRAM2 && !defined(__DOXYGEN__)
extern SRAMDriver SRAMD2; extern SRAMDriver SRAMD2;
#endif #endif
#if STM32_SRAM_USE_FSMC_SRAM3 && !defined(__DOXYGEN__) #if STM32_FSMC_USE_SRAM3 && !defined(__DOXYGEN__)
extern SRAMDriver SRAMD3; extern SRAMDriver SRAMD3;
#endif #endif
#if STM32_SRAM_USE_FSMC_SRAM4 && !defined(__DOXYGEN__) #if STM32_FSMC_USE_SRAM4 && !defined(__DOXYGEN__)
extern SRAMDriver SRAMD4; extern SRAMDriver SRAMD4;
#endif #endif
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
void fsmcSramInit(void); void lld_sram_start(SRAMDriver *sramp, const SRAMConfig *cfgp);
void fsmcSramStart(SRAMDriver *sramp, const SRAMConfig *cfgp); void lld_sram_stop(SRAMDriver *sramp);
void fsmcSramStop(SRAMDriver *sramp);
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
#endif /* STM32_USE_FSMC_SRAM */ #endif /* STM32_FSMC_USE_SRAM */
#endif /* HAL_FSMC_SRAM_H_ */ #endif /* HAL_FSMC_SRAM_H_ */

79
os/hal/src/hal_fsmc.c
View File

@ -62,8 +62,6 @@ FSMCDriver FSMCD1;
/* Driver exported functions. */ /* Driver exported functions. */
/*===========================================================================*/ /*===========================================================================*/
#include "hal_fsmc_sdram_lld.h"
/** /**
* @brief Low level FSMC driver initialization. * @brief Low level FSMC driver initialization.
* *
@ -191,7 +189,9 @@ CH_IRQ_HANDLER(STM32_FSMC_HANDLER) {
CH_IRQ_EPILOGUE(); CH_IRQ_EPILOGUE();
} }
#if (HAL_USE_FSMC_SDRAM == TRUE)
#include "hal_fsmc_sdram_lld.h"
/** /**
* @brief FSMC SDRAM Driver init * @brief FSMC SDRAM Driver init
*/ */
@ -238,6 +238,81 @@ void fsmcSdramStop(SDRAMDriver *sdramp) {
sdramp->state = SDRAM_STOP; sdramp->state = SDRAM_STOP;
} }
} }
#endif /* HAL_USE_FSMC_SDRAM == TRUE */
#if (HAL_USE_FSMC_SRAM == TRUE)
#include "hal_fsmc_sram_lld.h"
/**
* @brief Low level SRAM driver initialization.
*
* @notapi
*/
void fsmcSramInit(void) {
fsmcInit();
#if STM32_FSMC_USE_SRAM1
SRAMD1.sram = FSMCD1.sram1;
SRAMD1.state = SRAM_STOP;
#endif /* STM32_FSMC_USE_SRAM1 */
#if STM32_FSMC_USE_SRAM2
SRAMD2.sram = FSMCD1.sram2;
SRAMD2.state = SRAM_STOP;
#endif /* STM32_FSMC_USE_SRAM2 */
#if STM32_FSMC_USE_SRAM3
SRAMD3.sram = FSMCD1.sram3;
SRAMD3.state = SRAM_STOP;
#endif /* STM32_FSMC_USE_SRAM3 */
#if STM32_FSMC_USE_SRAM4
SRAMD4.sram = FSMCD1.sram4;
SRAMD4.state = SRAM_STOP;
#endif /* STM32_FSMC_USE_SRAM4 */
}
/**
* @brief Configures and activates the SRAM peripheral.
*
* @param[in] sramp pointer to the @p SRAMDriver object
* @param[in] cfgp pointer to the @p SRAMConfig object
*
* @notapi
*/
void fsmcSramStart(SRAMDriver *sramp, const SRAMConfig *cfgp) {
if (FSMCD1.state == FSMC_STOP)
fsmcStart(&FSMCD1);
osalDbgAssert((sramp->state == SRAM_STOP) || (sramp->state == SRAM_READY),
"invalid state");
if (sramp->state == SRAM_STOP) {
lld_sram_start(sramp, cfgp);
sramp->state = SRAM_READY;
}
}
/**
* @brief Deactivates the SRAM peripheral.
*
* @param[in] sramp pointer to the @p SRAMDriver object
*
* @notapi
*/
void fsmcSramStop(SRAMDriver *sramp) {
if (sramp->state == SRAM_READY) {
lld_sram_stop(sramp);
sramp->state = SRAM_STOP;
}
}
#endif /* HAL_USE_FSMC_SRAM == TRUE */
#endif /* HAL_USE_FSMC */ #endif /* HAL_USE_FSMC */

7
testhal/STM32/STM32F4xx/FSMC_SDRAM/halconf_community.h
View File

@ -45,13 +45,6 @@
#define HAL_USE_FSMC_NAND FALSE #define HAL_USE_FSMC_NAND FALSE
#endif #endif
/**
* @brief Enables the NAND subsystem.
*/
#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__)
#define HAL_USE_NAND FALSE
#endif
/** /**
* @brief Enables the 1-wire subsystem. * @brief Enables the 1-wire subsystem.
*/ */

17
testhal/STM32/STM32F4xx/FSMC_SRAM/halconf_community.h
View File

@ -27,15 +27,22 @@
/** /**
* @brief Enables the FSMC subsystem. * @brief Enables the FSMC subsystem.
*/ */
#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__) #if !defined(HAL_USE_FSMC_SDRAM) || defined(__DOXYGEN__)
#define HAL_USE_FSMC TRUE #define HAL_USE_FSMC_SDRAM FALSE
#endif #endif
/** /**
* @brief Enables the NAND subsystem. * @brief Enables the FSMC subsystem.
*/ */
#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__) #if !defined(HAL_USE_FSMC_SRAM) || defined(__DOXYGEN__)
#define HAL_USE_NAND FALSE #define HAL_USE_FSMC_SRAM TRUE
#endif
/**
* @brief Enables the FSMC subsystem.
*/
#if !defined(HAL_USE_FSMC_NAND) || defined(__DOXYGEN__)
#define HAL_USE_FSMC_NAND FALSE
#endif #endif
/** /**

1
testhal/STM32/STM32F4xx/FSMC_SRAM/main.c
View File

@ -17,7 +17,6 @@
#include "ch.h" #include "ch.h"
#include "hal.h" #include "hal.h"
#include "hal_fsmc_sram.h"
#include "membench.h" #include "membench.h"
#include "memtest.h" #include "memtest.h"

26
testhal/STM32/STM32F4xx/FSMC_SRAM/mcuconf_community.h
View File

@ -22,32 +22,30 @@
#define STM32_FSMC_USE_FSMC1 TRUE #define STM32_FSMC_USE_FSMC1 TRUE
#define STM32_FSMC_FSMC1_IRQ_PRIORITY 10 #define STM32_FSMC_FSMC1_IRQ_PRIORITY 10
#define STM32_FSMC_DMA_CHN 0x03010201 #define STM32_FSMC_DMA_CHN 0x03010201
#define STM32_FSMC_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
#define STM32_FSMC_DMA_PRIORITY 0
#define STM32_FSMC_DMA_ERROR_HOOK(nandp) osalSysHalt("FSMC DMA failure")
/* /*
* FSMC NAND driver system settings. * FSMC NAND driver system settings.
*/ */
#define STM32_NAND_USE_FSMC_NAND1 FALSE #define STM32_FSMC_USE_NAND1 FALSE
#define STM32_NAND_USE_FSMC_NAND2 FALSE #define STM32_FSMC_USE_NAND2 FALSE
#define STM32_NAND_USE_EXT_INT FALSE #define STM32_FSMC_USE_NAND_EXT_INT FALSE
#define STM32_NAND_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
#define STM32_NAND_DMA_PRIORITY 0
#define STM32_NAND_DMA_ERROR_HOOK(nandp) osalSysHalt("DMA failure")
/* /*
* FSMC SRAM driver system settings. * FSMC SRAM driver system settings.
*/ */
#define STM32_USE_FSMC_SRAM TRUE #define STM32_FSMC_USE_SRAM1 FALSE
#define STM32_SRAM_USE_FSMC_SRAM1 FALSE #define STM32_FSMC_USE_SRAM2 FALSE
#define STM32_SRAM_USE_FSMC_SRAM2 FALSE #define STM32_FSMC_USE_SRAM3 FALSE
#define STM32_SRAM_USE_FSMC_SRAM3 FALSE #define STM32_FSMC_USE_SRAM4 TRUE
#define STM32_SRAM_USE_FSMC_SRAM4 TRUE
/* /*
* FSMC SDRAM driver system settings. * FSMC SDRAM driver system settings.
*/ */
#define STM32_USE_FSMC_SDRAM FALSE #define STM32_FSMC_USE_SDRAM1 FALSE
#define STM32_SDRAM_USE_FSMC_SDRAM1 FALSE #define STM32_FSMC_USE_SDRAM2 FALSE
#define STM32_SDRAM_USE_FSMC_SDRAM2 TRUE
/* /*
* TIMCAP driver system settings. * TIMCAP driver system settings.