hal: stm32: Keep track of latest STM32 RCC API
RCC API changed in 01/2018 so apply the changes.
Note that ae7a4d40b8
partially fixed the changes in QEI module but some were missing.
So update the other modules too.
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aa8c6cc4af
commit
918149d48d
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@ -1057,75 +1057,75 @@ void eicu_lld_stop(EICUDriver *eicup) {
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if (&EICUD1 == eicup) {
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nvicDisableVector(STM32_TIM1_UP_NUMBER);
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nvicDisableVector(STM32_TIM1_CC_NUMBER);
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rccDisableTIM1(FALSE);
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rccDisableTIM1();
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}
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#endif
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#if STM32_EICU_USE_TIM2
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if (&EICUD2 == eicup) {
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nvicDisableVector(STM32_TIM2_NUMBER);
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rccDisableTIM2(FALSE);
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rccDisableTIM2();
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}
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#endif
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#if STM32_EICU_USE_TIM3
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if (&EICUD3 == eicup) {
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nvicDisableVector(STM32_TIM3_NUMBER);
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rccDisableTIM3(FALSE);
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rccDisableTIM3();
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}
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#endif
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#if STM32_EICU_USE_TIM4
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if (&EICUD4 == eicup) {
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nvicDisableVector(STM32_TIM4_NUMBER);
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rccDisableTIM4(FALSE);
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rccDisableTIM4();
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}
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#endif
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#if STM32_EICU_USE_TIM5
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if (&EICUD5 == eicup) {
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nvicDisableVector(STM32_TIM5_NUMBER);
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rccDisableTIM5(FALSE);
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rccDisableTIM5();
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}
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#endif
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#if STM32_EICU_USE_TIM8
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if (&EICUD8 == eicup) {
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nvicDisableVector(STM32_TIM8_UP_NUMBER);
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nvicDisableVector(STM32_TIM8_CC_NUMBER);
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rccDisableTIM8(FALSE);
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rccDisableTIM8();
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}
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#endif
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#if STM32_EICU_USE_TIM9
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if (&EICUD9 == eicup) {
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nvicDisableVector(STM32_TIM9_NUMBER);
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rccDisableTIM9(FALSE);
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rccDisableTIM9();
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}
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#endif
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#if STM32_EICU_USE_TIM12
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if (&EICUD12 == eicup) {
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nvicDisableVector(STM32_TIM12_NUMBER);
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rccDisableTIM12(FALSE);
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rccDisableTIM12();
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}
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#endif
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}
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#if STM32_EICU_USE_TIM10
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if (&EICUD10 == eicup) {
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nvicDisableVector(STM32_TIM10_NUMBER);
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rccDisableTIM10(FALSE);
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rccDisableTIM10();
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}
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#endif
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#if STM32_EICU_USE_TIM11
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if (&EICUD11 == eicup) {
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nvicDisableVector(STM32_TIM11_NUMBER);
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rccDisableTIM11(FALSE);
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rccDisableTIM11();
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}
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#endif
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#if STM32_EICU_USE_TIM13
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if (&EICUD13 == eicup) {
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nvicDisableVector(STM32_TIM13_NUMBER);
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rccDisableTIM13(FALSE);
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rccDisableTIM13();
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}
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#endif
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#if STM32_EICU_USE_TIM14
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if (&EICUD14 == eicup) {
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nvicDisableVector(STM32_TIM14_NUMBER);
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rccDisableTIM14(FALSE);
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rccDisableTIM14();
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}
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#endif
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}
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@ -157,38 +157,38 @@ void qei_lld_start(QEIDriver *qeip) {
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/* Clock activation and timer reset.*/
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#if STM32_QEI_USE_TIM1
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if (&QEID1 == qeip) {
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rccEnableTIM1();
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rccEnableTIM1(FALSE);
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rccResetTIM1();
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}
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#endif
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#if STM32_QEI_USE_TIM2
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if (&QEID2 == qeip) {
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rccEnableTIM2();
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rccEnableTIM2(FALSE);
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rccResetTIM2();
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}
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#endif
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#if STM32_QEI_USE_TIM3
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if (&QEID3 == qeip) {
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rccEnableTIM3();
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rccEnableTIM3(FALSE);
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rccResetTIM3();
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}
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#endif
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#if STM32_QEI_USE_TIM4
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if (&QEID4 == qeip) {
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rccEnableTIM4();
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rccEnableTIM4(FALSE);
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rccResetTIM4();
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}
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#endif
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#if STM32_QEI_USE_TIM5
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if (&QEID5 == qeip) {
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rccEnableTIM5();
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rccEnableTIM5(FALSE);
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rccResetTIM5();
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}
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#endif
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#if STM32_QEI_USE_TIM8
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if (&QEID8 == qeip) {
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rccEnableTIM8();
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rccEnableTIM8(FALSE);
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rccResetTIM8();
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}
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#endif
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@ -713,44 +713,44 @@ void timcap_lld_stop(TIMCAPDriver *timcapp) {
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if (&TIMCAPD1 == timcapp) {
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nvicDisableVector(STM32_TIM1_UP_NUMBER);
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nvicDisableVector(STM32_TIM1_CC_NUMBER);
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rccDisableTIM1(FALSE);
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rccDisableTIM1();
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}
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#endif
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#if STM32_TIMCAP_USE_TIM2
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if (&TIMCAPD2 == timcapp) {
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nvicDisableVector(STM32_TIM2_NUMBER);
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rccDisableTIM2(FALSE);
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rccDisableTIM2();
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}
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#endif
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#if STM32_TIMCAP_USE_TIM3
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if (&TIMCAPD3 == timcapp) {
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nvicDisableVector(STM32_TIM3_NUMBER);
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rccDisableTIM3(FALSE);
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rccDisableTIM3();
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}
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#endif
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#if STM32_TIMCAP_USE_TIM4
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if (&TIMCAPD4 == timcapp) {
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nvicDisableVector(STM32_TIM4_NUMBER);
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rccDisableTIM4(FALSE);
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rccDisableTIM4();
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}
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#endif
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#if STM32_TIMCAP_USE_TIM5
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if (&TIMCAPD5 == timcapp) {
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nvicDisableVector(STM32_TIM5_NUMBER);
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rccDisableTIM5(FALSE);
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rccDisableTIM5();
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}
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#endif
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#if STM32_TIMCAP_USE_TIM8
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if (&TIMCAPD8 == timcapp) {
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nvicDisableVector(STM32_TIM8_UP_NUMBER);
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nvicDisableVector(STM32_TIM8_CC_NUMBER);
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rccDisableTIM8(FALSE);
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rccDisableTIM8();
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}
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#endif
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#if STM32_TIMCAP_USE_TIM9
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if (&TIMCAPD9 == timcapp) {
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nvicDisableVector(STM32_TIM9_NUMBER);
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rccDisableTIM9(FALSE);
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rccDisableTIM9();
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}
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#endif
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}
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