sn32: fix spi on 260

This commit is contained in:
Dimitris Mantzouranis 2022-02-04 22:59:47 +02:00
parent 98a487a74d
commit 9b0191220f
2 changed files with 13 additions and 4 deletions

View File

@ -169,9 +169,13 @@ Base Address: 0x4001 C000 (SPI0)
#define __SPI1_SET_SEL0 (SN_GPIO2->DATA_b.DATA10 = 1)
//SPI Data Fetch speed (High: SCK>6MHz)
#if defined(SN32F260)
#define __SPI0_DATA_FETCH_HIGH_SPEED (SN_SPI0->DF = SPI_DF_EN)
#define __SPI1_DATA_FETCH_HIGH_SPEED (SN_SPI1->DF = SPI_DF_EN)
#else
#define __SPI0_DATA_FETCH_HIGH_SPEED (SN_SPI0->DFDLY = SPI_DF_EN)
#define __SPI1_DATA_FETCH_HIGH_SPEED (SN_SPI1->DFDLY = SPI_DF_EN)
#endif
/*_____ D E C L A R A T I O N S ____________________________________________*/
extern void SPI0_Init(void);

View File

@ -96,9 +96,11 @@ void SPI0_Init() {
*****************************************************************************/
void SPI0_Enable() {
sys1EnableSPI0();
#if defined(SN32F260)
SN_SPI0->CTRL0_b.SSPEN = SPI_SPIEN_EN;
#else
SN_SPI0->CTRL0_b.SPIEN = SPI_SPIEN_EN;
#endif
__SPI0_FIFO_RESET;
}
@ -111,8 +113,11 @@ void SPI0_Enable() {
* Note : None
*****************************************************************************/
void SPI0_Disable() {
#if defined(SN32F260)
SN_SPI0->CTRL0_b.SSPEN = SPI_SPIEN_DIS;
#else
SN_SPI0->CTRL0_b.SPIEN = SPI_SPIEN_DIS;
#endif
//Disable HCLK for SSP0
sys1DisableSPI0();
}