commit
a4d41047d5
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@ -19,6 +19,7 @@ HALSRC += ${CHIBIOS_CONTRIB}/os/hal/src/hal_community.c \
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${CHIBIOS_CONTRIB}/os/hal/src/hal_timcap.c \
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${CHIBIOS_CONTRIB}/os/hal/src/hal_timcap.c \
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${CHIBIOS_CONTRIB}/os/hal/src/hal_qei.c \
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${CHIBIOS_CONTRIB}/os/hal/src/hal_qei.c \
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${CHIBIOS_CONTRIB}/os/hal/src/hal_usb_hid.c \
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${CHIBIOS_CONTRIB}/os/hal/src/hal_usb_hid.c \
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${CHIBIOS_CONTRIB}/os/hal/src/hal_usb_msd.c
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${CHIBIOS_CONTRIB}/os/hal/src/hal_usb_msd.c \
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${CHIBIOS_CONTRIB}/os/hal/src/hal_comp.c
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HALINC += ${CHIBIOS_CONTRIB}/os/hal/include
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HALINC += ${CHIBIOS_CONTRIB}/os/hal/include
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@ -71,6 +71,10 @@
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#define HAL_USE_USB_MSD FALSE
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#define HAL_USE_USB_MSD FALSE
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#endif
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#endif
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#if !defined(HAL_USE_COMP)
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#define HAL_USE_COMP FALSE
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#endif
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/* Abstract interfaces.*/
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/* Abstract interfaces.*/
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/* Shared headers.*/
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/* Shared headers.*/
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@ -82,6 +86,7 @@
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#include "hal_usbh.h"
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#include "hal_usbh.h"
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#include "hal_timcap.h"
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#include "hal_timcap.h"
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#include "hal_qei.h"
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#include "hal_qei.h"
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#include "hal_comp.h"
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/* Complex drivers.*/
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/* Complex drivers.*/
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#include "hal_onewire.h"
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#include "hal_onewire.h"
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@ -0,0 +1,131 @@
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/*
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ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio
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Copyright (C) 2017 Fabien Poussin (fabien.poussin (at) google's mail)
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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#ifndef HAL_COMP_H_
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#define HAL_COMP_H_
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#include "hal.h"
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#if (HAL_USE_COMP == TRUE) || defined(__DOXYGEN__)
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/*===========================================================================*/
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/* Driver constants. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver pre-compile time settings. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Derived constants and error checks. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver data structures and types. */
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/*===========================================================================*/
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/**
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* @brief Driver state machine possible states.
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*/
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typedef enum {
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COMP_UNINIT = 0, /**< Not initialized. */
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COMP_STOP = 1, /**< Stopped. */
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COMP_READY = 2, /**< Ready. */
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COMP_ACTIVE = 3, /**< Active cycle phase. */
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} compstate_t;
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/**
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* @brief Type of a structure representing an COMP driver.
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*/
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typedef struct COMPDriver COMPDriver;
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/**
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* @brief COMP notification callback type.
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*
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* @param[in] comp pointer to a @p COMPDriver object
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*/
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typedef void (*compcallback_t)(COMPDriver *comp);
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#include "hal_comp_lld.h"
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/*===========================================================================*/
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/* Driver macros. */
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/*===========================================================================*/
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/**
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* @name Macro Functions
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* @{
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*/
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/**
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* @brief Enables the input capture.
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*
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* @param[in] comp pointer to the @p COMPDriver object
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*
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* @iclass
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*/
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#define compEnableI(comp) comp_lld_enable(comp)
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/**
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* @brief Disables the input capture.
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*
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* @param[in] comp pointer to the @p COMPDriver object
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*
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* @iclass
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*/
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#define compDisableI(comp) comp_lld_disable(comp)
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/** @} */
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/**
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* @name Low Level driver helper macros
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* @{
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*/
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/**
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* @brief Common ISR code, main event.
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*
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* @param[in] comp pointer to the @p COMPDriver object
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*
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* @notapi
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*/
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#define _comp_isr_invoke_cb(comp) { \
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(comp)->config->cb(comp); \
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}
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/** @} */
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/*===========================================================================*/
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/* External declarations. */
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/*===========================================================================*/
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#ifdef __cplusplus
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extern "C" {
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#endif
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void compInit(void);
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void compObjectInit(COMPDriver *comp);
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void compStart(COMPDriver *comp, const COMPConfig *config);
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void compStop(COMPDriver *comp);
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void compEnable(COMPDriver *comp);
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void compDisable(COMPDriver *comp);
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#ifdef __cplusplus
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}
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#endif
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#endif /* HAL_USE_COMP */
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#endif /* HAL_COMP_H_ */
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@ -0,0 +1,520 @@
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/*
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ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio
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Copyright (C) 2017 Fabien Poussin (fabien.poussin (at) google's mail)
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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*/
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/**
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* @file STM32/hal_comp_lld.c
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* @brief STM32 Comp subsystem low level driver header.
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*
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* @addtogroup COMP
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* @{
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*/
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#include "hal.h"
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#if HAL_USE_COMP || defined(__DOXYGEN__)
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#include "hal_comp.h"
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/*===========================================================================*/
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/* Driver local definitions. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver exported variables. */
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/*===========================================================================*/
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/**
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* @brief COMPD1 driver identifier.
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* @note The driver COMPD1 allocates the comparator COMP1 when enabled.
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*/
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#if STM32_COMP_USE_COMP1 || defined(__DOXYGEN__)
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COMPDriver COMPD1;
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#endif
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/**
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* @brief COMPD2 driver identifier.
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* @note The driver COMPD2 allocates the comparator COMP2 when enabled.
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*/
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#if STM32_COMP_USE_COMP2 || defined(__DOXYGEN__)
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COMPDriver COMPD2;
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#endif
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/**
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* @brief COMPD3 driver identifier.
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* @note The driver COMPD3 allocates the comparator COMP3 when enabled.
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*/
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#if STM32_COMP_USE_COMP3 || defined(__DOXYGEN__)
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COMPDriver COMPD3;
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#endif
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/**
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* @brief COMPD4 driver identifier.
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* @note The driver COMPD4 allocates the comparator COMP4 when enabled.
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*/
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#if STM32_COMP_USE_COMP4 || defined(__DOXYGEN__)
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COMPDriver COMPD4;
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#endif
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/**
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* @brief COMPD5 driver identifier.
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* @note The driver COMPD5 allocates the comparator COMP5 when enabled.
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*/
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#if STM32_COMP_USE_COMP5 || defined(__DOXYGEN__)
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COMPDriver COMPD5;
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#endif
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/**
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* @brief COMPD6 driver identifier.
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* @note The driver COMPD6 allocates the comparator COMP6 when enabled.
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*/
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#if STM32_COMP_USE_COMP6 || defined(__DOXYGEN__)
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COMPDriver COMPD6;
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#endif
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/**
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* @brief COMPD7 driver identifier.
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* @note The driver COMPD7 allocates the comparator COMP7 when enabled.
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*/
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#if STM32_COMP_USE_COMP7 || defined(__DOXYGEN__)
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COMPDriver COMPD7;
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#endif
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/*===========================================================================*/
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/* Driver local variables and types. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver local functions. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver interrupt handlers. */
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/*===========================================================================*/
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/*===========================================================================*/
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/* Driver exported functions. */
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/*===========================================================================*/
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/**
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* @brief Low level COMP driver initialization.
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*
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* @notapi
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*/
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void comp_lld_init(void) {
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#if STM32_COMP_USE_COMP1
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/* Driver initialization.*/
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compObjectInit(&COMPD1);
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COMPD1.reg = COMP;
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COMPD1.reg->CSR = 0;
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#if STM32_COMP_USE_INTERRUPTS
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nvicEnableVector(COMP1_2_3_IRQn, STM32_COMP_1_2_3_IRQ_PRIORITY);
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#endif
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#endif
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#if STM32_COMP_USE_COMP2
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/* Driver initialization.*/
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compObjectInit(&COMPD2);
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COMPD2.reg = COMP2;
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COMPD2.reg->CSR = 0;
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#if STM32_COMP_USE_INTERRUPTS
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nvicEnableVector(COMP1_2_3_IRQn, STM32_COMP_1_2_3_IRQ_PRIORITY);
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#endif
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#endif
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#if STM32_COMP_USE_COMP3
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/* Driver initialization.*/
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compObjectInit(&COMPD3);
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COMPD3.reg = COMP3;
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COMPD3.reg->CSR = 0;
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#if STM32_COMP_USE_INTERRUPTS
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nvicEnableVector(COMP1_2_3_IRQn, STM32_COMP_1_2_3_IRQ_PRIORITY);
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#endif
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#endif
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#if STM32_COMP_USE_COMP4
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/* Driver initialization.*/
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compObjectInit(&COMPD4);
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COMPD4.reg = COMP4;
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COMPD4.reg->CSR = 0;
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#if STM32_COMP_USE_INTERRUPTS
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nvicEnableVector(COMP4_5_6_IRQn, STM32_COMP_1_2_3_IRQ_PRIORITY);
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#endif
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#endif
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#if STM32_COMP_USE_COMP5
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/* Driver initialization.*/
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compObjectInit(&COMPD5);
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COMPD5.reg = COMP5;
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COMPD5.reg->CSR = 0;
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#if STM32_COMP_USE_INTERRUPTS
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nvicEnableVector(COMP4_5_6_IRQn, STM32_COMP_1_2_3_IRQ_PRIORITY);
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#endif
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#endif
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#if STM32_COMP_USE_COMP6
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/* Driver initialization.*/
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compObjectInit(&COMPD6);
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COMPD6.reg = COMP6;
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COMPD6.reg->CSR = 0;
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#if STM32_COMP_USE_INTERRUPTS
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nvicEnableVector(COMP4_5_6_IRQn, STM32_COMP_1_2_3_IRQ_PRIORITY);
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#endif
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#endif
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#if STM32_COMP_USE_COMP7
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/* Driver initialization.*/
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compObjectInit(&COMPD7);
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COMPD7.reg = COMP7;
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COMPD7.reg->CSR = 0;
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#if STM32_COMP_USE_INTERRUPTS
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nvicEnableVector(COMP7_IRQn, STM32_COMP_7_IRQ_PRIORITY);
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#endif
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#endif
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}
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/**
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* @brief COMP1, COMP2, COMP3 interrupt handler.
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*
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* @isr
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*/
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OSAL_IRQ_HANDLER(Vector140) {
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uint32_t pr;
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OSAL_IRQ_PROLOGUE();
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pr = EXTI->PR;
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pr &= EXTI->IMR & ((1U << 21) | (1U << 22) | (1U << 29));
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EXTI->PR = pr;
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#if STM32_COMP_USE_COMP1
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if (pr & (1U << 21) && COMPD1.config->cb != NULL)
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||||||
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COMPD1.config->cb(&COMPD1);
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#endif
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||||||
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#if STM32_COMP_USE_COMP2
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||||||
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if (pr & (1U << 22) && COMPD2.config->cb != NULL)
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COMPD2.config->cb(&COMPD2);
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#endif
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||||||
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#if STM32_COMP_USE_COMP3
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if (pr & (1U << 29) && COMPD3.config->cb != NULL)
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COMPD3.config->cb(&COMPD3);
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#endif
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||||||
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OSAL_IRQ_EPILOGUE();
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|
}
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||||||
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|
||||||
|
/**
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||||||
|
* @brief COMP4, COMP5, COMP6 interrupt handler.
|
||||||
|
*
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||||||
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* @isr
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||||||
|
*/
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|
OSAL_IRQ_HANDLER(Vector144) {
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||||||
|
uint32_t pr;
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||||||
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||||||
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OSAL_IRQ_PROLOGUE();
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||||||
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|
||||||
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pr = EXTI->PR;
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||||||
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pr &= EXTI->IMR & ((1U << 30) | (1U << 31));
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||||||
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EXTI->PR = pr;
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||||||
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#if STM32_COMP_USE_COMP4
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||||||
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if (pr & (1U << 30) && COMPD4.config->cb != NULL)
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||||||
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COMPD4.config->cb(&COMPD4);
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||||||
|
#endif
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||||||
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#if STM32_COMP_USE_COMP5
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||||||
|
if (pr & (1U << 31) && COMPD5.config->cb != NULL)
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||||||
|
COMPD5.config->cb(&COMPD5);
|
||||||
|
#endif
|
||||||
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|
||||||
|
#if STM32_COMP_USE_COMP6
|
||||||
|
pr = EXTI->PR2 & EXTI->IMR2 & (1U << 0);
|
||||||
|
EXTI->PR2 = pr;
|
||||||
|
if (pr & (1U << 0) && COMPD6.config->cb != NULL)
|
||||||
|
COMPD6.config->cb(&COMPD6);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
OSAL_IRQ_EPILOGUE();
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief COMP7 interrupt handler.
|
||||||
|
*
|
||||||
|
* @isr
|
||||||
|
*/
|
||||||
|
OSAL_IRQ_HANDLER(Vector148) {
|
||||||
|
uint32_t pr2;
|
||||||
|
|
||||||
|
OSAL_IRQ_PROLOGUE();
|
||||||
|
|
||||||
|
pr2 = EXTI->PR2;
|
||||||
|
pr2 = EXTI->IMR & (1U << 1);
|
||||||
|
EXTI->PR2 = pr2;
|
||||||
|
#if STM32_COMP_USE_COMP7
|
||||||
|
if (pr2 & (1U << 1) && COMPD7.config->cb != NULL)
|
||||||
|
COMPD7.config->cb(&COMPD7);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
OSAL_IRQ_EPILOGUE();
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Configures and activates an EXT channel (used by comp)
|
||||||
|
*
|
||||||
|
* @param[in] compp pointer to the @p COMPDriver object
|
||||||
|
* @param[in] channel EXT channel
|
||||||
|
*
|
||||||
|
* @notapi
|
||||||
|
*/
|
||||||
|
void comp_ext_lld_channel_enable(COMPDriver *compp, uint32_t channel) {
|
||||||
|
uint32_t cmask = (1 << (channel & 0x1F));
|
||||||
|
|
||||||
|
/* Don't touch other channels */
|
||||||
|
if (channel < 21 || channel > 33) {
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
#if STM32_EXTI_NUM_LINES > 32
|
||||||
|
if (channel < 32) {
|
||||||
|
#endif
|
||||||
|
/* Masked out lines must not be touched by this driver.*/
|
||||||
|
if ((cmask & STM32_EXTI_IMR_MASK) != 0U) {
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Programming edge registers.*/
|
||||||
|
if (compp->config->irq_mode == COMP_IRQ_RISING || compp->config->irq_mode == COMP_IRQ_BOTH)
|
||||||
|
EXTI->RTSR |= cmask;
|
||||||
|
else
|
||||||
|
EXTI->RTSR &= ~cmask;
|
||||||
|
if (compp->config->irq_mode == COMP_IRQ_FALLING || compp->config->irq_mode == COMP_IRQ_BOTH)
|
||||||
|
EXTI->FTSR |= cmask;
|
||||||
|
else
|
||||||
|
EXTI->FTSR &= ~cmask;
|
||||||
|
|
||||||
|
/* Programming interrupt and event registers.*/
|
||||||
|
EXTI->IMR |= cmask;
|
||||||
|
EXTI->EMR &= ~cmask;
|
||||||
|
|
||||||
|
#if STM32_EXTI_NUM_LINES > 32
|
||||||
|
}
|
||||||
|
else {
|
||||||
|
/* Masked out lines must not be touched by this driver.*/
|
||||||
|
if ((cmask & STM32_EXTI_IMR2_MASK) != 0U) {
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Programming edge registers.*/
|
||||||
|
if (compp->config->irq_mode == COMP_IRQ_RISING || compp->config->irq_mode == COMP_IRQ_BOTH)
|
||||||
|
EXTI->RTSR2 |= cmask;
|
||||||
|
else
|
||||||
|
EXTI->RTSR2 &= ~cmask;
|
||||||
|
if (compp->config->irq_mode == COMP_IRQ_FALLING || compp->config->irq_mode == COMP_IRQ_BOTH)
|
||||||
|
EXTI->FTSR2 |= cmask;
|
||||||
|
else
|
||||||
|
EXTI->FTSR2 &= ~cmask;
|
||||||
|
|
||||||
|
/* Programming interrupt and event registers.*/
|
||||||
|
EXTI->IMR2 |= cmask;
|
||||||
|
EXTI->EMR2 &= ~cmask;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Deactivate an EXT channel (used by comp)
|
||||||
|
*
|
||||||
|
* @param[in] compp pointer to the @p COMPDriver object
|
||||||
|
* @param[in] channel EXT channel
|
||||||
|
*
|
||||||
|
* @notapi
|
||||||
|
*/
|
||||||
|
void comp_ext_lld_channel_disable(COMPDriver *compp, uint32_t channel) {
|
||||||
|
|
||||||
|
(void) compp;
|
||||||
|
uint32_t cmask = (1 << (channel & 0x1F));
|
||||||
|
|
||||||
|
#if STM32_EXTI_NUM_LINES > 32
|
||||||
|
if (channel < 32) {
|
||||||
|
#endif
|
||||||
|
EXTI->IMR &= ~cmask;
|
||||||
|
EXTI->EMR &= ~cmask;
|
||||||
|
EXTI->RTSR &= ~cmask;
|
||||||
|
EXTI->FTSR &= ~cmask;
|
||||||
|
EXTI->PR = cmask;
|
||||||
|
#if STM32_EXTI_NUM_LINES > 32
|
||||||
|
}
|
||||||
|
else {
|
||||||
|
EXTI->IMR2 &= ~cmask;
|
||||||
|
EXTI->EMR2 &= ~cmask;
|
||||||
|
EXTI->RTSR2 &= ~cmask;
|
||||||
|
EXTI->FTSR2 &= ~cmask;
|
||||||
|
EXTI->PR2 = cmask;
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Configures and activates the COMP peripheral.
|
||||||
|
*
|
||||||
|
* @param[in] compp pointer to the @p COMPDriver object
|
||||||
|
*
|
||||||
|
* @notapi
|
||||||
|
*/
|
||||||
|
void comp_lld_start(COMPDriver *compp) {
|
||||||
|
|
||||||
|
// Apply CSR Execpt the enable bit.
|
||||||
|
compp->reg->CSR = compp->config->csr & ~COMP_CSR_COMPxEN;
|
||||||
|
|
||||||
|
// Inverted output
|
||||||
|
if (compp->config->output_mode == COMP_OUTPUT_INVERTED)
|
||||||
|
compp->reg->CSR |= COMP_CSR_COMPxPOL;
|
||||||
|
|
||||||
|
#if STM32_COMP_USE_INTERRUPTS
|
||||||
|
#if STM32_COMP_USE_COMP1
|
||||||
|
if (compp == &COMPD1) {
|
||||||
|
comp_ext_lld_channel_enable(compp, 21);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if STM32_COMP_USE_COMP2
|
||||||
|
if (compp == &COMPD2) {
|
||||||
|
comp_ext_lld_channel_enable(compp, 22);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if STM32_COMP_USE_COMP3
|
||||||
|
if (compp == &COMPD3) {
|
||||||
|
comp_ext_lld_channel_enable(compp, 29);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if STM32_COMP_USE_COMP4
|
||||||
|
if (compp == &COMPD4) {
|
||||||
|
comp_ext_lld_channel_enable(compp, 30);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if STM32_COMP_USE_COMP5
|
||||||
|
if (compp == &COMPD5) {
|
||||||
|
comp_ext_lld_channel_enable(compp, 31);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if STM32_COMP_USE_COMP6
|
||||||
|
if (compp == &COMPD6) {
|
||||||
|
comp_ext_lld_channel_enable(compp, 32);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if STM32_COMP_USE_COMP7
|
||||||
|
if (compp == &COMPD7) {
|
||||||
|
comp_ext_lld_channel_enable(compp, 33);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
#endif
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Deactivates the comp peripheral.
|
||||||
|
*
|
||||||
|
* @param[in] compp pointer to the @p COMPDriver object
|
||||||
|
*
|
||||||
|
* @notapi
|
||||||
|
*/
|
||||||
|
void comp_lld_stop(COMPDriver *compp) {
|
||||||
|
|
||||||
|
if (compp->state == COMP_READY) {
|
||||||
|
|
||||||
|
compp->reg->CSR = 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
#if STM32_COMP_USE_INTERRUPTS
|
||||||
|
#if STM32_COMP_USE_COMP1
|
||||||
|
if (compp == &COMPD1) {
|
||||||
|
comp_ext_lld_channel_disable(compp, 21);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if STM32_COMP_USE_COMP2
|
||||||
|
if (compp == &COMPD2) {
|
||||||
|
comp_ext_lld_channel_disable(compp, 22);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if STM32_COMP_USE_COMP3
|
||||||
|
if (compp == &COMPD3) {
|
||||||
|
comp_ext_lld_channel_disable(compp, 29);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if STM32_COMP_USE_COMP4
|
||||||
|
if (compp == &COMPD4) {
|
||||||
|
comp_ext_lld_channel_disable(compp, 30);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if STM32_COMP_USE_COMP5
|
||||||
|
if (compp == &COMPD5) {
|
||||||
|
comp_ext_lld_channel_disable(compp, 31);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if STM32_COMP_USE_COMP6
|
||||||
|
if (compp == &COMPD6) {
|
||||||
|
comp_ext_lld_channel_disable(compp, 32);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if STM32_COMP_USE_COMP7
|
||||||
|
if (compp == &COMPD7) {
|
||||||
|
comp_ext_lld_channel_disable(compp, 33);
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
#endif
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the output.
|
||||||
|
*
|
||||||
|
* @param[in] compp pointer to the @p COMPDriver object
|
||||||
|
*
|
||||||
|
* @notapi
|
||||||
|
*/
|
||||||
|
void comp_lld_enable(COMPDriver *compp) {
|
||||||
|
|
||||||
|
compp->reg->CSR |= COMP_CSR_COMPxEN; /* Enable */
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Disables the output.
|
||||||
|
*
|
||||||
|
* @param[in] compp pointer to the @p COMPDriver object
|
||||||
|
*
|
||||||
|
* @notapi
|
||||||
|
*/
|
||||||
|
void comp_lld_disable(COMPDriver *compp) {
|
||||||
|
|
||||||
|
compp->reg->CSR &= ~COMP_CSR_COMPxEN; /* Disable */
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif /* HAL_USE_COMP */
|
||||||
|
|
||||||
|
/** @} */
|
|
@ -0,0 +1,482 @@
|
||||||
|
/*
|
||||||
|
ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio
|
||||||
|
Copyright (C) 2017 Fabien Poussin (fabien.poussin (at) google's mail)
|
||||||
|
|
||||||
|
Licensed under the Apache License, Version 2.0 (the "License");
|
||||||
|
you may not use this file except in compliance with the License.
|
||||||
|
You may obtain a copy of the License at
|
||||||
|
|
||||||
|
http://www.apache.org/licenses/LICENSE-2.0
|
||||||
|
|
||||||
|
Unless required by applicable law or agreed to in writing, software
|
||||||
|
distributed under the License is distributed on an "AS IS" BASIS,
|
||||||
|
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||||
|
See the License for the specific language governing permissions and
|
||||||
|
limitations under the License.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @file STM32/comp_lld.h
|
||||||
|
* @brief STM32 Comparator subsystem low level driver header.
|
||||||
|
*
|
||||||
|
* @addtogroup COMP
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef HAL_COMP_LLD_H_
|
||||||
|
#define HAL_COMP_LLD_H_
|
||||||
|
|
||||||
|
#include "hal.h"
|
||||||
|
|
||||||
|
#if HAL_USE_COMP || defined(__DOXYGEN__)
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/* Driver constants. */
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
|
||||||
|
#define STM32_COMP_InvertingInput_1_4VREFINT ((uint32_t)0x00000000) /*!< 1/4 VREFINT connected to comparator inverting input */
|
||||||
|
#define STM32_COMP_InvertingInput_1_2VREFINT COMP_CSR_COMPxINSEL_0 /*!< 1/2 VREFINT connected to comparator inverting input */
|
||||||
|
#define STM32_COMP_InvertingInput_3_4VREFINT COMP_CSR_COMPxINSEL_1 /*!< 3/4 VREFINT connected to comparator inverting input */
|
||||||
|
#define STM32_COMP_InvertingInput_VREFINT ((uint32_t)0x00000030) /*!< VREFINT connected to comparator inverting input */
|
||||||
|
#define STM32_COMP_InvertingInput_DAC1OUT1 COMP_CSR_COMPxINSEL_2 /*!< DAC1_OUT1 (PA4) connected to comparator inverting input */
|
||||||
|
#define STM32_COMP_InvertingInput_DAC1OUT2 ((uint32_t)0x00000050) /*!< DAC1_OUT2 (PA5) connected to comparator inverting input */
|
||||||
|
|
||||||
|
#define STM32_COMP_InvertingInput_IO1 ((uint32_t)0x00000060) /*!< I/O1 (PA0 for COMP1, PA2 for COMP2, PD15 for COMP3,
|
||||||
|
PE8 for COMP4, PD13 for COMP5, PD10 for COMP6,
|
||||||
|
PC0 for COMP7) connected to comparator inverting input */
|
||||||
|
|
||||||
|
#define STM32_COMP_InvertingInput_IO2 COMP_CSR_COMPxINSEL /*!< I/O2 (PB12 for COMP3, PB2 for COMP4, PB10 for COMP5,
|
||||||
|
PB15 for COMP6) connected to comparator inverting input.
|
||||||
|
It is valid only for STM32F303xC devices */
|
||||||
|
|
||||||
|
#define STM32_COMP_InvertingInput_DAC2OUT1 COMP_CSR_COMPxINSEL_3 /*!< DAC2_OUT1 (PA6) connected to comparator inverting input */
|
||||||
|
|
||||||
|
|
||||||
|
#define STM32_COMP_NonInvertingInput_IO1 ((uint32_t)0x00000000) /*!< I/O1 (PA1 for COMP1, PA7 for COMP2, PB14 for COMP3,
|
||||||
|
PB0 for COMP4, PD12 for COMP5, PD11 for COMP6,
|
||||||
|
PA0 for COMP7) connected to comparator non inverting input */
|
||||||
|
|
||||||
|
#define STM32_COMP_NonInvertingInput_IO2 COMP_CSR_COMPxNONINSEL /*!< I/O2 (PA3 for COMP2, PD14 for COMP3, PE7 for COMP4, PB13 for COMP5,
|
||||||
|
PB11 for COMP6, PC1 for COMP7) connected to comparator non inverting input */
|
||||||
|
|
||||||
|
|
||||||
|
#define STM32_COMP_Output_None ((uint32_t)0x00000000) /*!< COMP output isn't connected to other peripherals */
|
||||||
|
|
||||||
|
/* Output Redirection common for all comparators COMP1...COMP7 */
|
||||||
|
#define STM32_COMP_Output_TIM1BKIN COMP_CSR_COMPxOUTSEL_0 /*!< COMP output connected to TIM1 Break Input (BKIN) */
|
||||||
|
#define STM32_COMP_Output_TIM1BKIN2 ((uint32_t)0x00000800) /*!< COMP output connected to TIM1 Break Input 2 (BKIN2) */
|
||||||
|
#define STM32_COMP_Output_TIM8BKIN ((uint32_t)0x00000C00) /*!< COMP output connected to TIM8 Break Input (BKIN) */
|
||||||
|
#define STM32_COMP_Output_TIM8BKIN2 ((uint32_t)0x00001000) /*!< COMP output connected to TIM8 Break Input 2 (BKIN2) */
|
||||||
|
#define STM32_COMP_Output_TIM1BKIN2_TIM8BKIN2 ((uint32_t)0x00001400) /*!< COMP output connected to TIM1 Break Input 2 and TIM8 Break Input 2 */
|
||||||
|
#define STM32_COMP_Output_TIM20BKIN ((uint32_t)0x00003000) /*!< COMP output connected to TIM20 Break Input (BKIN) */
|
||||||
|
#define STM32_COMP_Output_TIM20BKIN2 ((uint32_t)0x00003400) /*!< COMP output connected to TIM20 Break Input 2 (BKIN2) */
|
||||||
|
#define STM32_COMP_Output_TIM1BKIN2_TIM8BKIN2_TIM20BKIN2 ((uint32_t)0x00001400) /*!< COMP output connected to TIM1 Break Input 2, TIM8 Break Input 2 and TIM20 Break Input2 */
|
||||||
|
|
||||||
|
/* Output Redirection common for COMP1 and COMP2 */
|
||||||
|
#define STM32_COMP_Output_TIM1OCREFCLR ((uint32_t)0x00001800) /*!< COMP output connected to TIM1 OCREF Clear */
|
||||||
|
#define STM32_COMP_Output_TIM1IC1 ((uint32_t)0x00001C00) /*!< COMP output connected to TIM1 Input Capture 1 */
|
||||||
|
#define STM32_COMP_Output_TIM2IC4 ((uint32_t)0x00002000) /*!< COMP output connected to TIM2 Input Capture 4 */
|
||||||
|
#define STM32_COMP_Output_TIM2OCREFCLR ((uint32_t)0x00002400) /*!< COMP output connected to TIM2 OCREF Clear */
|
||||||
|
#define STM32_COMP_Output_TIM3IC1 ((uint32_t)0x00002800) /*!< COMP output connected to TIM3 Input Capture 1 */
|
||||||
|
#define STM32_COMP_Output_TIM3OCREFCLR ((uint32_t)0x00002C00) /*!< COMP output connected to TIM3 OCREF Clear */
|
||||||
|
|
||||||
|
/* Output Redirection specific to COMP2 */
|
||||||
|
#define STM32_COMP_Output_HRTIM1_FLT6 ((uint32_t)0x00003000) /*!< COMP output connected to HRTIM1 FLT6 */
|
||||||
|
#define STM32_COMP_Output_HRTIM1_EE1_2 ((uint32_t)0x00003400) /*!< COMP output connected to HRTIM1 EE1_2*/
|
||||||
|
#define STM32_COMP_Output_HRTIM1_EE6_2 ((uint32_t)0x00003800) /*!< COMP output connected to HRTIM1 EE6_2 */
|
||||||
|
#define STM32_COMP_Output_TIM20OCREFCLR ((uint32_t)0x00003C00) /*!< COMP output connected to TIM20 OCREF Clear */
|
||||||
|
|
||||||
|
/* Output Redirection specific to COMP3 */
|
||||||
|
#define STM32_COMP_Output_TIM4IC1 ((uint32_t)0x00001C00) /*!< COMP output connected to TIM4 Input Capture 1 */
|
||||||
|
#define STM32_COMP_Output_TIM3IC2 ((uint32_t)0x00002000) /*!< COMP output connected to TIM3 Input Capture 2 */
|
||||||
|
#define STM32_COMP_Output_TIM15IC1 ((uint32_t)0x00002800) /*!< COMP output connected to TIM15 Input Capture 1 */
|
||||||
|
#define STM32_COMP_Output_TIM15BKIN ((uint32_t)0x00002C00) /*!< COMP output connected to TIM15 Break Input (BKIN) */
|
||||||
|
|
||||||
|
/* Output Redirection specific to COMP4 */
|
||||||
|
#define STM32_COMP_Output_TIM3IC3 ((uint32_t)0x00001800) /*!< COMP output connected to TIM3 Input Capture 3 */
|
||||||
|
#define STM32_COMP_Output_TIM8OCREFCLR ((uint32_t)0x00001C00) /*!< COMP output connected to TIM8 OCREF Clear */
|
||||||
|
#define STM32_COMP_Output_TIM15IC2 ((uint32_t)0x00002000) /*!< COMP output connected to TIM15 Input Capture 2 */
|
||||||
|
#define STM32_COMP_Output_TIM4IC2 ((uint32_t)0x00002400) /*!< COMP output connected to TIM4 Input Capture 2 */
|
||||||
|
#define STM32_COMP_Output_TIM15OCREFCLR ((uint32_t)0x00002800) /*!< COMP output connected to TIM15 OCREF Clear */
|
||||||
|
|
||||||
|
#define STM32_COMP_Output_HRTIM1_FLT7 ((uint32_t)0x00003000) /*!< COMP output connected to HRTIM1 FLT7 */
|
||||||
|
#define STM32_COMP_Output_HRTIM1_EE2_2 ((uint32_t)0x00003400) /*!< COMP output connected to HRTIM1 EE2_2*/
|
||||||
|
#define STM32_COMP_Output_HRTIM1_EE7_2 ((uint32_t)0x00003800) /*!< COMP output connected to HRTIM1 EE7_2 */
|
||||||
|
|
||||||
|
/* Output Redirection specific to COMP5 */
|
||||||
|
#define STM32_COMP_Output_TIM2IC1 ((uint32_t)0x00001800) /*!< COMP output connected to TIM2 Input Capture 1 */
|
||||||
|
#define STM32_COMP_Output_TIM17IC1 ((uint32_t)0x00002000) /*!< COMP output connected to TIM17 Input Capture 1 */
|
||||||
|
#define STM32_COMP_Output_TIM4IC3 ((uint32_t)0x00002400) /*!< COMP output connected to TIM4 Input Capture 3 */
|
||||||
|
#define STM32_COMP_Output_TIM16BKIN ((uint32_t)0x00002800) /*!< COMP output connected to TIM16 Break Input (BKIN) */
|
||||||
|
|
||||||
|
/* Output Redirection specific to COMP6 */
|
||||||
|
#define STM32_COMP_Output_TIM2IC2 ((uint32_t)0x00001800) /*!< COMP output connected to TIM2 Input Capture 2 */
|
||||||
|
#define STM32_COMP_Output_COMP6TIM2OCREFCLR ((uint32_t)0x00002000) /*!< COMP output connected to TIM2 OCREF Clear */
|
||||||
|
#define STM32_COMP_Output_TIM16OCREFCLR ((uint32_t)0x00002400) /*!< COMP output connected to TIM16 OCREF Clear */
|
||||||
|
#define STM32_COMP_Output_TIM16IC1 ((uint32_t)0x00002800) /*!< COMP output connected to TIM16 Input Capture 1 */
|
||||||
|
#define STM32_COMP_Output_TIM4IC4 ((uint32_t)0x00002C00) /*!< COMP output connected to TIM4 Input Capture 4 */
|
||||||
|
|
||||||
|
#define STM32_COMP_Output_HRTIM1_FLT8 ((uint32_t)0x00003000) /*!< COMP output connected to HRTIM1 FLT8 */
|
||||||
|
#define STM32_COMP_Output_HRTIM1_EE3_2 ((uint32_t)0x00003400) /*!< COMP output connected to HRTIM1 EE3_2*/
|
||||||
|
#define STM32_COMP_Output_HRTIM1_EE8_2 ((uint32_t)0x00003800) /*!< COMP output connected to HRTIM1 EE8_2 */
|
||||||
|
|
||||||
|
/* Output Redirection specific to COMP7 */
|
||||||
|
#define STM32_COMP_Output_TIM2IC3 ((uint32_t)0x00002000) /*!< COMP output connected to TIM2 Input Capture 3 */
|
||||||
|
#define STM32_COMP_Output_TIM1IC2 ((uint32_t)0x00002400) /*!< COMP output connected to TIM1 Input Capture 2 */
|
||||||
|
#define STM32_COMP_Output_TIM17OCREFCLR ((uint32_t)0x00002800) /*!< COMP output connected to TIM16 OCREF Clear */
|
||||||
|
#define STM32_COMP_Output_TIM17BKIN ((uint32_t)0x00002C00) /*!< COMP output connected to TIM16 Break Input (BKIN) */
|
||||||
|
|
||||||
|
/* No blanking source can be selected for all comparators */
|
||||||
|
#define STM32_COMP_BlankingSrce_None ((uint32_t)0x00000000) /*!< No blanking source */
|
||||||
|
|
||||||
|
/* Blanking source common for COMP1, COMP2, COMP3 and COMP7 */
|
||||||
|
#define STM32_COMP_BlankingSrce_TIM1OC5 COMP_CSR_COMPxBLANKING_0 /*!< TIM1 OC5 selected as blanking source for compartor */
|
||||||
|
|
||||||
|
/* Blanking source common for COMP1 and COMP2 */
|
||||||
|
#define STM32_COMP_BlankingSrce_TIM2OC3 COMP_CSR_COMPxBLANKING_1 /*!< TIM2 OC5 selected as blanking source for compartor */
|
||||||
|
|
||||||
|
/* Blanking source common for COMP1, COMP2 and COMP5 */
|
||||||
|
#define STM32_COMP_BlankingSrce_TIM3OC3 ((uint32_t)0x000C0000) /*!< TIM2 OC3 selected as blanking source for compartor */
|
||||||
|
|
||||||
|
/* Blanking source common for COMP3 and COMP6 */
|
||||||
|
#define STM32_COMP_BlankingSrce_TIM2OC4 ((uint32_t)0x000C0000) /*!< TIM2 OC4 selected as blanking source for compartor */
|
||||||
|
|
||||||
|
/* Blanking source common for COMP4, COMP5, COMP6 and COMP7 */
|
||||||
|
#define STM32_COMP_BlankingSrce_TIM8OC5 COMP_CSR_COMPxBLANKING_1 /*!< TIM8 OC5 selected as blanking source for compartor */
|
||||||
|
|
||||||
|
/* Blanking source for COMP4 */
|
||||||
|
#define STM32_COMP_BlankingSrce_TIM3OC4 COMP_CSR_COMPxBLANKING_0 /*!< TIM3 OC4 selected as blanking source for compartor */
|
||||||
|
#define STM32_COMP_BlankingSrce_TIM15OC1 ((uint32_t)0x000C0000) /*!< TIM15 OC1 selected as blanking source for compartor */
|
||||||
|
|
||||||
|
/* Blanking source common for COMP6 and COMP7 */
|
||||||
|
#define STM32_COMP_BlankingSrce_TIM15OC2 COMP_CSR_COMPxBLANKING_2 /*!< TIM15 OC2 selected as blanking source for compartor */
|
||||||
|
|
||||||
|
#define STM32_COMP_OutputPol_NonInverted ((uint32_t)0x00000000) /*!< COMP output on GPIO isn't inverted */
|
||||||
|
#define STM32_COMP_OutputPol_Inverted COMP_CSR_COMPxPOL /*!< COMP output on GPIO is inverted */
|
||||||
|
|
||||||
|
#define STM32_COMP_Hysteresis_No 0x00000000 /*!< No hysteresis */
|
||||||
|
#define STM32_COMP_Hysteresis_Low COMP_CSR_COMPxHYST_0 /*!< Hysteresis level low */
|
||||||
|
#define STM32_COMP_Hysteresis_Medium COMP_CSR_COMPxHYST_1 /*!< Hysteresis level medium */
|
||||||
|
#define STM32_COMP_Hysteresis_High COMP_CSR_COMPxHYST /*!< Hysteresis level high */
|
||||||
|
|
||||||
|
#define STM32_COMP_Mode_HighSpeed 0x00000000 /*!< High Speed */
|
||||||
|
#define STM32_COMP_Mode_MediumSpeed COMP_CSR_COMPxMODE_0 /*!< Medium Speed */
|
||||||
|
#define STM32_COMP_Mode_LowPower COMP_CSR_COMPxMODE_1 /*!< Low power mode */
|
||||||
|
#define STM32_COMP_Mode_UltraLowPower COMP_CSR_COMPxMODE /*!< Ultra-low power mode */
|
||||||
|
|
||||||
|
/* When output polarity is not inverted, comparator output is high when
|
||||||
|
the non-inverting input is at a higher voltage than the inverting input */
|
||||||
|
#define STM32_COMP_OutputLevel_High COMP_CSR_COMPxOUT
|
||||||
|
/* When output polarity is not inverted, comparator output is low when
|
||||||
|
the non-inverting input is at a lower voltage than the inverting input*/
|
||||||
|
#define STM32_COMP_OutputLevel_Low ((uint32_t)0x00000000)
|
||||||
|
|
||||||
|
|
||||||
|
#if defined(STM32F301x8) || defined(STM32F302x8) || defined(STM32F303x8) \
|
||||||
|
|| defined(STM32F318xx) || defined(STM32F328xx) || defined(STM32F334x8)
|
||||||
|
#define STM32_HAS_COMP1 FALSE
|
||||||
|
#define STM32_HAS_COMP2 TRUE
|
||||||
|
#define STM32_HAS_COMP3 FALSE
|
||||||
|
#define STM32_HAS_COMP4 TRUE
|
||||||
|
#define STM32_HAS_COMP5 FALSE
|
||||||
|
#define STM32_HAS_COMP6 TRUE
|
||||||
|
#define STM32_HAS_COMP7 FALSE
|
||||||
|
|
||||||
|
#elif defined(STM32F302xc) || defined(STM32F302xe)
|
||||||
|
#define STM32_HAS_COMP1 TRUE
|
||||||
|
#define STM32_HAS_COMP2 TRUE
|
||||||
|
#define STM32_HAS_COMP3 FALSE
|
||||||
|
#define STM32_HAS_COMP4 TRUE
|
||||||
|
#define STM32_HAS_COMP5 FALSE
|
||||||
|
#define STM32_HAS_COMP6 TRUE
|
||||||
|
#define STM32_HAS_COMP7 FALSE
|
||||||
|
|
||||||
|
#elif defined(STM32F303xC) || defined(STM32F303xE) || defined(STM32F358xx) || defined(STM32F398xx)
|
||||||
|
#define STM32_HAS_COMP1 TRUE
|
||||||
|
#define STM32_HAS_COMP2 TRUE
|
||||||
|
#define STM32_HAS_COMP3 TRUE
|
||||||
|
#define STM32_HAS_COMP4 TRUE
|
||||||
|
#define STM32_HAS_COMP5 TRUE
|
||||||
|
#define STM32_HAS_COMP6 TRUE
|
||||||
|
#define STM32_HAS_COMP7 TRUE
|
||||||
|
|
||||||
|
#elif defined(STM32F373xx) || defined(STM32F378xx) || defined(STM32L0XX) || defined(STM32L1XX) \
|
||||||
|
|| defined(STM32F051x8) || defined(STM32F048xx) || defined(STM32F058xx) || defined(STM32F078xx) \
|
||||||
|
|| defined(STM32F072xb) || defined(STM32F071xb)
|
||||||
|
#define STM32_HAS_COMP1 TRUE
|
||||||
|
#define STM32_HAS_COMP2 TRUE
|
||||||
|
#define STM32_HAS_COMP3 FALSE
|
||||||
|
#define STM32_HAS_COMP4 FALSE
|
||||||
|
#define STM32_HAS_COMP5 FALSE
|
||||||
|
#define STM32_HAS_COMP6 FALSE
|
||||||
|
#define STM32_HAS_COMP7 FALSE
|
||||||
|
|
||||||
|
#else
|
||||||
|
#define STM32_HAS_COMP1 FALSE
|
||||||
|
#define STM32_HAS_COMP2 FALSE
|
||||||
|
#define STM32_HAS_COMP3 FALSE
|
||||||
|
#define STM32_HAS_COMP4 FALSE
|
||||||
|
#define STM32_HAS_COMP5 FALSE
|
||||||
|
#define STM32_HAS_COMP6 FALSE
|
||||||
|
#define STM32_HAS_COMP7 FALSE
|
||||||
|
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/* Driver pre-compile time settings. */
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @name Configuration options
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief COMP INTERRUPTS.
|
||||||
|
* @details If set to @p TRUE the support for COMPD1 is included.
|
||||||
|
* @note The default is @p FALSE.
|
||||||
|
*/
|
||||||
|
#if !defined(STM32_COMP_USE_INTERRUPTS) || defined(__DOXYGEN__)
|
||||||
|
#define STM32_COMP_USE_INTERRUPTS FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief COMPD1 driver enable switch.
|
||||||
|
* @details If set to @p TRUE the support for COMPD1 is included.
|
||||||
|
* @note The default is @p FALSE.
|
||||||
|
*/
|
||||||
|
#if !defined(STM32_COMP_USE_COMP1) || defined(__DOXYGEN__)
|
||||||
|
#define STM32_COMP_USE_COMP1 FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief COMPD2 driver enable switch.
|
||||||
|
* @details If set to @p TRUE the support for COMPD2 is included.
|
||||||
|
* @note The default is @p FALSE.
|
||||||
|
*/
|
||||||
|
#if !defined(STM32_COMP_USE_COMP2) || defined(__DOXYGEN__)
|
||||||
|
#define STM32_COMP_USE_COMP2 FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief COMPD3 driver enable switch.
|
||||||
|
* @details If set to @p TRUE the support for COMPD3 is included.
|
||||||
|
* @note The default is @p FALSE.
|
||||||
|
*/
|
||||||
|
#if !defined(STM32_COMP_USE_COMP3) || defined(__DOXYGEN__)
|
||||||
|
#define STM32_COMP_USE_COMP3 FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief COMPD4 driver enable switch.
|
||||||
|
* @details If set to @p TRUE the support for COMPD4 is included.
|
||||||
|
* @note The default is @p FALSE.
|
||||||
|
*/
|
||||||
|
#if !defined(STM32_COMP_USE_COMP4) || defined(__DOXYGEN__)
|
||||||
|
#define STM32_COMP_USE_COMP4 FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief COMPD5 driver enable switch.
|
||||||
|
* @details If set to @p TRUE the support for COMPD4 is included.
|
||||||
|
* @note The default is @p FALSE.
|
||||||
|
*/
|
||||||
|
#if !defined(STM32_COMP_USE_COMP5) || defined(__DOXYGEN__)
|
||||||
|
#define STM32_COMP_USE_COMP5 FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief COMPD6 driver enable switch.
|
||||||
|
* @details If set to @p TRUE the support for COMPD4 is included.
|
||||||
|
* @note The default is @p FALSE.
|
||||||
|
*/
|
||||||
|
#if !defined(STM32_COMP_USE_COMP6) || defined(__DOXYGEN__)
|
||||||
|
#define STM32_COMP_USE_COMP6 FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief COMPD7 driver enable switch.
|
||||||
|
* @details If set to @p TRUE the support for COMPD4 is included.
|
||||||
|
* @note The default is @p FALSE.
|
||||||
|
*/
|
||||||
|
#if !defined(STM32_COMP_USE_COMP7) || defined(__DOXYGEN__)
|
||||||
|
#define STM32_COMP_USE_COMP7 FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/* Derived constants and error checks. */
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
#if STM32_COMP_USE_INTERRUPTS && defined(STM32F0XX)
|
||||||
|
#error "Interrupts are shared with EXTI on F0s (lines 21-22)"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if STM32_COMP_USE_INTERRUPTS
|
||||||
|
#if !defined(STM32_DISABLE_EXTI21_22_29_HANDLER) || !defined(STM32_DISABLE_EXTI30_32_HANDLER) || !defined(STM32_DISABLE_EXTI33_HANDLER)
|
||||||
|
#error "COMP needs these defines in mcuconf to use interrupts: STM32_DISABLE_EXTI21_22_29_HANDLER STM32_DISABLE_EXTI30_32_HANDLER STM32_DISABLE_EXTI33_HANDLER"
|
||||||
|
#endif
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if STM32_COMP_USE_COMP1 && !STM32_HAS_COMP1
|
||||||
|
#error "COMP1 not present in the selected device"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if STM32_COMP_USE_COMP2 && !STM32_HAS_COMP2
|
||||||
|
#error "COMP2 not present in the selected device"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if STM32_COMP_USE_COMP3 && !STM32_HAS_COMP3
|
||||||
|
#error "COMP3 not present in the selected device"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if STM32_COMP_USE_COMP4 && !STM32_HAS_COMP4
|
||||||
|
#error "COMP4 not present in the selected device"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if STM32_COMP_USE_COMP5 && !STM32_HAS_COMP5
|
||||||
|
#error "COMP5 not present in the selected device"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if STM32_COMP_USE_COMP6 && !STM32_HAS_COMP6
|
||||||
|
#error "COMP6 not present in the selected device"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if STM32_COMP_USE_COMP7 && !STM32_HAS_COMP7
|
||||||
|
#error "COMP7 not present in the selected device"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if !STM32_COMP_USE_COMP1 && !STM32_COMP_USE_COMP2 && \
|
||||||
|
!STM32_COMP_USE_COMP3 && !STM32_COMP_USE_COMP4 && \
|
||||||
|
!STM32_COMP_USE_COMP6 && !STM32_COMP_USE_COMP6 && \
|
||||||
|
!STM32_COMP_USE_COMP7
|
||||||
|
#error "COMP driver activated but no COMP peripheral assigned"
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/* Driver data structures and types. */
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief COMP output mode.
|
||||||
|
*/
|
||||||
|
typedef enum {
|
||||||
|
COMP_OUTPUT_NORMAL = 0,
|
||||||
|
COMP_OUTPUT_INVERTED = 1
|
||||||
|
} comp_output_mode_t;
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief COMP interrupt mode.
|
||||||
|
*/
|
||||||
|
typedef enum {
|
||||||
|
COMP_IRQ_RISING = 0,
|
||||||
|
COMP_IRQ_FALLING = 1,
|
||||||
|
COMP_IRQ_BOTH = 2
|
||||||
|
} comp_irq_mode_t;
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Driver configuration structure.
|
||||||
|
* @note It could be empty on some architectures.
|
||||||
|
*/
|
||||||
|
typedef struct {
|
||||||
|
/**
|
||||||
|
* @brief Ouput mode.
|
||||||
|
*/
|
||||||
|
comp_output_mode_t output_mode;
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Ouput mode.
|
||||||
|
*/
|
||||||
|
comp_irq_mode_t irq_mode;
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Callback.
|
||||||
|
*/
|
||||||
|
compcallback_t cb;
|
||||||
|
|
||||||
|
/* End of the mandatory fields.*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief COMP CSR register initialization data.
|
||||||
|
* @note The value of this field should normally be equal to zero.
|
||||||
|
*/
|
||||||
|
uint32_t csr;
|
||||||
|
} COMPConfig;
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Structure representing an COMP driver.
|
||||||
|
*/
|
||||||
|
struct COMPDriver {
|
||||||
|
/**
|
||||||
|
* @brief Driver state.
|
||||||
|
*/
|
||||||
|
compstate_t state;
|
||||||
|
/**
|
||||||
|
* @brief Current configuration data.
|
||||||
|
*/
|
||||||
|
const COMPConfig *config;
|
||||||
|
#if defined(COMP_DRIVER_EXT_FIELDS)
|
||||||
|
COMP_DRIVER_EXT_FIELDS
|
||||||
|
#endif
|
||||||
|
/* End of the mandatory fields.*/
|
||||||
|
/**
|
||||||
|
* @brief Pointer to the COMPx registers block.
|
||||||
|
*/
|
||||||
|
COMP_TypeDef *reg;
|
||||||
|
};
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/* Driver macros. */
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/* External declarations. */
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
#if STM32_COMP_USE_COMP1 && !defined(__DOXYGEN__)
|
||||||
|
extern COMPDriver COMPD1;
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if STM32_COMP_USE_COMP2 && !defined(__DOXYGEN__)
|
||||||
|
extern COMPDriver COMPD2;
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if STM32_COMP_USE_COMP3 && !defined(__DOXYGEN__)
|
||||||
|
extern COMPDriver COMPD3;
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if STM32_COMP_USE_COMP4 && !defined(__DOXYGEN__)
|
||||||
|
extern COMPDriver COMPD4;
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if STM32_COMP_USE_COMP5 && !defined(__DOXYGEN__)
|
||||||
|
extern COMPDriver COMPD5;
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if STM32_COMP_USE_COMP6 && !defined(__DOXYGEN__)
|
||||||
|
extern COMPDriver COMPD6;
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#if STM32_COMP_USE_COMP7 && !defined(__DOXYGEN__)
|
||||||
|
extern COMPDriver COMPD7;
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
void comp_lld_init(void);
|
||||||
|
void comp_lld_start(COMPDriver *compp);
|
||||||
|
void comp_lld_stop(COMPDriver *compp);
|
||||||
|
void comp_lld_enable(COMPDriver *compp);
|
||||||
|
void comp_lld_disable(COMPDriver *compp);
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* HAL_USE_COMP */
|
||||||
|
|
||||||
|
#endif /* _comp_lld_H_ */
|
||||||
|
|
||||||
|
/** @} */
|
|
@ -4,7 +4,9 @@ PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/CRCv1/hal_crc_lld.c \
|
||||||
${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1/hal_eicu_lld.c \
|
${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1/hal_eicu_lld.c \
|
||||||
${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1/hal_timcap_lld.c \
|
${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1/hal_timcap_lld.c \
|
||||||
${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1/hal_qei_lld.c \
|
${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1/hal_qei_lld.c \
|
||||||
|
${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/COMPv1/hal_comp_lld.c \
|
||||||
|
|
||||||
PLATFORMINC += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/CRCv1 \
|
PLATFORMINC += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/CRCv1 \
|
||||||
${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1 \
|
${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1 \
|
||||||
|
${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/COMPv1 \
|
||||||
${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD
|
${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD
|
||||||
|
|
|
@ -80,6 +80,10 @@ void halCommunityInit(void) {
|
||||||
#if HAL_USE_QEI || defined(__DOXYGEN__)
|
#if HAL_USE_QEI || defined(__DOXYGEN__)
|
||||||
qeiInit();
|
qeiInit();
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
#if HAL_USE_COMP || defined(__DOXYGEN__)
|
||||||
|
compInit();
|
||||||
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
#endif /* HAL_USE_COMMUNITY */
|
#endif /* HAL_USE_COMMUNITY */
|
||||||
|
|
|
@ -0,0 +1,155 @@
|
||||||
|
/*
|
||||||
|
ChibiOS - Copyright (C) 2006..2017 Giovanni Di Sirio
|
||||||
|
Copyright (C) 2017 Fabien Poussin (fabien.poussin (at) google's mail)
|
||||||
|
|
||||||
|
Licensed under the Apache License, Version 2.0 (the "License");
|
||||||
|
you may not use this file except in compliance with the License.
|
||||||
|
You may obtain a copy of the License at
|
||||||
|
|
||||||
|
http://www.apache.org/licenses/LICENSE-2.0
|
||||||
|
|
||||||
|
Unless required by applicable law or agreed to in writing, software
|
||||||
|
distributed under the License is distributed on an "AS IS" BASIS,
|
||||||
|
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||||
|
See the License for the specific language governing permissions and
|
||||||
|
limitations under the License.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @file hal_comp.c
|
||||||
|
* @brief COMP Driver code.
|
||||||
|
*
|
||||||
|
* @addtogroup COMP
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "hal_comp.h"
|
||||||
|
|
||||||
|
#if HAL_USE_COMP || defined(__DOXYGEN__)
|
||||||
|
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/* Driver local definitions. */
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/* Driver exported variables. */
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/* Driver local variables and types. */
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/* Driver local functions. */
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/* Driver exported functions. */
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief COMP Driver initialization.
|
||||||
|
* @note This function is implicitly invoked by @p halInit(), there is
|
||||||
|
* no need to explicitly initialize the driver.
|
||||||
|
*
|
||||||
|
* @init
|
||||||
|
*/
|
||||||
|
void compInit(void) {
|
||||||
|
|
||||||
|
comp_lld_init();
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Initializes the standard part of a @p COMPDriver structure.
|
||||||
|
*
|
||||||
|
* @param[out] compp pointer to the @p COMPDriver object
|
||||||
|
*
|
||||||
|
* @init
|
||||||
|
*/
|
||||||
|
void compObjectInit(COMPDriver *compp) {
|
||||||
|
|
||||||
|
compp->state = COMP_STOP;
|
||||||
|
compp->config = NULL;
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Configures and activates the COMP peripheral.
|
||||||
|
*
|
||||||
|
* @param[in] compp pointer to the @p COMPDriver object
|
||||||
|
* @param[in] config pointer to the @p COMPConfig object
|
||||||
|
*
|
||||||
|
* @api
|
||||||
|
*/
|
||||||
|
void compStart(COMPDriver *compp, const COMPConfig *config) {
|
||||||
|
|
||||||
|
osalDbgCheck((compp != NULL) && (config != NULL));
|
||||||
|
|
||||||
|
osalSysLock();
|
||||||
|
osalDbgAssert((compp->state == COMP_STOP) || (compp->state == COMP_READY),
|
||||||
|
"invalid state");
|
||||||
|
compp->config = config;
|
||||||
|
comp_lld_start(compp);
|
||||||
|
compp->state = COMP_READY;
|
||||||
|
osalSysUnlock();
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Deactivates the COMP peripheral.
|
||||||
|
*
|
||||||
|
* @param[in] compp pointer to the @p COMPDriver object
|
||||||
|
*
|
||||||
|
* @api
|
||||||
|
*/
|
||||||
|
void compStop(COMPDriver *compp) {
|
||||||
|
|
||||||
|
osalDbgCheck(compp != NULL);
|
||||||
|
|
||||||
|
osalSysLock();
|
||||||
|
osalDbgAssert((compp->state == COMP_STOP) || (compp->state == COMP_READY),
|
||||||
|
"invalid state");
|
||||||
|
comp_lld_stop(compp);
|
||||||
|
compp->state = COMP_STOP;
|
||||||
|
osalSysUnlock();
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Activates the comparator.
|
||||||
|
*
|
||||||
|
* @param[in] compp pointer to the @p COMPDriver object
|
||||||
|
*
|
||||||
|
* @api
|
||||||
|
*/
|
||||||
|
void compEnable(COMPDriver *compp) {
|
||||||
|
|
||||||
|
osalDbgCheck(compp != NULL);
|
||||||
|
|
||||||
|
osalSysLock();
|
||||||
|
osalDbgAssert(compp->state == COMP_READY, "invalid state");
|
||||||
|
comp_lld_enable(compp);
|
||||||
|
compp->state = COMP_ACTIVE;
|
||||||
|
osalSysUnlock();
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Deactivates the comparator.
|
||||||
|
*
|
||||||
|
* @param[in] compp pointer to the @p COMPDriver object
|
||||||
|
*
|
||||||
|
* @api
|
||||||
|
*/
|
||||||
|
void compDisable(COMPDriver *compp) {
|
||||||
|
|
||||||
|
osalDbgCheck(compp != NULL);
|
||||||
|
|
||||||
|
osalSysLock();
|
||||||
|
osalDbgAssert((compp->state == COMP_READY) || (compp->state == COMP_ACTIVE),
|
||||||
|
"invalid state");
|
||||||
|
comp_lld_disable(compp);
|
||||||
|
compp->state = COMP_READY;
|
||||||
|
osalSysUnlock();
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif /* HAL_USE_COMP */
|
||||||
|
|
||||||
|
/** @} */
|
|
@ -0,0 +1,219 @@
|
||||||
|
##############################################################################
|
||||||
|
# Build global options
|
||||||
|
# NOTE: Can be overridden externally.
|
||||||
|
#
|
||||||
|
|
||||||
|
# Compiler options here.
|
||||||
|
ifeq ($(USE_OPT),)
|
||||||
|
USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16
|
||||||
|
endif
|
||||||
|
|
||||||
|
# C specific options here (added to USE_OPT).
|
||||||
|
ifeq ($(USE_COPT),)
|
||||||
|
USE_COPT =
|
||||||
|
endif
|
||||||
|
|
||||||
|
# C++ specific options here (added to USE_OPT).
|
||||||
|
ifeq ($(USE_CPPOPT),)
|
||||||
|
USE_CPPOPT = -fno-rtti
|
||||||
|
endif
|
||||||
|
|
||||||
|
# Enable this if you want the linker to remove unused code and data
|
||||||
|
ifeq ($(USE_LINK_GC),)
|
||||||
|
USE_LINK_GC = yes
|
||||||
|
endif
|
||||||
|
|
||||||
|
# Linker extra options here.
|
||||||
|
ifeq ($(USE_LDOPT),)
|
||||||
|
USE_LDOPT =
|
||||||
|
endif
|
||||||
|
|
||||||
|
# Enable this if you want link time optimizations (LTO)
|
||||||
|
ifeq ($(USE_LTO),)
|
||||||
|
USE_LTO = yes
|
||||||
|
endif
|
||||||
|
|
||||||
|
# If enabled, this option allows to compile the application in THUMB mode.
|
||||||
|
ifeq ($(USE_THUMB),)
|
||||||
|
USE_THUMB = yes
|
||||||
|
endif
|
||||||
|
|
||||||
|
# Enable this if you want to see the full log while compiling.
|
||||||
|
ifeq ($(USE_VERBOSE_COMPILE),)
|
||||||
|
USE_VERBOSE_COMPILE = no
|
||||||
|
endif
|
||||||
|
|
||||||
|
# If enabled, this option makes the build process faster by not compiling
|
||||||
|
# modules not used in the current configuration.
|
||||||
|
ifeq ($(USE_SMART_BUILD),)
|
||||||
|
USE_SMART_BUILD = yes
|
||||||
|
endif
|
||||||
|
|
||||||
|
#
|
||||||
|
# Build global options
|
||||||
|
##############################################################################
|
||||||
|
|
||||||
|
##############################################################################
|
||||||
|
# Architecture or project specific options
|
||||||
|
#
|
||||||
|
|
||||||
|
# Stack size to be allocated to the Cortex-M process stack. This stack is
|
||||||
|
# the stack used by the main() thread.
|
||||||
|
ifeq ($(USE_PROCESS_STACKSIZE),)
|
||||||
|
USE_PROCESS_STACKSIZE = 0x400
|
||||||
|
endif
|
||||||
|
|
||||||
|
# Stack size to the allocated to the Cortex-M main/exceptions stack. This
|
||||||
|
# stack is used for processing interrupts and exceptions.
|
||||||
|
ifeq ($(USE_EXCEPTIONS_STACKSIZE),)
|
||||||
|
USE_EXCEPTIONS_STACKSIZE = 0x400
|
||||||
|
endif
|
||||||
|
|
||||||
|
# Enables the use of FPU on Cortex-M4 (no, softfp, hard).
|
||||||
|
ifeq ($(USE_FPU),)
|
||||||
|
USE_FPU = no
|
||||||
|
endif
|
||||||
|
|
||||||
|
#
|
||||||
|
# Architecture or project specific options
|
||||||
|
##############################################################################
|
||||||
|
|
||||||
|
##############################################################################
|
||||||
|
# Project, sources and paths
|
||||||
|
#
|
||||||
|
|
||||||
|
# Define project name here
|
||||||
|
PROJECT = ch
|
||||||
|
|
||||||
|
# Imported source files and paths
|
||||||
|
CHIBIOS = ../../../../../ChibiOS-RT
|
||||||
|
CHIBIOS_CONTRIB = $(CHIBIOS)/../ChibiOS-Contrib
|
||||||
|
# Startup files.
|
||||||
|
include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f3xx.mk
|
||||||
|
# HAL-OSAL files (optional).
|
||||||
|
include $(CHIBIOS_CONTRIB)/os/hal/hal.mk
|
||||||
|
include $(CHIBIOS_CONTRIB)/os/hal/ports/STM32/STM32F3xx/platform.mk
|
||||||
|
include $(CHIBIOS)/os/hal/boards/ST_STM32F3_DISCOVERY/board.mk
|
||||||
|
include $(CHIBIOS)/os/hal/osal/rt/osal.mk
|
||||||
|
# RTOS files (optional).
|
||||||
|
include $(CHIBIOS)/os/rt/rt.mk
|
||||||
|
include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk
|
||||||
|
# Other files (optional).
|
||||||
|
#include $(CHIBIOS)/test/rt/test.mk
|
||||||
|
|
||||||
|
# Define linker script file here
|
||||||
|
LDSCRIPT= $(STARTUPLD)/STM32F303xC.ld
|
||||||
|
|
||||||
|
# C sources that can be compiled in ARM or THUMB mode depending on the global
|
||||||
|
# setting.
|
||||||
|
CSRC = $(STARTUPSRC) \
|
||||||
|
$(KERNSRC) \
|
||||||
|
$(PORTSRC) \
|
||||||
|
$(OSALSRC) \
|
||||||
|
$(HALSRC) \
|
||||||
|
$(PLATFORMSRC) \
|
||||||
|
$(BOARDSRC) \
|
||||||
|
$(TESTSRC) \
|
||||||
|
main.c
|
||||||
|
|
||||||
|
# C++ sources that can be compiled in ARM or THUMB mode depending on the global
|
||||||
|
# setting.
|
||||||
|
CPPSRC =
|
||||||
|
|
||||||
|
# C sources to be compiled in ARM mode regardless of the global setting.
|
||||||
|
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
|
||||||
|
# option that results in lower performance and larger code size.
|
||||||
|
ACSRC =
|
||||||
|
|
||||||
|
# C++ sources to be compiled in ARM mode regardless of the global setting.
|
||||||
|
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
|
||||||
|
# option that results in lower performance and larger code size.
|
||||||
|
ACPPSRC =
|
||||||
|
|
||||||
|
# C sources to be compiled in THUMB mode regardless of the global setting.
|
||||||
|
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
|
||||||
|
# option that results in lower performance and larger code size.
|
||||||
|
TCSRC =
|
||||||
|
|
||||||
|
# C sources to be compiled in THUMB mode regardless of the global setting.
|
||||||
|
# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
|
||||||
|
# option that results in lower performance and larger code size.
|
||||||
|
TCPPSRC =
|
||||||
|
|
||||||
|
# List ASM source files here
|
||||||
|
ASMSRC =
|
||||||
|
ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM)
|
||||||
|
|
||||||
|
INCDIR = $(CHIBIOS)/os/license \
|
||||||
|
$(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \
|
||||||
|
$(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \
|
||||||
|
$(CHIBIOS)/os/various
|
||||||
|
|
||||||
|
#
|
||||||
|
# Project, sources and paths
|
||||||
|
##############################################################################
|
||||||
|
|
||||||
|
##############################################################################
|
||||||
|
# Compiler settings
|
||||||
|
#
|
||||||
|
|
||||||
|
MCU = cortex-m4
|
||||||
|
|
||||||
|
#TRGT = arm-elf-
|
||||||
|
TRGT = arm-none-eabi-
|
||||||
|
CC = $(TRGT)gcc
|
||||||
|
CPPC = $(TRGT)g++
|
||||||
|
# Enable loading with g++ only if you need C++ runtime support.
|
||||||
|
# NOTE: You can use C++ even without C++ support if you are careful. C++
|
||||||
|
# runtime support makes code size explode.
|
||||||
|
LD = $(TRGT)gcc
|
||||||
|
#LD = $(TRGT)g++
|
||||||
|
CP = $(TRGT)objcopy
|
||||||
|
AS = $(TRGT)gcc -x assembler-with-cpp
|
||||||
|
AR = $(TRGT)ar
|
||||||
|
OD = $(TRGT)objdump
|
||||||
|
SZ = $(TRGT)size
|
||||||
|
HEX = $(CP) -O ihex
|
||||||
|
BIN = $(CP) -O binary
|
||||||
|
|
||||||
|
# ARM-specific options here
|
||||||
|
AOPT =
|
||||||
|
|
||||||
|
# THUMB-specific options here
|
||||||
|
TOPT = -mthumb -DTHUMB
|
||||||
|
|
||||||
|
# Define C warning options here
|
||||||
|
CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes
|
||||||
|
|
||||||
|
# Define C++ warning options here
|
||||||
|
CPPWARN = -Wall -Wextra -Wundef
|
||||||
|
|
||||||
|
#
|
||||||
|
# Compiler settings
|
||||||
|
##############################################################################
|
||||||
|
|
||||||
|
##############################################################################
|
||||||
|
# Start of user section
|
||||||
|
#
|
||||||
|
|
||||||
|
# List all user C define here, like -D_DEBUG=1
|
||||||
|
UDEFS =
|
||||||
|
|
||||||
|
# Define ASM defines here
|
||||||
|
UADEFS =
|
||||||
|
|
||||||
|
# List all user directories here
|
||||||
|
UINCDIR =
|
||||||
|
|
||||||
|
# List the user directory to look for the libraries here
|
||||||
|
ULIBDIR =
|
||||||
|
|
||||||
|
# List all user libraries here
|
||||||
|
ULIBS =
|
||||||
|
|
||||||
|
#
|
||||||
|
# End of user defines
|
||||||
|
##############################################################################
|
||||||
|
|
||||||
|
RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC
|
||||||
|
include $(RULESPATH)/rules.mk
|
|
@ -0,0 +1,520 @@
|
||||||
|
/*
|
||||||
|
ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
|
||||||
|
|
||||||
|
Licensed under the Apache License, Version 2.0 (the "License");
|
||||||
|
you may not use this file except in compliance with the License.
|
||||||
|
You may obtain a copy of the License at
|
||||||
|
|
||||||
|
http://www.apache.org/licenses/LICENSE-2.0
|
||||||
|
|
||||||
|
Unless required by applicable law or agreed to in writing, software
|
||||||
|
distributed under the License is distributed on an "AS IS" BASIS,
|
||||||
|
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||||
|
See the License for the specific language governing permissions and
|
||||||
|
limitations under the License.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @file templates/chconf.h
|
||||||
|
* @brief Configuration file template.
|
||||||
|
* @details A copy of this file must be placed in each project directory, it
|
||||||
|
* contains the application specific kernel settings.
|
||||||
|
*
|
||||||
|
* @addtogroup config
|
||||||
|
* @details Kernel related settings and hooks.
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef CHCONF_H
|
||||||
|
#define CHCONF_H
|
||||||
|
|
||||||
|
#define _CHIBIOS_RT_CONF_
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/**
|
||||||
|
* @name System timers settings
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief System time counter resolution.
|
||||||
|
* @note Allowed values are 16 or 32 bits.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_ST_RESOLUTION 32
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief System tick frequency.
|
||||||
|
* @details Frequency of the system timer that drives the system ticks. This
|
||||||
|
* setting also defines the system tick time unit.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_ST_FREQUENCY 10000
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Time delta constant for the tick-less mode.
|
||||||
|
* @note If this value is zero then the system uses the classic
|
||||||
|
* periodic tick. This value represents the minimum number
|
||||||
|
* of ticks that is safe to specify in a timeout directive.
|
||||||
|
* The value one is not valid, timeouts are rounded up to
|
||||||
|
* this value.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_ST_TIMEDELTA 2
|
||||||
|
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/**
|
||||||
|
* @name Kernel parameters and options
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Round robin interval.
|
||||||
|
* @details This constant is the number of system ticks allowed for the
|
||||||
|
* threads before preemption occurs. Setting this value to zero
|
||||||
|
* disables the preemption for threads with equal priority and the
|
||||||
|
* round robin becomes cooperative. Note that higher priority
|
||||||
|
* threads can still preempt, the kernel is always preemptive.
|
||||||
|
* @note Disabling the round robin preemption makes the kernel more compact
|
||||||
|
* and generally faster.
|
||||||
|
* @note The round robin preemption is not supported in tickless mode and
|
||||||
|
* must be set to zero in that case.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_TIME_QUANTUM 0
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Managed RAM size.
|
||||||
|
* @details Size of the RAM area to be managed by the OS. If set to zero
|
||||||
|
* then the whole available RAM is used. The core memory is made
|
||||||
|
* available to the heap allocator and/or can be used directly through
|
||||||
|
* the simplified core memory allocator.
|
||||||
|
*
|
||||||
|
* @note In order to let the OS manage the whole RAM the linker script must
|
||||||
|
* provide the @p __heap_base__ and @p __heap_end__ symbols.
|
||||||
|
* @note Requires @p CH_CFG_USE_MEMCORE.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_MEMCORE_SIZE 0
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Idle thread automatic spawn suppression.
|
||||||
|
* @details When this option is activated the function @p chSysInit()
|
||||||
|
* does not spawn the idle thread. The application @p main()
|
||||||
|
* function becomes the idle thread and must implement an
|
||||||
|
* infinite loop.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_NO_IDLE_THREAD FALSE
|
||||||
|
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/**
|
||||||
|
* @name Performance options
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief OS optimization.
|
||||||
|
* @details If enabled then time efficient rather than space efficient code
|
||||||
|
* is used when two possible implementations exist.
|
||||||
|
*
|
||||||
|
* @note This is not related to the compiler optimization options.
|
||||||
|
* @note The default is @p TRUE.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_OPTIMIZE_SPEED TRUE
|
||||||
|
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/**
|
||||||
|
* @name Subsystem options
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Time Measurement APIs.
|
||||||
|
* @details If enabled then the time measurement APIs are included in
|
||||||
|
* the kernel.
|
||||||
|
*
|
||||||
|
* @note The default is @p TRUE.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_USE_TM TRUE
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Threads registry APIs.
|
||||||
|
* @details If enabled then the registry APIs are included in the kernel.
|
||||||
|
*
|
||||||
|
* @note The default is @p TRUE.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_USE_REGISTRY TRUE
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Threads synchronization APIs.
|
||||||
|
* @details If enabled then the @p chThdWait() function is included in
|
||||||
|
* the kernel.
|
||||||
|
*
|
||||||
|
* @note The default is @p TRUE.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_USE_WAITEXIT TRUE
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Semaphores APIs.
|
||||||
|
* @details If enabled then the Semaphores APIs are included in the kernel.
|
||||||
|
*
|
||||||
|
* @note The default is @p TRUE.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_USE_SEMAPHORES TRUE
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Semaphores queuing mode.
|
||||||
|
* @details If enabled then the threads are enqueued on semaphores by
|
||||||
|
* priority rather than in FIFO order.
|
||||||
|
*
|
||||||
|
* @note The default is @p FALSE. Enable this if you have special
|
||||||
|
* requirements.
|
||||||
|
* @note Requires @p CH_CFG_USE_SEMAPHORES.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Mutexes APIs.
|
||||||
|
* @details If enabled then the mutexes APIs are included in the kernel.
|
||||||
|
*
|
||||||
|
* @note The default is @p TRUE.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_USE_MUTEXES TRUE
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables recursive behavior on mutexes.
|
||||||
|
* @note Recursive mutexes are heavier and have an increased
|
||||||
|
* memory footprint.
|
||||||
|
*
|
||||||
|
* @note The default is @p FALSE.
|
||||||
|
* @note Requires @p CH_CFG_USE_MUTEXES.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Conditional Variables APIs.
|
||||||
|
* @details If enabled then the conditional variables APIs are included
|
||||||
|
* in the kernel.
|
||||||
|
*
|
||||||
|
* @note The default is @p TRUE.
|
||||||
|
* @note Requires @p CH_CFG_USE_MUTEXES.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_USE_CONDVARS TRUE
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Conditional Variables APIs with timeout.
|
||||||
|
* @details If enabled then the conditional variables APIs with timeout
|
||||||
|
* specification are included in the kernel.
|
||||||
|
*
|
||||||
|
* @note The default is @p TRUE.
|
||||||
|
* @note Requires @p CH_CFG_USE_CONDVARS.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_USE_CONDVARS_TIMEOUT TRUE
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Events Flags APIs.
|
||||||
|
* @details If enabled then the event flags APIs are included in the kernel.
|
||||||
|
*
|
||||||
|
* @note The default is @p TRUE.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_USE_EVENTS TRUE
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Events Flags APIs with timeout.
|
||||||
|
* @details If enabled then the events APIs with timeout specification
|
||||||
|
* are included in the kernel.
|
||||||
|
*
|
||||||
|
* @note The default is @p TRUE.
|
||||||
|
* @note Requires @p CH_CFG_USE_EVENTS.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_USE_EVENTS_TIMEOUT TRUE
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Synchronous Messages APIs.
|
||||||
|
* @details If enabled then the synchronous messages APIs are included
|
||||||
|
* in the kernel.
|
||||||
|
*
|
||||||
|
* @note The default is @p TRUE.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_USE_MESSAGES TRUE
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Synchronous Messages queuing mode.
|
||||||
|
* @details If enabled then messages are served by priority rather than in
|
||||||
|
* FIFO order.
|
||||||
|
*
|
||||||
|
* @note The default is @p FALSE. Enable this if you have special
|
||||||
|
* requirements.
|
||||||
|
* @note Requires @p CH_CFG_USE_MESSAGES.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_USE_MESSAGES_PRIORITY FALSE
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Mailboxes APIs.
|
||||||
|
* @details If enabled then the asynchronous messages (mailboxes) APIs are
|
||||||
|
* included in the kernel.
|
||||||
|
*
|
||||||
|
* @note The default is @p TRUE.
|
||||||
|
* @note Requires @p CH_CFG_USE_SEMAPHORES.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_USE_MAILBOXES TRUE
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Core Memory Manager APIs.
|
||||||
|
* @details If enabled then the core memory manager APIs are included
|
||||||
|
* in the kernel.
|
||||||
|
*
|
||||||
|
* @note The default is @p TRUE.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_USE_MEMCORE TRUE
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Heap Allocator APIs.
|
||||||
|
* @details If enabled then the memory heap allocator APIs are included
|
||||||
|
* in the kernel.
|
||||||
|
*
|
||||||
|
* @note The default is @p TRUE.
|
||||||
|
* @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or
|
||||||
|
* @p CH_CFG_USE_SEMAPHORES.
|
||||||
|
* @note Mutexes are recommended.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_USE_HEAP TRUE
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Memory Pools Allocator APIs.
|
||||||
|
* @details If enabled then the memory pools allocator APIs are included
|
||||||
|
* in the kernel.
|
||||||
|
*
|
||||||
|
* @note The default is @p TRUE.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_USE_MEMPOOLS TRUE
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Dynamic Threads APIs.
|
||||||
|
* @details If enabled then the dynamic threads creation APIs are included
|
||||||
|
* in the kernel.
|
||||||
|
*
|
||||||
|
* @note The default is @p TRUE.
|
||||||
|
* @note Requires @p CH_CFG_USE_WAITEXIT.
|
||||||
|
* @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_USE_DYNAMIC TRUE
|
||||||
|
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/**
|
||||||
|
* @name Debug options
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Debug option, kernel statistics.
|
||||||
|
*
|
||||||
|
* @note The default is @p FALSE.
|
||||||
|
*/
|
||||||
|
#define CH_DBG_STATISTICS FALSE
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Debug option, system state check.
|
||||||
|
* @details If enabled the correct call protocol for system APIs is checked
|
||||||
|
* at runtime.
|
||||||
|
*
|
||||||
|
* @note The default is @p FALSE.
|
||||||
|
*/
|
||||||
|
#define CH_DBG_SYSTEM_STATE_CHECK TRUE
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Debug option, parameters checks.
|
||||||
|
* @details If enabled then the checks on the API functions input
|
||||||
|
* parameters are activated.
|
||||||
|
*
|
||||||
|
* @note The default is @p FALSE.
|
||||||
|
*/
|
||||||
|
#define CH_DBG_ENABLE_CHECKS TRUE
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Debug option, consistency checks.
|
||||||
|
* @details If enabled then all the assertions in the kernel code are
|
||||||
|
* activated. This includes consistency checks inside the kernel,
|
||||||
|
* runtime anomalies and port-defined checks.
|
||||||
|
*
|
||||||
|
* @note The default is @p FALSE.
|
||||||
|
*/
|
||||||
|
#define CH_DBG_ENABLE_ASSERTS TRUE
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Debug option, trace buffer.
|
||||||
|
* @details If enabled then the trace buffer is activated.
|
||||||
|
*
|
||||||
|
* @note The default is @p CH_DBG_TRACE_MASK_DISABLED.
|
||||||
|
*/
|
||||||
|
#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_ALL
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Trace buffer entries.
|
||||||
|
* @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is
|
||||||
|
* different from @p CH_DBG_TRACE_MASK_DISABLED.
|
||||||
|
*/
|
||||||
|
#define CH_DBG_TRACE_BUFFER_SIZE 128
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Debug option, stack checks.
|
||||||
|
* @details If enabled then a runtime stack check is performed.
|
||||||
|
*
|
||||||
|
* @note The default is @p FALSE.
|
||||||
|
* @note The stack check is performed in a architecture/port dependent way.
|
||||||
|
* It may not be implemented or some ports.
|
||||||
|
* @note The default failure mode is to halt the system with the global
|
||||||
|
* @p panic_msg variable set to @p NULL.
|
||||||
|
*/
|
||||||
|
#define CH_DBG_ENABLE_STACK_CHECK TRUE
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Debug option, stacks initialization.
|
||||||
|
* @details If enabled then the threads working area is filled with a byte
|
||||||
|
* value when a thread is created. This can be useful for the
|
||||||
|
* runtime measurement of the used stack.
|
||||||
|
*
|
||||||
|
* @note The default is @p FALSE.
|
||||||
|
*/
|
||||||
|
#define CH_DBG_FILL_THREADS TRUE
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Debug option, threads profiling.
|
||||||
|
* @details If enabled then a field is added to the @p thread_t structure that
|
||||||
|
* counts the system ticks occurred while executing the thread.
|
||||||
|
*
|
||||||
|
* @note The default is @p FALSE.
|
||||||
|
* @note This debug option is not currently compatible with the
|
||||||
|
* tickless mode.
|
||||||
|
*/
|
||||||
|
#define CH_DBG_THREADS_PROFILING FALSE
|
||||||
|
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/**
|
||||||
|
* @name Kernel hooks
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Threads descriptor structure extension.
|
||||||
|
* @details User fields added to the end of the @p thread_t structure.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_THREAD_EXTRA_FIELDS \
|
||||||
|
/* Add threads custom fields here.*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Threads initialization hook.
|
||||||
|
* @details User initialization code added to the @p chThdInit() API.
|
||||||
|
*
|
||||||
|
* @note It is invoked from within @p chThdInit() and implicitly from all
|
||||||
|
* the threads creation APIs.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_THREAD_INIT_HOOK(tp) { \
|
||||||
|
/* Add threads initialization code here.*/ \
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Threads finalization hook.
|
||||||
|
* @details User finalization code added to the @p chThdExit() API.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_THREAD_EXIT_HOOK(tp) { \
|
||||||
|
/* Add threads finalization code here.*/ \
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Context switch hook.
|
||||||
|
* @details This hook is invoked just before switching between threads.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \
|
||||||
|
/* Context switch code here.*/ \
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief ISR enter hook.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_IRQ_PROLOGUE_HOOK() { \
|
||||||
|
/* IRQ prologue code here.*/ \
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief ISR exit hook.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_IRQ_EPILOGUE_HOOK() { \
|
||||||
|
/* IRQ epilogue code here.*/ \
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Idle thread enter hook.
|
||||||
|
* @note This hook is invoked within a critical zone, no OS functions
|
||||||
|
* should be invoked from here.
|
||||||
|
* @note This macro can be used to activate a power saving mode.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_IDLE_ENTER_HOOK() { \
|
||||||
|
/* Idle-enter code here.*/ \
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Idle thread leave hook.
|
||||||
|
* @note This hook is invoked within a critical zone, no OS functions
|
||||||
|
* should be invoked from here.
|
||||||
|
* @note This macro can be used to deactivate a power saving mode.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_IDLE_LEAVE_HOOK() { \
|
||||||
|
/* Idle-leave code here.*/ \
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Idle Loop hook.
|
||||||
|
* @details This hook is continuously invoked by the idle thread loop.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_IDLE_LOOP_HOOK() { \
|
||||||
|
/* Idle loop code here.*/ \
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief System tick event hook.
|
||||||
|
* @details This hook is invoked in the system tick handler immediately
|
||||||
|
* after processing the virtual timers queue.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_SYSTEM_TICK_HOOK() { \
|
||||||
|
/* System tick event code here.*/ \
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief System halt hook.
|
||||||
|
* @details This hook is invoked in case to a system halting error before
|
||||||
|
* the system is halted.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \
|
||||||
|
/* System halt code here.*/ \
|
||||||
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Trace hook.
|
||||||
|
* @details This hook is invoked each time a new record is written in the
|
||||||
|
* trace buffer.
|
||||||
|
*/
|
||||||
|
#define CH_CFG_TRACE_HOOK(tep) { \
|
||||||
|
/* Trace code here.*/ \
|
||||||
|
}
|
||||||
|
|
||||||
|
/** @} */
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/* Port-specific settings (override port settings defaulted in chcore.h). */
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
#endif /* CHCONF_H */
|
||||||
|
|
||||||
|
/** @} */
|
|
@ -0,0 +1,387 @@
|
||||||
|
/*
|
||||||
|
ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
|
||||||
|
|
||||||
|
Licensed under the Apache License, Version 2.0 (the "License");
|
||||||
|
you may not use this file except in compliance with the License.
|
||||||
|
You may obtain a copy of the License at
|
||||||
|
|
||||||
|
http://www.apache.org/licenses/LICENSE-2.0
|
||||||
|
|
||||||
|
Unless required by applicable law or agreed to in writing, software
|
||||||
|
distributed under the License is distributed on an "AS IS" BASIS,
|
||||||
|
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||||
|
See the License for the specific language governing permissions and
|
||||||
|
limitations under the License.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @file templates/halconf.h
|
||||||
|
* @brief HAL configuration header.
|
||||||
|
* @details HAL configuration file, this file allows to enable or disable the
|
||||||
|
* various device drivers from your application. You may also use
|
||||||
|
* this file in order to override the device drivers default settings.
|
||||||
|
*
|
||||||
|
* @addtogroup HAL_CONF
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef HALCONF_H
|
||||||
|
#define HALCONF_H
|
||||||
|
|
||||||
|
#include "mcuconf.h"
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the PAL subsystem.
|
||||||
|
*/
|
||||||
|
#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
|
||||||
|
#define HAL_USE_PAL TRUE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the ADC subsystem.
|
||||||
|
*/
|
||||||
|
#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
|
||||||
|
#define HAL_USE_ADC FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the CAN subsystem.
|
||||||
|
*/
|
||||||
|
#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
|
||||||
|
#define HAL_USE_CAN FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the DAC subsystem.
|
||||||
|
*/
|
||||||
|
#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
|
||||||
|
#define HAL_USE_DAC TRUE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the EXT subsystem.
|
||||||
|
*/
|
||||||
|
#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
|
||||||
|
#define HAL_USE_EXT TRUE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the GPT subsystem.
|
||||||
|
*/
|
||||||
|
#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
|
||||||
|
#define HAL_USE_GPT TRUE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the I2C subsystem.
|
||||||
|
*/
|
||||||
|
#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
|
||||||
|
#define HAL_USE_I2C FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the I2S subsystem.
|
||||||
|
*/
|
||||||
|
#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)
|
||||||
|
#define HAL_USE_I2S FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the ICU subsystem.
|
||||||
|
*/
|
||||||
|
#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
|
||||||
|
#define HAL_USE_ICU FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the MAC subsystem.
|
||||||
|
*/
|
||||||
|
#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
|
||||||
|
#define HAL_USE_MAC FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the MMC_SPI subsystem.
|
||||||
|
*/
|
||||||
|
#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
|
||||||
|
#define HAL_USE_MMC_SPI FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the PWM subsystem.
|
||||||
|
*/
|
||||||
|
#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
|
||||||
|
#define HAL_USE_PWM FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the RTC subsystem.
|
||||||
|
*/
|
||||||
|
#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
|
||||||
|
#define HAL_USE_RTC FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the SDC subsystem.
|
||||||
|
*/
|
||||||
|
#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
|
||||||
|
#define HAL_USE_SDC FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the SERIAL subsystem.
|
||||||
|
*/
|
||||||
|
#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
|
||||||
|
#define HAL_USE_SERIAL FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the SERIAL over USB subsystem.
|
||||||
|
*/
|
||||||
|
#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
|
||||||
|
#define HAL_USE_SERIAL_USB FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the SPI subsystem.
|
||||||
|
*/
|
||||||
|
#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
|
||||||
|
#define HAL_USE_SPI FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the UART subsystem.
|
||||||
|
*/
|
||||||
|
#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
|
||||||
|
#define HAL_USE_UART FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the USB subsystem.
|
||||||
|
*/
|
||||||
|
#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
|
||||||
|
#define HAL_USE_USB FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the WDG subsystem.
|
||||||
|
*/
|
||||||
|
#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__)
|
||||||
|
#define HAL_USE_WDG FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/* ADC driver related settings. */
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables synchronous APIs.
|
||||||
|
* @note Disabling this option saves both code and data space.
|
||||||
|
*/
|
||||||
|
#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
|
||||||
|
#define ADC_USE_WAIT TRUE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
|
||||||
|
* @note Disabling this option saves both code and data space.
|
||||||
|
*/
|
||||||
|
#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
|
||||||
|
#define ADC_USE_MUTUAL_EXCLUSION TRUE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/* CAN driver related settings. */
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Sleep mode related APIs inclusion switch.
|
||||||
|
*/
|
||||||
|
#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
|
||||||
|
#define CAN_USE_SLEEP_MODE TRUE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/* I2C driver related settings. */
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the mutual exclusion APIs on the I2C bus.
|
||||||
|
*/
|
||||||
|
#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
|
||||||
|
#define I2C_USE_MUTUAL_EXCLUSION TRUE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/* MAC driver related settings. */
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables an event sources for incoming packets.
|
||||||
|
*/
|
||||||
|
#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
|
||||||
|
#define MAC_USE_ZERO_COPY FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables an event sources for incoming packets.
|
||||||
|
*/
|
||||||
|
#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
|
||||||
|
#define MAC_USE_EVENTS TRUE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/* MMC_SPI driver related settings. */
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Delays insertions.
|
||||||
|
* @details If enabled this options inserts delays into the MMC waiting
|
||||||
|
* routines releasing some extra CPU time for the threads with
|
||||||
|
* lower priority, this may slow down the driver a bit however.
|
||||||
|
* This option is recommended also if the SPI driver does not
|
||||||
|
* use a DMA channel and heavily loads the CPU.
|
||||||
|
*/
|
||||||
|
#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
|
||||||
|
#define MMC_NICE_WAITING TRUE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/* SDC driver related settings. */
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Number of initialization attempts before rejecting the card.
|
||||||
|
* @note Attempts are performed at 10mS intervals.
|
||||||
|
*/
|
||||||
|
#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
|
||||||
|
#define SDC_INIT_RETRY 100
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Include support for MMC cards.
|
||||||
|
* @note MMC support is not yet implemented so this option must be kept
|
||||||
|
* at @p FALSE.
|
||||||
|
*/
|
||||||
|
#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
|
||||||
|
#define SDC_MMC_SUPPORT FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Delays insertions.
|
||||||
|
* @details If enabled this options inserts delays into the MMC waiting
|
||||||
|
* routines releasing some extra CPU time for the threads with
|
||||||
|
* lower priority, this may slow down the driver a bit however.
|
||||||
|
*/
|
||||||
|
#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
|
||||||
|
#define SDC_NICE_WAITING TRUE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/* SERIAL driver related settings. */
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Default bit rate.
|
||||||
|
* @details Configuration parameter, this is the baud rate selected for the
|
||||||
|
* default configuration.
|
||||||
|
*/
|
||||||
|
#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
|
||||||
|
#define SERIAL_DEFAULT_BITRATE 38400
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Serial buffers size.
|
||||||
|
* @details Configuration parameter, you can change the depth of the queue
|
||||||
|
* buffers depending on the requirements of your application.
|
||||||
|
* @note The default is 16 bytes for both the transmission and receive
|
||||||
|
* buffers.
|
||||||
|
*/
|
||||||
|
#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
|
||||||
|
#define SERIAL_BUFFERS_SIZE 16
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/* SERIAL_USB driver related setting. */
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Serial over USB buffers size.
|
||||||
|
* @details Configuration parameter, the buffer size must be a multiple of
|
||||||
|
* the USB data endpoint maximum packet size.
|
||||||
|
* @note The default is 256 bytes for both the transmission and receive
|
||||||
|
* buffers.
|
||||||
|
*/
|
||||||
|
#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__)
|
||||||
|
#define SERIAL_USB_BUFFERS_SIZE 256
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Serial over USB number of buffers.
|
||||||
|
* @note The default is 2 buffers.
|
||||||
|
*/
|
||||||
|
#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__)
|
||||||
|
#define SERIAL_USB_BUFFERS_NUMBER 2
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/* SPI driver related settings. */
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables synchronous APIs.
|
||||||
|
* @note Disabling this option saves both code and data space.
|
||||||
|
*/
|
||||||
|
#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
|
||||||
|
#define SPI_USE_WAIT TRUE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
|
||||||
|
* @note Disabling this option saves both code and data space.
|
||||||
|
*/
|
||||||
|
#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
|
||||||
|
#define SPI_USE_MUTUAL_EXCLUSION TRUE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/* UART driver related settings. */
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables synchronous APIs.
|
||||||
|
* @note Disabling this option saves both code and data space.
|
||||||
|
*/
|
||||||
|
#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__)
|
||||||
|
#define UART_USE_WAIT FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs.
|
||||||
|
* @note Disabling this option saves both code and data space.
|
||||||
|
*/
|
||||||
|
#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
|
||||||
|
#define UART_USE_MUTUAL_EXCLUSION FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/* USB driver related settings. */
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables synchronous APIs.
|
||||||
|
* @note Disabling this option saves both code and data space.
|
||||||
|
*/
|
||||||
|
#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__)
|
||||||
|
#define USB_USE_WAIT FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/* Community drivers's includes */
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
#include "halconf_community.h"
|
||||||
|
|
||||||
|
#endif /* HALCONF_H */
|
||||||
|
|
||||||
|
/** @} */
|
|
@ -0,0 +1,134 @@
|
||||||
|
/*
|
||||||
|
ChibiOS - Copyright (C) 2014 Uladzimir Pylinsky aka barthess
|
||||||
|
|
||||||
|
Licensed under the Apache License, Version 2.0 (the "License");
|
||||||
|
you may not use this file except in compliance with the License.
|
||||||
|
You may obtain a copy of the License at
|
||||||
|
|
||||||
|
http://www.apache.org/licenses/LICENSE-2.0
|
||||||
|
|
||||||
|
Unless required by applicable law or agreed to in writing, software
|
||||||
|
distributed under the License is distributed on an "AS IS" BASIS,
|
||||||
|
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||||
|
See the License for the specific language governing permissions and
|
||||||
|
limitations under the License.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef HALCONF_COMMUNITY_H
|
||||||
|
#define HALCONF_COMMUNITY_H
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the community overlay.
|
||||||
|
*/
|
||||||
|
#if !defined(HAL_USE_COMMUNITY) || defined(__DOXYGEN__)
|
||||||
|
#define HAL_USE_COMMUNITY TRUE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the FSMC subsystem.
|
||||||
|
*/
|
||||||
|
#if !defined(HAL_USE_FSMC) || defined(__DOXYGEN__)
|
||||||
|
#define HAL_USE_FSMC FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the NAND subsystem.
|
||||||
|
*/
|
||||||
|
#if !defined(HAL_USE_NAND) || defined(__DOXYGEN__)
|
||||||
|
#define HAL_USE_NAND FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the 1-wire subsystem.
|
||||||
|
*/
|
||||||
|
#if !defined(HAL_USE_ONEWIRE) || defined(__DOXYGEN__)
|
||||||
|
#define HAL_USE_ONEWIRE FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the EICU subsystem.
|
||||||
|
*/
|
||||||
|
#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__)
|
||||||
|
#define HAL_USE_EICU FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the CRC subsystem.
|
||||||
|
*/
|
||||||
|
#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__)
|
||||||
|
#define HAL_USE_CRC FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the RNG subsystem.
|
||||||
|
*/
|
||||||
|
#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__)
|
||||||
|
#define HAL_USE_RNG FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the EEPROM subsystem.
|
||||||
|
*/
|
||||||
|
#if !defined(HAL_USE_EEPROM) || defined(__DOXYGEN__)
|
||||||
|
#define HAL_USE_EEPROM FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the TIMCAP subsystem.
|
||||||
|
*/
|
||||||
|
#if !defined(HAL_USE_TIMCAP) || defined(__DOXYGEN__)
|
||||||
|
#define HAL_USE_TIMCAP FALSE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the TIMCAP subsystem.
|
||||||
|
*/
|
||||||
|
#if !defined(HAL_USE_COMP) || defined(__DOXYGEN__)
|
||||||
|
#define HAL_USE_COMP TRUE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/* FSMCNAND driver related settings. */
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables the @p nandAcquireBus() and @p nanReleaseBus() APIs.
|
||||||
|
* @note Disabling this option saves both code and data space.
|
||||||
|
*/
|
||||||
|
#if !defined(NAND_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
|
||||||
|
#define NAND_USE_MUTUAL_EXCLUSION TRUE
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/* 1-wire driver related settings. */
|
||||||
|
/*===========================================================================*/
|
||||||
|
/**
|
||||||
|
* @brief Enables strong pull up feature.
|
||||||
|
* @note Disabling this option saves both code and data space.
|
||||||
|
*/
|
||||||
|
#define ONEWIRE_USE_STRONG_PULLUP FALSE
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables search ROM feature.
|
||||||
|
* @note Disabling this option saves both code and data space.
|
||||||
|
*/
|
||||||
|
#define ONEWIRE_USE_SEARCH_ROM TRUE
|
||||||
|
|
||||||
|
/*===========================================================================*/
|
||||||
|
/* EEProm driver related settings. */
|
||||||
|
/*===========================================================================*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief Enables 24xx series I2C eeprom device driver.
|
||||||
|
* @note Disabling this option saves both code and data space.
|
||||||
|
*/
|
||||||
|
#define EEPROM_USE_EE24XX TRUE
|
||||||
|
/**
|
||||||
|
* @brief Enables 25xx series SPI eeprom device driver.
|
||||||
|
* @note Disabling this option saves both code and data space.
|
||||||
|
*/
|
||||||
|
#define EEPROM_USE_EE25XX TRUE
|
||||||
|
|
||||||
|
#endif /* HALCONF_COMMUNITY_H */
|
||||||
|
|
||||||
|
/** @} */
|
|
@ -0,0 +1,145 @@
|
||||||
|
/*
|
||||||
|
ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
|
||||||
|
|
||||||
|
Licensed under the Apache License, Version 2.0 (the "License");
|
||||||
|
you may not use this file except in compliance with the License.
|
||||||
|
You may obtain a copy of the License at
|
||||||
|
|
||||||
|
http://www.apache.org/licenses/LICENSE-2.0
|
||||||
|
|
||||||
|
Unless required by applicable law or agreed to in writing, software
|
||||||
|
distributed under the License is distributed on an "AS IS" BASIS,
|
||||||
|
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||||
|
See the License for the specific language governing permissions and
|
||||||
|
limitations under the License.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include "ch.h"
|
||||||
|
#include "hal.h"
|
||||||
|
|
||||||
|
#define DAC_BUFFER_SIZE 360
|
||||||
|
|
||||||
|
/*
|
||||||
|
* DAC test buffer (sine wave).
|
||||||
|
*/
|
||||||
|
static const dacsample_t dac_buffer[DAC_BUFFER_SIZE] = {
|
||||||
|
2047, 2082, 2118, 2154, 2189, 2225, 2260, 2296, 2331, 2367, 2402, 2437,
|
||||||
|
2472, 2507, 2542, 2576, 2611, 2645, 2679, 2713, 2747, 2780, 2813, 2846,
|
||||||
|
2879, 2912, 2944, 2976, 3008, 3039, 3070, 3101, 3131, 3161, 3191, 3221,
|
||||||
|
3250, 3278, 3307, 3335, 3362, 3389, 3416, 3443, 3468, 3494, 3519, 3544,
|
||||||
|
3568, 3591, 3615, 3637, 3660, 3681, 3703, 3723, 3744, 3763, 3782, 3801,
|
||||||
|
3819, 3837, 3854, 3870, 3886, 3902, 3917, 3931, 3944, 3958, 3970, 3982,
|
||||||
|
3993, 4004, 4014, 4024, 4033, 4041, 4049, 4056, 4062, 4068, 4074, 4078,
|
||||||
|
4082, 4086, 4089, 4091, 4092, 4093, 4094, 4093, 4092, 4091, 4089, 4086,
|
||||||
|
4082, 4078, 4074, 4068, 4062, 4056, 4049, 4041, 4033, 4024, 4014, 4004,
|
||||||
|
3993, 3982, 3970, 3958, 3944, 3931, 3917, 3902, 3886, 3870, 3854, 3837,
|
||||||
|
3819, 3801, 3782, 3763, 3744, 3723, 3703, 3681, 3660, 3637, 3615, 3591,
|
||||||
|
3568, 3544, 3519, 3494, 3468, 3443, 3416, 3389, 3362, 3335, 3307, 3278,
|
||||||
|
3250, 3221, 3191, 3161, 3131, 3101, 3070, 3039, 3008, 2976, 2944, 2912,
|
||||||
|
2879, 2846, 2813, 2780, 2747, 2713, 2679, 2645, 2611, 2576, 2542, 2507,
|
||||||
|
2472, 2437, 2402, 2367, 2331, 2296, 2260, 2225, 2189, 2154, 2118, 2082,
|
||||||
|
2047, 2012, 1976, 1940, 1905, 1869, 1834, 1798, 1763, 1727, 1692, 1657,
|
||||||
|
1622, 1587, 1552, 1518, 1483, 1449, 1415, 1381, 1347, 1314, 1281, 1248,
|
||||||
|
1215, 1182, 1150, 1118, 1086, 1055, 1024, 993, 963, 933, 903, 873,
|
||||||
|
844, 816, 787, 759, 732, 705, 678, 651, 626, 600, 575, 550,
|
||||||
|
526, 503, 479, 457, 434, 413, 391, 371, 350, 331, 312, 293,
|
||||||
|
275, 257, 240, 224, 208, 192, 177, 163, 150, 136, 124, 112,
|
||||||
|
101, 90, 80, 70, 61, 53, 45, 38, 32, 26, 20, 16,
|
||||||
|
12, 8, 5, 3, 2, 1, 0, 1, 2, 3, 5, 8,
|
||||||
|
12, 16, 20, 26, 32, 38, 45, 53, 61, 70, 80, 90,
|
||||||
|
101, 112, 124, 136, 150, 163, 177, 192, 208, 224, 240, 257,
|
||||||
|
275, 293, 312, 331, 350, 371, 391, 413, 434, 457, 479, 503,
|
||||||
|
526, 550, 575, 600, 626, 651, 678, 705, 732, 759, 787, 816,
|
||||||
|
844, 873, 903, 933, 963, 993, 1024, 1055, 1086, 1118, 1150, 1182,
|
||||||
|
1215, 1248, 1281, 1314, 1347, 1381, 1415, 1449, 1483, 1518, 1552, 1587,
|
||||||
|
1622, 1657, 1692, 1727, 1763, 1798, 1834, 1869, 1905, 1940, 1976, 2012
|
||||||
|
};
|
||||||
|
|
||||||
|
static const DACConfig dac1cfg1 = {
|
||||||
|
.init = 2047U,
|
||||||
|
.datamode = DAC_DHRM_12BIT_RIGHT,
|
||||||
|
.cr = 0
|
||||||
|
};
|
||||||
|
|
||||||
|
static const DACConversionGroup dacgrpcfg1 = {
|
||||||
|
.num_channels = 1U,
|
||||||
|
.end_cb = NULL,
|
||||||
|
.error_cb = NULL,
|
||||||
|
.trigger = DAC_TRG(0)
|
||||||
|
};
|
||||||
|
|
||||||
|
/*
|
||||||
|
* GPT6 configuration.
|
||||||
|
*/
|
||||||
|
static const GPTConfig gpt6cfg1 = {
|
||||||
|
.frequency = 10000U,
|
||||||
|
.callback = NULL,
|
||||||
|
.cr2 = TIM_CR2_MMS_1, /* MMS = 010 = TRGO on Update Event. */
|
||||||
|
.dier = 0U
|
||||||
|
};
|
||||||
|
|
||||||
|
void comp2_cb(COMPDriver *comp) {
|
||||||
|
|
||||||
|
/* Check if output is high (rising) */
|
||||||
|
if (comp->reg->CSR & COMP_CSR_COMPxOUT) {
|
||||||
|
|
||||||
|
palToggleLine(LINE_LED9_BLUE);
|
||||||
|
}
|
||||||
|
|
||||||
|
}
|
||||||
|
|
||||||
|
static const COMPConfig comp2_conf = {
|
||||||
|
COMP_OUTPUT_NORMAL,
|
||||||
|
COMP_IRQ_RISING,
|
||||||
|
comp2_cb,
|
||||||
|
STM32_COMP_InvertingInput_VREFINT |
|
||||||
|
STM32_COMP_NonInvertingInput_IO2 |
|
||||||
|
STM32_COMP_Hysteresis_High // CSR
|
||||||
|
};
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Application entry point.
|
||||||
|
*/
|
||||||
|
int main(void) {
|
||||||
|
|
||||||
|
halInit();
|
||||||
|
chSysInit();
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Set PA3 - PA4 to Analog (DAC1_CH1, COMP2_INP)
|
||||||
|
* You will have to connect these with a jumper wire
|
||||||
|
*/
|
||||||
|
palSetPadMode(GPIOA, 3, PAL_MODE_INPUT_ANALOG);
|
||||||
|
palSetPadMode(GPIOA, 4, PAL_MODE_INPUT_ANALOG);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Set PA2 to alternate 8 (COMP2_OUT)
|
||||||
|
* You can connect this to an oscilloscope along with PA4 to compare input/output.
|
||||||
|
*/
|
||||||
|
palSetPadMode(GPIOA, 2, PAL_MODE_ALTERNATE(8));
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Start peripherals
|
||||||
|
*/
|
||||||
|
dacStart(&DACD1, &dac1cfg1);
|
||||||
|
compStart(&COMPD2, &comp2_conf);
|
||||||
|
gptStart(&GPTD6, &gpt6cfg1);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Starting a continuous conversion.
|
||||||
|
*/
|
||||||
|
dacStartConversion(&DACD1, &dacgrpcfg1, dac_buffer, DAC_BUFFER_SIZE);
|
||||||
|
gptStartContinuous(&GPTD6, 2U);
|
||||||
|
|
||||||
|
compEnable(&COMPD2);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Normal main() thread activity.
|
||||||
|
*/
|
||||||
|
while (true) {
|
||||||
|
|
||||||
|
chThdSleepMilliseconds(250);
|
||||||
|
palToggleLine(LINE_LED3_RED);
|
||||||
|
}
|
||||||
|
return 0;
|
||||||
|
}
|
|
@ -0,0 +1,258 @@
|
||||||
|
/*
|
||||||
|
ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
|
||||||
|
|
||||||
|
Licensed under the Apache License, Version 2.0 (the "License");
|
||||||
|
you may not use this file except in compliance with the License.
|
||||||
|
You may obtain a copy of the License at
|
||||||
|
|
||||||
|
http://www.apache.org/licenses/LICENSE-2.0
|
||||||
|
|
||||||
|
Unless required by applicable law or agreed to in writing, software
|
||||||
|
distributed under the License is distributed on an "AS IS" BASIS,
|
||||||
|
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||||
|
See the License for the specific language governing permissions and
|
||||||
|
limitations under the License.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef MCUCONF_H
|
||||||
|
#define MCUCONF_H
|
||||||
|
|
||||||
|
/*
|
||||||
|
* STM32F3xx drivers configuration.
|
||||||
|
* The following settings override the default settings present in
|
||||||
|
* the various device driver implementation headers.
|
||||||
|
* Note that the settings for each driver only have effect if the whole
|
||||||
|
* driver is enabled in halconf.h.
|
||||||
|
*
|
||||||
|
* IRQ priorities:
|
||||||
|
* 15...0 Lowest...Highest.
|
||||||
|
*
|
||||||
|
* DMA priorities:
|
||||||
|
* 0...3 Lowest...Highest.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define STM32F3xx_MCUCONF
|
||||||
|
|
||||||
|
/*
|
||||||
|
* HAL driver system settings.
|
||||||
|
*/
|
||||||
|
#define STM32_NO_INIT FALSE
|
||||||
|
#define STM32_PVD_ENABLE FALSE
|
||||||
|
#define STM32_PLS STM32_PLS_LEV0
|
||||||
|
#define STM32_HSI_ENABLED TRUE
|
||||||
|
#define STM32_LSI_ENABLED TRUE
|
||||||
|
#define STM32_HSE_ENABLED TRUE
|
||||||
|
#define STM32_LSE_ENABLED FALSE
|
||||||
|
#define STM32_SW STM32_SW_PLL
|
||||||
|
#define STM32_PLLSRC STM32_PLLSRC_HSE
|
||||||
|
#define STM32_PREDIV_VALUE 1
|
||||||
|
#define STM32_PLLMUL_VALUE 9
|
||||||
|
#define STM32_HPRE STM32_HPRE_DIV1
|
||||||
|
#define STM32_PPRE1 STM32_PPRE1_DIV2
|
||||||
|
#define STM32_PPRE2 STM32_PPRE2_DIV2
|
||||||
|
#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK
|
||||||
|
#define STM32_ADC12PRES STM32_ADC12PRES_DIV1
|
||||||
|
#define STM32_ADC34PRES STM32_ADC34PRES_DIV1
|
||||||
|
#define STM32_USART1SW STM32_USART1SW_PCLK
|
||||||
|
#define STM32_USART2SW STM32_USART2SW_PCLK
|
||||||
|
#define STM32_USART3SW STM32_USART3SW_PCLK
|
||||||
|
#define STM32_UART4SW STM32_UART4SW_PCLK
|
||||||
|
#define STM32_UART5SW STM32_UART5SW_PCLK
|
||||||
|
#define STM32_I2C1SW STM32_I2C1SW_SYSCLK
|
||||||
|
#define STM32_I2C2SW STM32_I2C2SW_SYSCLK
|
||||||
|
#define STM32_TIM1SW STM32_TIM1SW_PCLK2
|
||||||
|
#define STM32_TIM8SW STM32_TIM8SW_PCLK2
|
||||||
|
#define STM32_RTCSEL STM32_RTCSEL_LSI
|
||||||
|
#define STM32_USB_CLOCK_REQUIRED TRUE
|
||||||
|
#define STM32_USBPRE STM32_USBPRE_DIV1P5
|
||||||
|
|
||||||
|
/*
|
||||||
|
* ADC driver system settings.
|
||||||
|
*/
|
||||||
|
#define STM32_ADC_DUAL_MODE FALSE
|
||||||
|
#define STM32_ADC_COMPACT_SAMPLES FALSE
|
||||||
|
#define STM32_ADC_USE_ADC1 FALSE
|
||||||
|
#define STM32_ADC_USE_ADC2 FALSE
|
||||||
|
#define STM32_ADC_USE_ADC3 FALSE
|
||||||
|
#define STM32_ADC_USE_ADC4 FALSE
|
||||||
|
#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(1, 1)
|
||||||
|
#define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 1)
|
||||||
|
#define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
|
||||||
|
#define STM32_ADC_ADC4_DMA_STREAM STM32_DMA_STREAM_ID(2, 2)
|
||||||
|
#define STM32_ADC_ADC1_DMA_PRIORITY 2
|
||||||
|
#define STM32_ADC_ADC2_DMA_PRIORITY 2
|
||||||
|
#define STM32_ADC_ADC3_DMA_PRIORITY 2
|
||||||
|
#define STM32_ADC_ADC4_DMA_PRIORITY 2
|
||||||
|
#define STM32_ADC_ADC12_IRQ_PRIORITY 5
|
||||||
|
#define STM32_ADC_ADC3_IRQ_PRIORITY 5
|
||||||
|
#define STM32_ADC_ADC4_IRQ_PRIORITY 5
|
||||||
|
#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5
|
||||||
|
#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 5
|
||||||
|
#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 5
|
||||||
|
#define STM32_ADC_ADC4_DMA_IRQ_PRIORITY 5
|
||||||
|
#define STM32_ADC_ADC12_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1
|
||||||
|
#define STM32_ADC_ADC34_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1
|
||||||
|
|
||||||
|
/*
|
||||||
|
* CAN driver system settings.
|
||||||
|
*/
|
||||||
|
#define STM32_CAN_USE_CAN1 TRUE
|
||||||
|
#define STM32_CAN_CAN1_IRQ_PRIORITY 11
|
||||||
|
|
||||||
|
/*
|
||||||
|
* DAC driver system settings.
|
||||||
|
*/
|
||||||
|
#define STM32_DAC_DUAL_MODE FALSE
|
||||||
|
#define STM32_DAC_USE_DAC1_CH1 TRUE
|
||||||
|
#define STM32_DAC_USE_DAC1_CH2 FALSE
|
||||||
|
#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 10
|
||||||
|
#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY 10
|
||||||
|
#define STM32_DAC_DAC1_CH1_DMA_PRIORITY 2
|
||||||
|
#define STM32_DAC_DAC1_CH2_DMA_PRIORITY 2
|
||||||
|
|
||||||
|
/*
|
||||||
|
* EXT driver system settings.
|
||||||
|
*/
|
||||||
|
#define STM32_EXT_EXTI0_IRQ_PRIORITY 6
|
||||||
|
#define STM32_EXT_EXTI1_IRQ_PRIORITY 6
|
||||||
|
#define STM32_EXT_EXTI2_IRQ_PRIORITY 6
|
||||||
|
#define STM32_EXT_EXTI3_IRQ_PRIORITY 6
|
||||||
|
#define STM32_EXT_EXTI4_IRQ_PRIORITY 6
|
||||||
|
#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6
|
||||||
|
#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6
|
||||||
|
#define STM32_EXT_EXTI16_IRQ_PRIORITY 6
|
||||||
|
#define STM32_EXT_EXTI17_IRQ_PRIORITY 6
|
||||||
|
#define STM32_EXT_EXTI18_IRQ_PRIORITY 6
|
||||||
|
#define STM32_EXT_EXTI19_IRQ_PRIORITY 6
|
||||||
|
#define STM32_EXT_EXTI20_IRQ_PRIORITY 6
|
||||||
|
#define STM32_EXT_EXTI21_22_29_IRQ_PRIORITY 6
|
||||||
|
#define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6
|
||||||
|
#define STM32_EXT_EXTI33_IRQ_PRIORITY 6
|
||||||
|
|
||||||
|
/*
|
||||||
|
* GPT driver system settings.
|
||||||
|
*/
|
||||||
|
#define STM32_GPT_USE_TIM1 FALSE
|
||||||
|
#define STM32_GPT_USE_TIM2 FALSE
|
||||||
|
#define STM32_GPT_USE_TIM3 FALSE
|
||||||
|
#define STM32_GPT_USE_TIM4 FALSE
|
||||||
|
#define STM32_GPT_USE_TIM6 TRUE
|
||||||
|
#define STM32_GPT_USE_TIM7 FALSE
|
||||||
|
#define STM32_GPT_USE_TIM8 FALSE
|
||||||
|
#define STM32_GPT_TIM1_IRQ_PRIORITY 7
|
||||||
|
#define STM32_GPT_TIM2_IRQ_PRIORITY 7
|
||||||
|
#define STM32_GPT_TIM3_IRQ_PRIORITY 7
|
||||||
|
#define STM32_GPT_TIM4_IRQ_PRIORITY 7
|
||||||
|
#define STM32_GPT_TIM6_IRQ_PRIORITY 7
|
||||||
|
#define STM32_GPT_TIM7_IRQ_PRIORITY 7
|
||||||
|
#define STM32_GPT_TIM8_IRQ_PRIORITY 7
|
||||||
|
|
||||||
|
/*
|
||||||
|
* I2C driver system settings.
|
||||||
|
*/
|
||||||
|
#define STM32_I2C_USE_I2C1 TRUE
|
||||||
|
#define STM32_I2C_USE_I2C2 FALSE
|
||||||
|
#define STM32_I2C_BUSY_TIMEOUT 50
|
||||||
|
#define STM32_I2C_I2C1_IRQ_PRIORITY 10
|
||||||
|
#define STM32_I2C_I2C2_IRQ_PRIORITY 10
|
||||||
|
#define STM32_I2C_USE_DMA TRUE
|
||||||
|
#define STM32_I2C_I2C1_DMA_PRIORITY 1
|
||||||
|
#define STM32_I2C_I2C2_DMA_PRIORITY 1
|
||||||
|
#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
|
||||||
|
|
||||||
|
/*
|
||||||
|
* ICU driver system settings.
|
||||||
|
*/
|
||||||
|
#define STM32_ICU_USE_TIM1 FALSE
|
||||||
|
#define STM32_ICU_USE_TIM2 FALSE
|
||||||
|
#define STM32_ICU_USE_TIM3 FALSE
|
||||||
|
#define STM32_ICU_USE_TIM4 FALSE
|
||||||
|
#define STM32_ICU_USE_TIM8 FALSE
|
||||||
|
#define STM32_ICU_TIM1_IRQ_PRIORITY 7
|
||||||
|
#define STM32_ICU_TIM2_IRQ_PRIORITY 7
|
||||||
|
#define STM32_ICU_TIM3_IRQ_PRIORITY 7
|
||||||
|
#define STM32_ICU_TIM4_IRQ_PRIORITY 7
|
||||||
|
#define STM32_ICU_TIM8_IRQ_PRIORITY 7
|
||||||
|
|
||||||
|
/*
|
||||||
|
* PWM driver system settings.
|
||||||
|
*/
|
||||||
|
#define STM32_PWM_USE_ADVANCED FALSE
|
||||||
|
#define STM32_PWM_USE_TIM1 FALSE
|
||||||
|
#define STM32_PWM_USE_TIM2 FALSE
|
||||||
|
#define STM32_PWM_USE_TIM3 FALSE
|
||||||
|
#define STM32_PWM_USE_TIM4 FALSE
|
||||||
|
#define STM32_PWM_USE_TIM8 FALSE
|
||||||
|
#define STM32_PWM_TIM1_IRQ_PRIORITY 7
|
||||||
|
#define STM32_PWM_TIM2_IRQ_PRIORITY 7
|
||||||
|
#define STM32_PWM_TIM3_IRQ_PRIORITY 7
|
||||||
|
#define STM32_PWM_TIM4_IRQ_PRIORITY 7
|
||||||
|
#define STM32_PWM_TIM8_IRQ_PRIORITY 7
|
||||||
|
|
||||||
|
/*
|
||||||
|
* SERIAL driver system settings.
|
||||||
|
*/
|
||||||
|
#define STM32_SERIAL_USE_USART1 FALSE
|
||||||
|
#define STM32_SERIAL_USE_USART2 FALSE
|
||||||
|
#define STM32_SERIAL_USE_USART3 FALSE
|
||||||
|
#define STM32_SERIAL_USE_UART4 FALSE
|
||||||
|
#define STM32_SERIAL_USE_UART5 FALSE
|
||||||
|
#define STM32_SERIAL_USART1_PRIORITY 12
|
||||||
|
#define STM32_SERIAL_USART2_PRIORITY 12
|
||||||
|
#define STM32_SERIAL_USART3_PRIORITY 12
|
||||||
|
#define STM32_SERIAL_UART4_PRIORITY 12
|
||||||
|
#define STM32_SERIAL_UART5_PRIORITY 12
|
||||||
|
|
||||||
|
/*
|
||||||
|
* SPI driver system settings.
|
||||||
|
*/
|
||||||
|
#define STM32_SPI_USE_SPI1 TRUE
|
||||||
|
#define STM32_SPI_USE_SPI2 FALSE
|
||||||
|
#define STM32_SPI_USE_SPI3 FALSE
|
||||||
|
#define STM32_SPI_SPI1_DMA_PRIORITY 1
|
||||||
|
#define STM32_SPI_SPI2_DMA_PRIORITY 1
|
||||||
|
#define STM32_SPI_SPI3_DMA_PRIORITY 1
|
||||||
|
#define STM32_SPI_SPI1_IRQ_PRIORITY 10
|
||||||
|
#define STM32_SPI_SPI2_IRQ_PRIORITY 10
|
||||||
|
#define STM32_SPI_SPI3_IRQ_PRIORITY 10
|
||||||
|
#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure")
|
||||||
|
|
||||||
|
/*
|
||||||
|
* ST driver system settings.
|
||||||
|
*/
|
||||||
|
#define STM32_ST_IRQ_PRIORITY 8
|
||||||
|
#define STM32_ST_USE_TIMER 2
|
||||||
|
|
||||||
|
/*
|
||||||
|
* UART driver system settings.
|
||||||
|
*/
|
||||||
|
#define STM32_UART_USE_USART1 FALSE
|
||||||
|
#define STM32_UART_USE_USART2 FALSE
|
||||||
|
#define STM32_UART_USE_USART3 FALSE
|
||||||
|
#define STM32_UART_USART1_IRQ_PRIORITY 12
|
||||||
|
#define STM32_UART_USART2_IRQ_PRIORITY 12
|
||||||
|
#define STM32_UART_USART3_IRQ_PRIORITY 12
|
||||||
|
#define STM32_UART_USART1_DMA_PRIORITY 0
|
||||||
|
#define STM32_UART_USART2_DMA_PRIORITY 0
|
||||||
|
#define STM32_UART_USART3_DMA_PRIORITY 0
|
||||||
|
#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure")
|
||||||
|
|
||||||
|
/*
|
||||||
|
* USB driver system settings.
|
||||||
|
*/
|
||||||
|
#define STM32_USB_USE_USB1 FALSE
|
||||||
|
#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE
|
||||||
|
#define STM32_USB_USB1_HP_IRQ_PRIORITY 13
|
||||||
|
#define STM32_USB_USB1_LP_IRQ_PRIORITY 14
|
||||||
|
|
||||||
|
/*
|
||||||
|
* WDG driver system settings.
|
||||||
|
*/
|
||||||
|
#define STM32_WDG_USE_IWDG TRUE
|
||||||
|
|
||||||
|
/*
|
||||||
|
* header for community drivers.
|
||||||
|
*/
|
||||||
|
#include "mcuconf_community.h"
|
||||||
|
|
||||||
|
#endif /* MCUCONF_H */
|
|
@ -0,0 +1,85 @@
|
||||||
|
/*
|
||||||
|
ChibiOS/RT - Copyright (C) 2014 Uladzimir Pylinsky aka barthess
|
||||||
|
|
||||||
|
Licensed under the Apache License, Version 2.0 (the "License");
|
||||||
|
you may not use this file except in compliance with the License.
|
||||||
|
You may obtain a copy of the License at
|
||||||
|
|
||||||
|
http://www.apache.org/licenses/LICENSE-2.0
|
||||||
|
|
||||||
|
Unless required by applicable law or agreed to in writing, software
|
||||||
|
distributed under the License is distributed on an "AS IS" BASIS,
|
||||||
|
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||||
|
See the License for the specific language governing permissions and
|
||||||
|
limitations under the License.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/*
|
||||||
|
* FSMC driver system settings.
|
||||||
|
*/
|
||||||
|
#define STM32_FSMC_USE_FSMC1 FALSE
|
||||||
|
#define STM32_FSMC_FSMC1_IRQ_PRIORITY 10
|
||||||
|
|
||||||
|
/*
|
||||||
|
* FSMC NAND driver system settings.
|
||||||
|
*/
|
||||||
|
#define STM32_NAND_USE_FSMC_NAND1 FALSE
|
||||||
|
#define STM32_NAND_USE_FSMC_NAND2 FALSE
|
||||||
|
#define STM32_NAND_USE_EXT_INT FALSE
|
||||||
|
#define STM32_NAND_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
|
||||||
|
#define STM32_NAND_DMA_PRIORITY 0
|
||||||
|
#define STM32_NAND_DMA_ERROR_HOOK(nandp) osalSysHalt("DMA failure")
|
||||||
|
|
||||||
|
/*
|
||||||
|
* FSMC SRAM driver system settings.
|
||||||
|
*/
|
||||||
|
#define STM32_USE_FSMC_SRAM FALSE
|
||||||
|
#define STM32_SRAM_USE_FSMC_SRAM1 FALSE
|
||||||
|
#define STM32_SRAM_USE_FSMC_SRAM2 FALSE
|
||||||
|
#define STM32_SRAM_USE_FSMC_SRAM3 FALSE
|
||||||
|
#define STM32_SRAM_USE_FSMC_SRAM4 FALSE
|
||||||
|
|
||||||
|
/*
|
||||||
|
* FSMC SDRAM driver system settings.
|
||||||
|
*/
|
||||||
|
#define STM32_USE_FSMC_SDRAM FALSE
|
||||||
|
|
||||||
|
/*
|
||||||
|
* TIMCAP driver system settings.
|
||||||
|
*/
|
||||||
|
#define STM32_TIMCAP_USE_TIM1 FALSE
|
||||||
|
#define STM32_TIMCAP_USE_TIM2 FALSE
|
||||||
|
#define STM32_TIMCAP_USE_TIM3 FALSE
|
||||||
|
#define STM32_TIMCAP_USE_TIM4 FALSE
|
||||||
|
#define STM32_TIMCAP_USE_TIM5 FALSE
|
||||||
|
#define STM32_TIMCAP_USE_TIM8 FALSE
|
||||||
|
#define STM32_TIMCAP_USE_TIM9 FALSE
|
||||||
|
#define STM32_TIMCAP_TIM1_IRQ_PRIORITY 3
|
||||||
|
#define STM32_TIMCAP_TIM2_IRQ_PRIORITY 3
|
||||||
|
#define STM32_TIMCAP_TIM3_IRQ_PRIORITY 3
|
||||||
|
#define STM32_TIMCAP_TIM4_IRQ_PRIORITY 3
|
||||||
|
#define STM32_TIMCAP_TIM5_IRQ_PRIORITY 3
|
||||||
|
#define STM32_TIMCAP_TIM8_IRQ_PRIORITY 3
|
||||||
|
#define STM32_TIMCAP_TIM9_IRQ_PRIORITY 3
|
||||||
|
|
||||||
|
/*
|
||||||
|
* COMP driver system settings.
|
||||||
|
*/
|
||||||
|
#define STM32_COMP_USE_COMP1 TRUE
|
||||||
|
#define STM32_COMP_USE_COMP2 TRUE
|
||||||
|
#define STM32_COMP_USE_COMP3 TRUE
|
||||||
|
#define STM32_COMP_USE_COMP4 TRUE
|
||||||
|
#define STM32_COMP_USE_COMP5 TRUE
|
||||||
|
#define STM32_COMP_USE_COMP6 TRUE
|
||||||
|
#define STM32_COMP_USE_COMP7 TRUE
|
||||||
|
|
||||||
|
#define STM32_COMP_USE_INTERRUPTS TRUE
|
||||||
|
#define STM32_COMP_1_2_3_IRQ_PRIORITY 5
|
||||||
|
#define STM32_COMP_4_5_6_IRQ_PRIORITY 5
|
||||||
|
#define STM32_COMP_7_IRQ_PRIORITY 5
|
||||||
|
|
||||||
|
#if STM32_COMP_USE_INTERRUPTS
|
||||||
|
#define STM32_DISABLE_EXTI21_22_29_HANDLER
|
||||||
|
#define STM32_DISABLE_EXTI30_32_HANDLER
|
||||||
|
#define STM32_DISABLE_EXTI33_HANDLER
|
||||||
|
#endif
|
Loading…
Reference in New Issue