Use OEM CMSIS peripheral access headers
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/**************************************************************************//**
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* @file system_NUC123.h
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* @version V3.0
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* $Revision: 5 $
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* $Date: 15/07/02 11:21a $
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* @brief NUC123 Series CMSIS System Header File
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*
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* @note
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* SPDX-License-Identifier: Apache-2.0
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* Copyright (C) 2014~2015 Nuvoton Technology Corp. All rights reserved.
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*
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******************************************************************************/
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#ifndef __SYSTEM_NUC123_H
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#define __SYSTEM_NUC123_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/*---------------------------------------------------------------------------------------------------------*/
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/* Macro Definition */
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/*---------------------------------------------------------------------------------------------------------*/
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#ifndef DEBUG_PORT
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# define DEBUG_PORT UART0 /*!< Select Debug Port which is used for retarget.c to output debug message to UART */
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#endif
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/*----------------------------------------------------------------------------
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Define SYSCLK
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*----------------------------------------------------------------------------*/
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#define __HXT (12000000UL) /*!< External Crystal Clock Frequency */
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#define __LXT (32768UL) /*!< External Crystal Clock Frequency 32.768KHz */
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#define __HIRC (22118400UL) /*!< Internal 22M RC Oscillator Frequency */
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#define __LIRC (10000UL) /*!< Internal 10K RC Oscillator Frequency */
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#define __HSI (50000000UL) /*!< PLL default output is 50MHz */
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extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
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extern uint32_t CyclesPerUs; /*!< Cycles per micro second */
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extern uint32_t PllClock; /*!< PLL Output Clock Frequency */
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/**
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* Initialize the system
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*
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* @param none
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* @return none
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*
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* @brief Setup the microcontroller system
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* Initialize GPIO directions and values
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*/
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extern void SystemInit(void);
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/**
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* Update SystemCoreClock variable
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*
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* @param none
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* @return none
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*
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* @brief Updates the SystemCoreClock with current core Clock
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* retrieved from CPU registers.
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*/
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extern void SystemCoreClockUpdate(void);
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#ifdef __cplusplus
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}
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#endif
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#endif
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@ -1,75 +0,0 @@
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/**************************************************************************//**
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* @file system_NUC123SD4AN0.h
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* @brief CMSIS Cortex-M0 Device Peripheral Access Layer Header File for
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* Device NUC123SD4AN0
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* @version V5.00
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* @date 13. May 2019
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******************************************************************************/
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/*
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* Copyright (c) 2019 /u/KeepItUnder. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Licensed under the Apache License, Version 2.0 (the License); you may
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* not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an AS IS BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#ifndef SYSTEM_NUC123SD4AN0_H /* ToDo: replace '<Device>' with your device name */
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#define SYSTEM_NUC123SD4AN0_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <stdint.h>
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/**
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* Frequency Defines
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*
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* See NUC123 Technical Reference Manual 5.4.2, page 103
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*
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*/
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#define __HXT (12000000ul) // PCB-mounted High Frequency Crystal (12MHz)
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#define __HIRC (22118400ul) // Internal MCU-block HF Oscillator Frequency (22.1184MHz)
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#define __LXT (32768ul) // PCB-mounted Low Frequency Crystal (32kHz)
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#define __LIRC (10000ul) // Internal MCU-block LF Oscillator Frequency (10kHz)
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#define __HSI (50000000ul) // PLL clock (50MHz)
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extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
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extern uint32_t CyclesPerUs; /*!< Cycles per micro second */
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extern uint32_t PllClock; /*!< PLL Output Clock Frequency */
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/**
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\brief Setup the microcontroller system.
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Initialize the System and update the SystemCoreClock variable.
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*/
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extern void SystemInit (void);
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/**
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\brief Update SystemCoreClock variable.
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Updates the SystemCoreClock with current core Clock retrieved from cpu registers.
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*/
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extern void SystemCoreClockUpdate (void);
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extern void SystemUnlockReg (void);
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#ifdef __cplusplus
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}
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#endif
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#endif /* SYSTEM_NUC123SD4AN0_H */
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/* Including the device CMSIS header. Note, we are not using the definitions
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from this header because we need this file to be usable also from
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assembler source files. We verify that the info matches instead.*/
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// #include "NUC123.h"
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#include "NUC123SD4AN0.h"
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#include "NUC123.h"
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/*lint -save -e9029 [10.4] Signedness comes from external files, it is
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unpredictable but gives no problems.*/
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