Fix Longan Nano Red LED define
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0daa76501f
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@ -55,7 +55,7 @@
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#define LINE_GREEN_LED PAL_LINE(GPIOA, PIN_GREEN_LED)
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#define LINE_GREEN_LED PAL_LINE(GPIOA, PIN_GREEN_LED)
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#define LINE_BLUE_LED PAL_LINE(GPIOA, PIN_BLUE_LED)
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#define LINE_BLUE_LED PAL_LINE(GPIOA, PIN_BLUE_LED)
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#define LINE_RED_LED PAL_LINE(GPIOA, PIN_RED_LED)
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#define LINE_RED_LED PAL_LINE(GPIOC, PIN_RED_LED)
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#define LINE_DISPLAY_MISO PAL_LINE(GPIOA, PIN_DISPLAY_MISO)
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#define LINE_DISPLAY_MISO PAL_LINE(GPIOA, PIN_DISPLAY_MISO)
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#define LINE_DISPLAY_MOSI PAL_LINE(GPIOA, PIN_DISPLAY_MOSI)
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#define LINE_DISPLAY_MOSI PAL_LINE(GPIOA, PIN_DISPLAY_MOSI)
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@ -113,9 +113,10 @@
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/*
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/*
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* Port C setup.
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* Port C setup.
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* Everything input with pull-up except:
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* Everything input with pull-up except:
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* C13 - RED LED - Push Pull output 50MHz
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*/
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*/
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#define VAL_GPIOCCRL 0x88888888 /* PC7...PC0 */
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#define VAL_GPIOCCRL 0x88888888 /* PC7...PC0 */
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#define VAL_GPIOCCRH 0x88888888 /* PC15...PC8 */
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#define VAL_GPIOCCRH 0x88388888 /* PC15...PC8 */
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#define VAL_GPIOCODR 0xFFFFFFFF
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#define VAL_GPIOCODR 0xFFFFFFFF
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/*
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/*
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@ -226,19 +226,11 @@ uint32_t crc_lld_calc(CRCDriver *crcp, size_t n, const void *buf) {
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crc_lld_start_calc(crcp, n, buf);
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crc_lld_start_calc(crcp, n, buf);
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(void) osalThreadSuspendS(&crcp->thread);
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(void) osalThreadSuspendS(&crcp->thread);
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#else
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#else
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/**
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* BUG: Only peform byte writes to DR reg if reflect_data is disabled.
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* The GD32 hardware unit seems to incorrectly calculate CRCs when all
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* of the following is true: reflect_data(rev_in) is 0, dma is disable, and
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* you are writing more than a byte into the DR register.
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*/
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if (crcp->config->reflect_data != 0) {
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while(n > 3) {
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while(n > 3) {
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_crc_lld_calc_word(crcp, *(uint32_t*)buf);
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_crc_lld_calc_word(crcp, *(uint32_t*)buf);
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buf+=4;
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buf+=4;
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n-=4;
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n-=4;
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}
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}
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}
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osalDbgAssert(n == 0, "GD32 CRC Unit only supports WORD accesses");
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osalDbgAssert(n == 0, "GD32 CRC Unit only supports WORD accesses");
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#endif
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#endif
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return crcp->crc->DATA ^ crcp->config->final_val;
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return crcp->crc->DATA ^ crcp->config->final_val;
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