316c3b4825
Add CRC Driver
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This patch includes a high level and two low level drivers.
The high level driver is enabled with flag HAL_USE_CRC
The low level drivers include:
* Hardware CRC for the STM32 cortex processor lines.(when supported)
* Enabled with flag STM32_CRC_USE_CRC1
* DMA is enabled with CRC_USE_DMA
* SYNC api will use DMA, but put calling thread to sleep
* ASYNC api enabled.
* DMA Disabled
* SYNC api spin while calculating CRC
* ASYNC api disabled
* Software CRC (3 modes)
* CRCSW_CRC32_TABLE - Enables crc32 with lookup table.
* CRCSW_CRC16_TABLE - Enables crc16 with lookup tables.
* CRCSW_PROGRAMMBLE - Enables any crc done with computation.
* Can calculate any crc configuration.
* CRC_USE_DMA obviously not support with software CRC
2015-08-16 01:26:07 -04:00
2ca7c90917
Add EXT driver for nRF51
2015-08-09 17:18:46 -04:00
f98110c6f4
Merge pull request #19 from doceme/nrf51-spi
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Add SPI support for nRF51
2015-08-06 10:47:23 -03:00
e7a3df6c18
Improved FSMC.
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SRAM configuration is much more flexible now.
2015-08-04 13:30:01 +03:00
94096f9972
Merge branch 'tiva_i2c_fix'
2015-07-29 16:54:22 +02:00
6202fcbb8b
Add SPI support for nRF51
2015-07-27 22:42:45 -04:00
91d82fc631
nRF51: Remove unnecessary direction setting
2015-07-26 22:54:46 -04:00
f91f5a5c57
Cleanup nRF51 PAL driver
2015-07-25 22:16:19 -04:00
e82536b815
Add nRF51 bitfield header file
2015-07-23 23:41:06 -04:00
58f5fd1d72
Removed dependency on ST library for SDRAM
2015-06-28 22:53:44 +02:00
b872d9409c
Minor changes
2015-06-27 18:34:33 +02:00
ee1353a305
Old definitions removed
2015-06-27 18:32:58 +02:00
542d79ef90
LTDC and DMA2D ported to ChibiOS/RT 3
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+ LTDC and DMA2D peripheral drivers
+ LTDC and DMA2D demo project
2015-06-24 21:24:45 +02:00
06640e31ce
EICU. Fixed incorrect frequency calculation.
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Timers 9, 10, 11 connected to APB2 but constant in driver
initialization code was taken for APB1.
2015-06-02 15:53:58 +03:00
82973c099e
Fixed copypaste error in comment
2015-06-02 11:15:04 +03:00
343042d9d2
Add tx/rx pin configuration to SerialConfig
2015-05-15 21:08:53 -03:00
621e7198d7
Remove GPIO pin initialization
2015-05-15 20:44:37 -03:00
4ac0b638b9
Add basic PAL driver
2015-05-15 20:44:03 -03:00
aa43fd6554
Use sleep/wakeup for serial driver top-half
2015-05-14 23:07:10 -03:00
776fc29107
Fix some issues with serial driver
2015-05-14 22:12:57 -03:00
c37554ca20
Add initial serial driver
2015-05-13 22:19:05 -03:00
825c8ea30b
Add TIMER0 based ticker for OS
2015-05-13 20:30:12 -03:00
f0bcca7b46
Don't hang boot
2015-05-13 20:29:45 -03:00
5afd99de17
Add basic HAL/ST drivers
2015-05-12 22:06:39 -03:00
9b1feee2e7
Remove PAL, add ST
2015-05-12 22:05:23 -03:00
a0110bc179
Merge master
2015-05-10 17:51:59 -03:00
c44092eb0f
NAND code changed to use bitmap class
2015-05-02 20:51:04 +03:00
e07ebbcac3
Add initial system header + makefile
2015-04-29 19:48:06 -03:00
ca60a9cba2
Tiva. I2C. Fixed bug where number of bytes read is 2 more then requested. This only occurs when the number of bytes to read is 3 or more.
2015-04-24 22:00:47 +02:00
e5f1b8b034
Tiva. ST. Moved ST interrupt priority check from hal_lld to st_lld.
2015-04-16 22:15:15 +02:00
5130840d32
Tiva. MAC. Added check for valid interrupt priority.
2015-04-16 22:03:13 +02:00
cd95bc80f0
Tiva. EXT. Added checks for valid interrupt priorities.
2015-04-16 21:56:32 +02:00
7b7c6fd198
Tiva. Replaced all references to CORTEX_IS_VALID_KERNEL_PRIORITY with OSAL_IRQ_IS_VALID_PRIORITY.
2015-04-16 21:46:53 +02:00
2c0b573553
Merge branch 'tiva_ext_driver'
2015-04-14 23:07:24 +02:00
a8358f2140
Tiva. EXT. Changed name of ext_serve_port_interrupt and ext_serve_pin_interrupt.
2015-04-14 23:00:29 +02:00
2c66f54771
Tiva. EXT. Fixed typo in ext_serve_pin_interrupt macro.
2015-04-14 22:53:48 +02:00
f4e68ad23a
Tiva. EXT. Wrapped ext_serve_port_interrupt and ext_serve_pin_interrupt in a do{}while(0)
2015-04-14 22:52:22 +02:00
1afe28e9be
Tiva. EXT. Added ext_lld files and added ext_lld.c to platform.mk
2015-04-14 22:43:42 +02:00
c6474b882a
Tiva. EXT. Added number of GPIO pins to the registry.
2015-04-14 22:40:24 +02:00
3d45d3d4fa
EICU. Updated lld according to chibios updates.
2015-03-31 16:43:14 +03:00
91d9d09673
Removing GPTM_TAMR_TASNAPS was a bad idea. This caused the TAR register to not update at match so an incorrect value was read in st_lld_get_counter.
2015-03-23 21:08:57 +01:00
560076be34
Removed ST_CLOCK_SRC for Tiva st_lld and replaced with TIVA_SYSCLK.
2015-03-23 20:55:52 +01:00
927cbb1bee
Tiva tickless mode is working for 16 bit timers too. Typecasting was not correct before.
2015-03-22 22:46:09 +01:00
2d6792780a
Added macros in st_lld for Tiva defices to wait until a timer is ready before using it.
2015-03-22 22:40:22 +01:00
61f2081d66
Fixed incorrect Tiva ST_HANDLER and ST_NUMBER defines in st_lld.
2015-03-22 22:27:51 +01:00
bc7117e04c
Wait until the timer peripheral is ready to continue. When built with -O0 this was not needed, but with -O2 the peripheral was not ready when it was accessed.
2015-03-20 21:38:01 +01:00
273b1fa525
Fixed using incorrect registers.
2015-03-20 21:36:52 +01:00
b3c2194d95
Tiva st_lld files cleanup.
2015-03-20 21:11:57 +01:00
94ae99ab51
Tiva Tickless timer in down mode turned out not to work in last commit. It's working for WGPT5 now.
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Started some cleanup in st_lld driver.
2015-03-20 21:04:38 +01:00
87e99fedd8
Changed the Tiva tickless timer implementation to use the timer in down mode. It's working for WGPT5 now.
2015-03-20 20:21:38 +01:00
Michael Spradling
Stephen Caudle
Fabio Utzig
barthess
marcoveeneman
Andrea Zoppi