d27b447106
cleanup
2016-02-09 00:55:35 +01:00
d9a3d8493c
Random Number Generator driver
2016-02-08 23:45:59 +01:00
5af8452153
Merge pull request #31 from sdalu/mk
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Smart build enable
2016-02-03 19:25:20 -02:00
f78e539f5e
smart build enable
2016-02-03 21:48:43 +01:00
5740779b7b
updated comments
2016-02-02 22:03:37 +01:00
3c7efdb21f
cleaned up PINs configuration and selection
2016-02-02 21:58:31 +01:00
137836fb19
hardware flow control from nRF51
2016-02-02 13:34:47 +01:00
c757be0c16
Fixed typo
2015-10-14 17:52:47 +03:00
a2f9bc469a
FSMC code cleanup
2015-10-14 17:46:40 +03:00
cd2787ea88
Add GPT driver for nRF51
2015-09-27 09:28:27 -04:00
9ad49f5077
Add missing braces and fix copyright
2015-09-14 11:08:53 -04:00
2e554f3ef5
Add ADC driver for nRF51
2015-08-31 23:16:51 -04:00
40014ce2c5
Merge I2C driver
2015-08-30 19:08:17 -03:00
74065b233a
Fixed rest of paths in build scripts.
2015-08-24 16:26:22 +03:00
1baa777a7e
Merge pull request #23 from fpoussin/master
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Makefile paths rework
2015-08-24 15:19:16 +03:00
69d3493ce6
Add I2C support for nRF51
2015-08-20 22:45:21 -04:00
e3d9163628
Merge pull request #16 from doceme/nrf51-cleanup-serial
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Cleanup nRF51 serial driver
2015-08-20 17:20:24 -03:00
48a03708ff
Changed the way files are included to a more convenient way.
2015-08-20 17:47:21 +02:00
316c3b4825
Add CRC Driver
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This patch includes a high level and two low level drivers.
The high level driver is enabled with flag HAL_USE_CRC
The low level drivers include:
* Hardware CRC for the STM32 cortex processor lines.(when supported)
* Enabled with flag STM32_CRC_USE_CRC1
* DMA is enabled with CRC_USE_DMA
* SYNC api will use DMA, but put calling thread to sleep
* ASYNC api enabled.
* DMA Disabled
* SYNC api spin while calculating CRC
* ASYNC api disabled
* Software CRC (3 modes)
* CRCSW_CRC32_TABLE - Enables crc32 with lookup table.
* CRCSW_CRC16_TABLE - Enables crc16 with lookup tables.
* CRCSW_PROGRAMMBLE - Enables any crc done with computation.
* Can calculate any crc configuration.
* CRC_USE_DMA obviously not support with software CRC
2015-08-16 01:26:07 -04:00
e2da880b5f
Cleanup nRF51 serial driver
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Use values from bitfields header. Also convert notify1 function to be
non-blocking, which seems to be how most of the other serial drivers are
implemented.
2015-08-10 22:44:44 -04:00
2ca7c90917
Add EXT driver for nRF51
2015-08-09 17:18:46 -04:00
f98110c6f4
Merge pull request #19 from doceme/nrf51-spi
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Add SPI support for nRF51
2015-08-06 10:47:23 -03:00
e7a3df6c18
Improved FSMC.
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SRAM configuration is much more flexible now.
2015-08-04 13:30:01 +03:00
94096f9972
Merge branch 'tiva_i2c_fix'
2015-07-29 16:54:22 +02:00
6202fcbb8b
Add SPI support for nRF51
2015-07-27 22:42:45 -04:00
91d82fc631
nRF51: Remove unnecessary direction setting
2015-07-26 22:54:46 -04:00
f91f5a5c57
Cleanup nRF51 PAL driver
2015-07-25 22:16:19 -04:00
e82536b815
Add nRF51 bitfield header file
2015-07-23 23:41:06 -04:00
58f5fd1d72
Removed dependency on ST library for SDRAM
2015-06-28 22:53:44 +02:00
b872d9409c
Minor changes
2015-06-27 18:34:33 +02:00
ee1353a305
Old definitions removed
2015-06-27 18:32:58 +02:00
542d79ef90
LTDC and DMA2D ported to ChibiOS/RT 3
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+ LTDC and DMA2D peripheral drivers
+ LTDC and DMA2D demo project
2015-06-24 21:24:45 +02:00
06640e31ce
EICU. Fixed incorrect frequency calculation.
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Timers 9, 10, 11 connected to APB2 but constant in driver
initialization code was taken for APB1.
2015-06-02 15:53:58 +03:00
82973c099e
Fixed copypaste error in comment
2015-06-02 11:15:04 +03:00
343042d9d2
Add tx/rx pin configuration to SerialConfig
2015-05-15 21:08:53 -03:00
621e7198d7
Remove GPIO pin initialization
2015-05-15 20:44:37 -03:00
4ac0b638b9
Add basic PAL driver
2015-05-15 20:44:03 -03:00
aa43fd6554
Use sleep/wakeup for serial driver top-half
2015-05-14 23:07:10 -03:00
776fc29107
Fix some issues with serial driver
2015-05-14 22:12:57 -03:00
c37554ca20
Add initial serial driver
2015-05-13 22:19:05 -03:00
825c8ea30b
Add TIMER0 based ticker for OS
2015-05-13 20:30:12 -03:00
f0bcca7b46
Don't hang boot
2015-05-13 20:29:45 -03:00
5afd99de17
Add basic HAL/ST drivers
2015-05-12 22:06:39 -03:00
9b1feee2e7
Remove PAL, add ST
2015-05-12 22:05:23 -03:00
a0110bc179
Merge master
2015-05-10 17:51:59 -03:00
c44092eb0f
NAND code changed to use bitmap class
2015-05-02 20:51:04 +03:00
e07ebbcac3
Add initial system header + makefile
2015-04-29 19:48:06 -03:00
ca60a9cba2
Tiva. I2C. Fixed bug where number of bytes read is 2 more then requested. This only occurs when the number of bytes to read is 3 or more.
2015-04-24 22:00:47 +02:00
e5f1b8b034
Tiva. ST. Moved ST interrupt priority check from hal_lld to st_lld.
2015-04-16 22:15:15 +02:00
5130840d32
Tiva. MAC. Added check for valid interrupt priority.
2015-04-16 22:03:13 +02:00
Stephane D'Alu
Fabio Utzig
barthess
Stephen Caudle
Fabien Poussin
Michael Spradling
marcoveeneman
Andrea Zoppi