mirror of https://github.com/rusefi/ChibiOS.git
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5158 35acf78f-673a-0410-8e92-d51de3d6d3f4
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@ -176,7 +176,10 @@ void spc_early_init(void) {
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(SPC5_FMPLL1_NDIV_VALUE << 16);
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CGM.FMPLL[1].MR.R = 0; /* TODO: Add a setting. */
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/* Run modes initialization.*/
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/* Run modes initialization, note writes to the MC registers are verified
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by a protection mechanism, the operation success is verified at the
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end of the sequence.*/
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ME.IS.R = 8; /* Resetting I_ICONF status.*/
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ME.MER.R = SPC5_ME_ME_BITS; /* Enabled run modes. */
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ME.SAFE.R = SPC5_ME_SAFE_MC_BITS; /* SAFE run mode. */
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ME.DRUN.R = SPC5_ME_DRUN_MC_BITS; /* DRUN run mode. */
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@ -186,6 +189,10 @@ void spc_early_init(void) {
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ME.RUN[3].R = SPC5_ME_RUN3_MC_BITS; /* RUN0 run mode. */
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ME.HALT0.R = SPC5_ME_HALT0_MC_BITS; /* HALT0 run mode. */
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ME.STOP0.R = SPC5_ME_STOP0_MC_BITS; /* STOP0 run mode. */
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if (ME.IS.B.I_ICONF) {
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/* Configuration rejected.*/
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SPC5_CLOCK_FAILURE_HOOK();
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}
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/* Peripherals run and low power modes initialization.*/
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ME.RUNPC[0].R = SPC5_ME_RUN_PC0_BITS;
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