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Added support for LSI prescaler. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@14298 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
This commit is contained in:
Giovanni Di Sirio 2021-04-24 13:50:29 +00:00
parent dba2dd7996
commit 70f300b396
6 changed files with 40 additions and 20 deletions
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39
os/hal/ports/STM32/LLD/RCCv1/stm32_lsi.inc
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@ -29,7 +29,16 @@
/**
* @brief LSI clock frequency.
*/
#define STM32_LSICLK 32000
#define STM32_LSIRCCLK 32000
/**
* @name RCC_CSR register bits definitions
* @{
*/
#define STM32_LSIPRE_MASK (1 << 4) /**< LSIPRE field mask. */
#define STM32_LSIPRE_NODIV (0 << 4) /**< LSI not divided. */
#define STM32_LSIPRE_DIV128 (1 << 4) /**< LSI divided by 128 */
/** @} */
/*===========================================================================*/
/* Derived constants and error checks. */
@ -40,11 +49,37 @@
#error "STM32_RCC_HAS_LSI not defined in stm32_registry.h"
#endif
#if !defined(STM32_RCC_HAS_LSI_PRESCALER)
#error "STM32_RCC_HAS_LSI_PRESCALER not defined in stm32_registry.h"
#endif
/* Checks on configurations.*/
#if !defined(STM32_LSI_ENABLED)
#error "STM32_LSI_ENABLED not defined in mcuconf.h"
#endif
#if STM32_RCC_HAS_LSI_PRESCALER || defined(__DOXYGEN__)
#if !defined(STM32_LSIPRE)
#error "STM32_LSIPRE not defined in mcuconf.h"
#endif
/**
* @brief LSI frequency.
*/
#if (STM32_LSIPRE == STM32_LSIPRE_NODIV) || defined(__DOXYGEN__)
#define STM32_LSICLK (STM32_LSIRCCLK)
#elif STM32_LSIPRE == STM32_LSIPRE_DIV128
#define STM32_LSICLK (STM32_LSIRCCLK / 128)
#else
#error "invalid STM32_LSIPRE value specified"
#endif
#else /* !STM32_RCC_HAS_LSI_PRESCALER */
#define STM32_LSIPRE 0
#define STM32_LSICLK (STM32_LSIRCCLK)
#endif /* !STM32_RCC_HAS_LSI_PRESCALER */
/*===========================================================================*/
/* Driver exported variables. */
/*===========================================================================*/
@ -61,7 +96,7 @@ static inline void lsi_init(void) {
#if STM32_LSI_ENABLED
/* LSI activation.*/
RCC->CSR |= RCC_CSR_LSION;
RCC->CSR |= STM32_LSIPRE | RCC_CSR_LSION;
while ((RCC->CSR & RCC_CSR_LSIRDY) == 0) {
}
#endif

1
os/hal/ports/STM32/STM32G4xx/stm32_registry.h
View File

@ -99,6 +99,7 @@
#define STM32_RCC_HAS_HSI48 TRUE
#define STM32_RCC_HAS_MSI FALSE
#define STM32_RCC_HAS_LSI TRUE
#define STM32_RCC_HAS_LSI_PRESCALER FALSE
#define STM32_RCC_HAS_LSE TRUE
#define STM32_RCC_HAS_HSE TRUE

9
os/hal/ports/STM32/STM32L4xx+/hal_lld.h
View File

@ -66,15 +66,6 @@
#endif
/** @} */
/**
* @name Internal clock sources
* @{
*/
#define STM32_HSI16CLK 16000000 /**< 16MHz internal clock. */
#define STM32_HSI48CLK 48000000 /**< 48MHz internal clock. */
#define STM32_LSICLK 32000 /**< Low speed internal clock. */
/** @} */
/**
* @name PWR_CR1 register bits definitions
* @{

1
os/hal/ports/STM32/STM32L4xx+/stm32_registry.h
View File

@ -39,6 +39,7 @@
#define STM32_RCC_HAS_HSI48 TRUE
#define STM32_RCC_HAS_MSI TRUE
#define STM32_RCC_HAS_LSI TRUE
#define STM32_RCC_HAS_LSI_PRESCALER FALSE
#define STM32_RCC_HAS_LSE TRUE
#define STM32_RCC_HAS_HSE TRUE

9
os/hal/ports/STM32/STM32L4xx/hal_lld.h
View File

@ -69,15 +69,6 @@
#endif
/** @} */
/**
* @name Internal clock sources
* @{
*/
#define STM32_HSI16CLK 16000000 /**< 16MHz internal clock. */
#define STM32_HSI48CLK 48000000 /**< 48MHz internal clock. */
#define STM32_LSICLK 32000 /**< Low speed internal clock. */
/** @} */
/**
* @name PWR_CR1 register bits definitions
* @{

1
os/hal/ports/STM32/STM32L4xx/stm32_registry.h
View File

@ -39,6 +39,7 @@
/*#define STM32_RCC_HAS_HSI48 TRUE*/ /* See below, it changes.*/
#define STM32_RCC_HAS_MSI TRUE
#define STM32_RCC_HAS_LSI TRUE
#define STM32_RCC_HAS_LSI_PRESCALER FALSE
#define STM32_RCC_HAS_LSE TRUE
#define STM32_RCC_HAS_HSE TRUE