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Fixed bug 3484942. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3934 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
gdisirio 2012-02-07 18:57:30 +00:00
parent 1792e5db26
commit e3f3b4cd2c
4 changed files with 11 additions and 14 deletions
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9
os/hal/platforms/STM32F2xx/adc_lld.h
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@ -46,11 +46,8 @@
/**
* @brief Maximum HSE clock frequency.
* @note This value is arbitrary defined, the current datasheet does not
* define a maximum value (it is TBD). A value of 36MHz is mentioned
* but without relationship to VDD ranges.
*/
#define STM32_ADCCLK_MAX 42000000
#define STM32_ADCCLK_MAX 30000000
/** @} */
/**
@ -123,9 +120,9 @@
/**
* @brief ADC common clock divider.
* @note This setting is influenced by the VDDA voltage and other
* external conditions, please refer to the STM32L15x datasheet
* external conditions, please refer to the STM32F2xx datasheet
* for more info.<br>
* See section 6.3.15 "12-bit ADC characteristics".
* See section 5.3.20 "12-bit ADC characteristics".
*/
#if !defined(STM32_ADC_ADCPRE) || defined(__DOXYGEN__)
#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV2

4
os/hal/platforms/STM32F2xx/hal_lld.c
View File

@ -19,8 +19,8 @@
*/
/**
* @file STM32F4xx/hal_lld.c
* @brief STM32F4xx HAL subsystem low level driver source.
* @file STM32F2xx/hal_lld.c
* @brief STM32F2xx HAL subsystem low level driver source.
*
* @addtogroup HAL
* @{

9
os/hal/platforms/STM32F4xx/adc_lld.h
View File

@ -46,11 +46,8 @@
/**
* @brief Maximum HSE clock frequency.
* @note This value is arbitrary defined, the current datasheet does not
* define a maximum value (it is TBD). A value of 36MHz is mentioned
* but without relationship to VDD ranges.
*/
#define STM32_ADCCLK_MAX 42000000
#define STM32_ADCCLK_MAX 36000000
/** @} */
/**
@ -123,9 +120,9 @@
/**
* @brief ADC common clock divider.
* @note This setting is influenced by the VDDA voltage and other
* external conditions, please refer to the STM32L15x datasheet
* external conditions, please refer to the STM32F4xx datasheet
* for more info.<br>
* See section 6.3.15 "12-bit ADC characteristics".
* See section 5.3.20 "12-bit ADC characteristics".
*/
#if !defined(STM32_ADC_ADCPRE) || defined(__DOXYGEN__)
#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV2

3
readme.txt
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@ -79,6 +79,9 @@
*****************************************************************************
*** 2.5.0 ***
- FIX: Fixed various minor documentation errors and fixed ADC maximum
frequency limit in STM32F2/F4 ADC drivers (bug 3484942)(backported
to 2.4.1).
- NEW: Updated debug plugin 1.0.8 (backported to 2.4.0).
- NEW: Added more accurate UBRR calculation in AVR serial driver (backported
to 2.4.0).