More cleanup of MPU driver code. Support MPU INT on CC3D and Naze32
Rev6. MPU6050 Correction From merge
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@ -63,14 +63,6 @@ static const extiConfig_t *mpuIntExtiConfig = NULL;
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#define MPU_ADDRESS 0x68
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// MPU6050
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#define MPU_RA_WHO_AM_I 0x75
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#define MPU_RA_WHO_AM_I_LEGACY 0x00
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#define MPU_RA_XA_OFFS_H 0x06 //[15:0] XA_OFFS
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#define MPU_RA_PRODUCT_ID 0x0C // Product ID Register
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#define MPU_RA_ACCEL_XOUT_H 0x3B
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#define MPU_RA_GYRO_XOUT_H 0x43
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// WHO_AM_I register contents for MPU3050, 6050 and 6500
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#define MPU6500_WHO_AM_I_CONST (0x70)
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#define MPUx0x0_WHO_AM_I_CONST (0x68)
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@ -135,7 +127,7 @@ static bool detectSPISensorsAndUpdateDetectionResult(void)
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#ifdef USE_GYRO_SPI_MPU6500
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if (mpu6500SpiDetect()) {
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mpuDetectionResult.sensor = MPU_65xx_SPI;
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mpuConfiguration.gyroReadXRegister = MPU6500_RA_GYRO_XOUT_H;
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mpuConfiguration.gyroReadXRegister = MPU_RA_GYRO_XOUT_H;
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mpuConfiguration.read = mpu6500ReadRegister;
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mpuConfiguration.write = mpu6500WriteRegister;
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return true;
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@ -145,7 +137,7 @@ static bool detectSPISensorsAndUpdateDetectionResult(void)
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#ifdef USE_GYRO_SPI_MPU6000
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if (mpu6000SpiDetect()) {
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mpuDetectionResult.sensor = MPU_60x0_SPI;
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mpuConfiguration.gyroReadXRegister = MPU6000_GYRO_XOUT_H;
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mpuConfiguration.gyroReadXRegister = MPU_RA_GYRO_XOUT_H;
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mpuConfiguration.read = mpu6000ReadRegister;
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mpuConfiguration.write = mpu6000WriteRegister;
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return true;
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@ -274,9 +266,7 @@ void configureMPUDataReadyInterruptHandling(void)
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}
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#endif
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#ifndef CC3D
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registerExti15_10_CallbackHandler(MPU_DATA_READY_EXTI_Handler);
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#endif
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registerExtiCallbackHandler(mpuIntExtiConfig->exti_irqn, MPU_DATA_READY_EXTI_Handler);
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EXTI_ClearITPendingBit(mpuIntExtiConfig->exti_line);
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@ -17,6 +17,104 @@
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#pragma once
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// MPU6050
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#define MPU_RA_WHO_AM_I 0x75
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#define MPU_RA_WHO_AM_I_LEGACY 0x00
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// RA = Register Address
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#define MPU_RA_XG_OFFS_TC 0x00 //[7] PWR_MODE, [6:1] XG_OFFS_TC, [0] OTP_BNK_VLD
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#define MPU_RA_YG_OFFS_TC 0x01 //[7] PWR_MODE, [6:1] YG_OFFS_TC, [0] OTP_BNK_VLD
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#define MPU_RA_ZG_OFFS_TC 0x02 //[7] PWR_MODE, [6:1] ZG_OFFS_TC, [0] OTP_BNK_VLD
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#define MPU_RA_X_FINE_GAIN 0x03 //[7:0] X_FINE_GAIN
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#define MPU_RA_Y_FINE_GAIN 0x04 //[7:0] Y_FINE_GAIN
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#define MPU_RA_Z_FINE_GAIN 0x05 //[7:0] Z_FINE_GAIN
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#define MPU_RA_XA_OFFS_H 0x06 //[15:0] XA_OFFS
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#define MPU_RA_XA_OFFS_L_TC 0x07
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#define MPU_RA_YA_OFFS_H 0x08 //[15:0] YA_OFFS
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#define MPU_RA_YA_OFFS_L_TC 0x09
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#define MPU_RA_ZA_OFFS_H 0x0A //[15:0] ZA_OFFS
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#define MPU_RA_ZA_OFFS_L_TC 0x0B
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#define MPU_RA_PRODUCT_ID 0x0C // Product ID Register
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#define MPU_RA_XG_OFFS_USRH 0x13 //[15:0] XG_OFFS_USR
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#define MPU_RA_XG_OFFS_USRL 0x14
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#define MPU_RA_YG_OFFS_USRH 0x15 //[15:0] YG_OFFS_USR
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#define MPU_RA_YG_OFFS_USRL 0x16
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#define MPU_RA_ZG_OFFS_USRH 0x17 //[15:0] ZG_OFFS_USR
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#define MPU_RA_ZG_OFFS_USRL 0x18
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#define MPU_RA_SMPLRT_DIV 0x19
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#define MPU_RA_CONFIG 0x1A
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#define MPU_RA_GYRO_CONFIG 0x1B
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#define MPU_RA_ACCEL_CONFIG 0x1C
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#define MPU_RA_FF_THR 0x1D
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#define MPU_RA_FF_DUR 0x1E
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#define MPU_RA_MOT_THR 0x1F
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#define MPU_RA_MOT_DUR 0x20
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#define MPU_RA_ZRMOT_THR 0x21
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#define MPU_RA_ZRMOT_DUR 0x22
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#define MPU_RA_FIFO_EN 0x23
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#define MPU_RA_I2C_MST_CTRL 0x24
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#define MPU_RA_I2C_SLV0_ADDR 0x25
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#define MPU_RA_I2C_SLV0_REG 0x26
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#define MPU_RA_I2C_SLV0_CTRL 0x27
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#define MPU_RA_I2C_SLV1_ADDR 0x28
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#define MPU_RA_I2C_SLV1_REG 0x29
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#define MPU_RA_I2C_SLV1_CTRL 0x2A
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#define MPU_RA_I2C_SLV2_ADDR 0x2B
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#define MPU_RA_I2C_SLV2_REG 0x2C
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#define MPU_RA_I2C_SLV2_CTRL 0x2D
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#define MPU_RA_I2C_SLV3_ADDR 0x2E
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#define MPU_RA_I2C_SLV3_REG 0x2F
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#define MPU_RA_I2C_SLV3_CTRL 0x30
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#define MPU_RA_I2C_SLV4_ADDR 0x31
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#define MPU_RA_I2C_SLV4_REG 0x32
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#define MPU_RA_I2C_SLV4_DO 0x33
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#define MPU_RA_I2C_SLV4_CTRL 0x34
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#define MPU_RA_I2C_SLV4_DI 0x35
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#define MPU_RA_I2C_MST_STATUS 0x36
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#define MPU_RA_INT_PIN_CFG 0x37
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#define MPU_RA_INT_ENABLE 0x38
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#define MPU_RA_DMP_INT_STATUS 0x39
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#define MPU_RA_INT_STATUS 0x3A
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#define MPU_RA_ACCEL_XOUT_H 0x3B
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#define MPU_RA_ACCEL_XOUT_L 0x3C
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#define MPU_RA_ACCEL_YOUT_H 0x3D
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#define MPU_RA_ACCEL_YOUT_L 0x3E
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#define MPU_RA_ACCEL_ZOUT_H 0x3F
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#define MPU_RA_ACCEL_ZOUT_L 0x40
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#define MPU_RA_TEMP_OUT_H 0x41
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#define MPU_RA_TEMP_OUT_L 0x42
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#define MPU_RA_GYRO_XOUT_H 0x43
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#define MPU_RA_GYRO_XOUT_L 0x44
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#define MPU_RA_GYRO_YOUT_H 0x45
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#define MPU_RA_GYRO_YOUT_L 0x46
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#define MPU_RA_GYRO_ZOUT_H 0x47
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#define MPU_RA_GYRO_ZOUT_L 0x48
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#define MPU_RA_EXT_SENS_DATA_00 0x49
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#define MPU_RA_MOT_DETECT_STATUS 0x61
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#define MPU_RA_I2C_SLV0_DO 0x63
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#define MPU_RA_I2C_SLV1_DO 0x64
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#define MPU_RA_I2C_SLV2_DO 0x65
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#define MPU_RA_I2C_SLV3_DO 0x66
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#define MPU_RA_I2C_MST_DELAY_CTRL 0x67
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#define MPU_RA_SIGNAL_PATH_RESET 0x68
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#define MPU_RA_MOT_DETECT_CTRL 0x69
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#define MPU_RA_USER_CTRL 0x6A
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#define MPU_RA_PWR_MGMT_1 0x6B
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#define MPU_RA_PWR_MGMT_2 0x6C
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#define MPU_RA_BANK_SEL 0x6D
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#define MPU_RA_MEM_START_ADDR 0x6E
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#define MPU_RA_MEM_R_W 0x6F
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#define MPU_RA_DMP_CFG_1 0x70
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#define MPU_RA_DMP_CFG_2 0x71
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#define MPU_RA_FIFO_COUNTH 0x72
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#define MPU_RA_FIFO_COUNTL 0x73
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#define MPU_RA_FIFO_R_W 0x74
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#define MPU_RA_WHO_AM_I 0x75
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// RF = Register Flag
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#define MPU_RF_DATA_RDY_EN (1 << 0)
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typedef bool (*mpuReadRegisterFunc)(uint8_t reg, uint8_t length, uint8_t* data);
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typedef bool (*mpuWriteRegisterFunc)(uint8_t reg, uint8_t data);
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@ -38,6 +38,8 @@
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#include "accgyro_mpu.h"
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#include "accgyro_mpu6050.h"
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extern uint8_t mpuLowPassFilter;
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//#define DEBUG_MPU_DATA_READY_INTERRUPT
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// MPU6050, Standard address 0x68
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@ -47,100 +49,6 @@
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#define DMP_MEM_START_ADDR 0x6E
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#define DMP_MEM_R_W 0x6F
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// RA = Register Address
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#define MPU_RA_XG_OFFS_TC 0x00 //[7] PWR_MODE, [6:1] XG_OFFS_TC, [0] OTP_BNK_VLD
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#define MPU_RA_YG_OFFS_TC 0x01 //[7] PWR_MODE, [6:1] YG_OFFS_TC, [0] OTP_BNK_VLD
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#define MPU_RA_ZG_OFFS_TC 0x02 //[7] PWR_MODE, [6:1] ZG_OFFS_TC, [0] OTP_BNK_VLD
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#define MPU_RA_X_FINE_GAIN 0x03 //[7:0] X_FINE_GAIN
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#define MPU_RA_Y_FINE_GAIN 0x04 //[7:0] Y_FINE_GAIN
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#define MPU_RA_Z_FINE_GAIN 0x05 //[7:0] Z_FINE_GAIN
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#define MPU_RA_XA_OFFS_H 0x06 //[15:0] XA_OFFS
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#define MPU_RA_XA_OFFS_L_TC 0x07
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#define MPU_RA_YA_OFFS_H 0x08 //[15:0] YA_OFFS
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#define MPU_RA_YA_OFFS_L_TC 0x09
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#define MPU_RA_ZA_OFFS_H 0x0A //[15:0] ZA_OFFS
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#define MPU_RA_ZA_OFFS_L_TC 0x0B
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#define MPU_RA_PRODUCT_ID 0x0C // Product ID Register
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#define MPU_RA_XG_OFFS_USRH 0x13 //[15:0] XG_OFFS_USR
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#define MPU_RA_XG_OFFS_USRL 0x14
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#define MPU_RA_YG_OFFS_USRH 0x15 //[15:0] YG_OFFS_USR
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#define MPU_RA_YG_OFFS_USRL 0x16
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#define MPU_RA_ZG_OFFS_USRH 0x17 //[15:0] ZG_OFFS_USR
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#define MPU_RA_ZG_OFFS_USRL 0x18
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#define MPU_RA_SMPLRT_DIV 0x19
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#define MPU_RA_CONFIG 0x1A
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#define MPU_RA_GYRO_CONFIG 0x1B
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#define MPU_RA_ACCEL_CONFIG 0x1C
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#define MPU_RA_FF_THR 0x1D
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#define MPU_RA_FF_DUR 0x1E
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#define MPU_RA_MOT_THR 0x1F
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#define MPU_RA_MOT_DUR 0x20
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#define MPU_RA_ZRMOT_THR 0x21
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#define MPU_RA_ZRMOT_DUR 0x22
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#define MPU_RA_FIFO_EN 0x23
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#define MPU_RA_I2C_MST_CTRL 0x24
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#define MPU_RA_I2C_SLV0_ADDR 0x25
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#define MPU_RA_I2C_SLV0_REG 0x26
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#define MPU_RA_I2C_SLV0_CTRL 0x27
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#define MPU_RA_I2C_SLV1_ADDR 0x28
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#define MPU_RA_I2C_SLV1_REG 0x29
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#define MPU_RA_I2C_SLV1_CTRL 0x2A
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#define MPU_RA_I2C_SLV2_ADDR 0x2B
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#define MPU_RA_I2C_SLV2_REG 0x2C
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#define MPU_RA_I2C_SLV2_CTRL 0x2D
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#define MPU_RA_I2C_SLV3_ADDR 0x2E
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#define MPU_RA_I2C_SLV3_REG 0x2F
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#define MPU_RA_I2C_SLV3_CTRL 0x30
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#define MPU_RA_I2C_SLV4_ADDR 0x31
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#define MPU_RA_I2C_SLV4_REG 0x32
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#define MPU_RA_I2C_SLV4_DO 0x33
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#define MPU_RA_I2C_SLV4_CTRL 0x34
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#define MPU_RA_I2C_SLV4_DI 0x35
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#define MPU_RA_I2C_MST_STATUS 0x36
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#define MPU_RA_INT_PIN_CFG 0x37
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#define MPU_RA_INT_ENABLE 0x38
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#define MPU_RA_DMP_INT_STATUS 0x39
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#define MPU_RA_INT_STATUS 0x3A
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#define MPU_RA_ACCEL_XOUT_H 0x3B
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#define MPU_RA_ACCEL_XOUT_L 0x3C
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#define MPU_RA_ACCEL_YOUT_H 0x3D
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#define MPU_RA_ACCEL_YOUT_L 0x3E
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#define MPU_RA_ACCEL_ZOUT_H 0x3F
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#define MPU_RA_ACCEL_ZOUT_L 0x40
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#define MPU_RA_TEMP_OUT_H 0x41
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#define MPU_RA_TEMP_OUT_L 0x42
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#define MPU_RA_GYRO_XOUT_H 0x43
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#define MPU_RA_GYRO_XOUT_L 0x44
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#define MPU_RA_GYRO_YOUT_H 0x45
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#define MPU_RA_GYRO_YOUT_L 0x46
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#define MPU_RA_GYRO_ZOUT_H 0x47
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#define MPU_RA_GYRO_ZOUT_L 0x48
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#define MPU_RA_EXT_SENS_DATA_00 0x49
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#define MPU_RA_MOT_DETECT_STATUS 0x61
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#define MPU_RA_I2C_SLV0_DO 0x63
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#define MPU_RA_I2C_SLV1_DO 0x64
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#define MPU_RA_I2C_SLV2_DO 0x65
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#define MPU_RA_I2C_SLV3_DO 0x66
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#define MPU_RA_I2C_MST_DELAY_CTRL 0x67
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#define MPU_RA_SIGNAL_PATH_RESET 0x68
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#define MPU_RA_MOT_DETECT_CTRL 0x69
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#define MPU_RA_USER_CTRL 0x6A
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#define MPU_RA_PWR_MGMT_1 0x6B
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#define MPU_RA_PWR_MGMT_2 0x6C
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#define MPU_RA_BANK_SEL 0x6D
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#define MPU_RA_MEM_START_ADDR 0x6E
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#define MPU_RA_MEM_R_W 0x6F
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#define MPU_RA_DMP_CFG_1 0x70
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#define MPU_RA_DMP_CFG_2 0x71
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#define MPU_RA_FIFO_COUNTH 0x72
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#define MPU_RA_FIFO_COUNTL 0x73
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#define MPU_RA_FIFO_R_W 0x74
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#define MPU_RA_WHO_AM_I 0x75
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// RF = Register Flag
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#define MPU_RF_DATA_RDY_EN (1 << 0)
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#define MPU6050_SMPLRT_DIV 0 // 8000Hz
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static void mpu6050AccInit(void);
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@ -92,22 +92,22 @@ void mpu6500GyroInit(uint16_t lpf)
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uint8_t mpuLowPassFilter = determineMPULPF(lpf);
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mpuConfiguration.write(MPU6500_RA_PWR_MGMT_1, MPU6500_BIT_RESET);
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mpuConfiguration.write(MPU_RA_PWR_MGMT_1, MPU6500_BIT_RESET);
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delay(100);
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mpuConfiguration.write(MPU6500_RA_SIGNAL_PATH_RST, 0x07);
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mpuConfiguration.write(MPU_RA_SIGNAL_PATH_RESET, 0x07);
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delay(100);
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mpuConfiguration.write(MPU6500_RA_PWR_MGMT_1, 0);
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mpuConfiguration.write(MPU_RA_PWR_MGMT_1, 0);
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delay(100);
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mpuConfiguration.write(MPU6500_RA_PWR_MGMT_1, INV_CLK_PLL);
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mpuConfiguration.write(MPU6500_RA_GYRO_CFG, INV_FSR_2000DPS << 3);
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mpuConfiguration.write(MPU6500_RA_ACCEL_CFG, INV_FSR_8G << 3);
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mpuConfiguration.write(MPU6500_RA_LPF, mpuLowPassFilter);
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mpuConfiguration.write(MPU6500_RA_RATE_DIV, gyroMPU6xxxGetDividerDrops()); // 1kHz S/R
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mpuConfiguration.write(MPU_RA_PWR_MGMT_1, INV_CLK_PLL);
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mpuConfiguration.write(MPU_RA_GYRO_CONFIG, INV_FSR_2000DPS << 3);
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mpuConfiguration.write(MPU_RA_ACCEL_CONFIG, INV_FSR_8G << 3);
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mpuConfiguration.write(MPU_RA_CONFIG, mpuLowPassFilter);
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mpuConfiguration.write(MPU_RA_SMPLRT_DIV, gyroMPU6xxxGetDividerDrops()); // Get Divider Drops
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// Data ready interrupt configuration
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mpuConfiguration.write(MPU6500_RA_INT_PIN_CFG, 0 << 7 | 0 << 6 | 0 << 5 | 1 << 4 | 0 << 3 | 0 << 2 | 1 << 1 | 0 << 0); // INT_ANYRD_2CLEAR, BYPASS_EN
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mpuConfiguration.write(MPU_RA_INT_PIN_CFG, 0 << 7 | 0 << 6 | 0 << 5 | 1 << 4 | 0 << 3 | 0 << 2 | 1 << 1 | 0 << 0); // INT_ANYRD_2CLEAR, BYPASS_EN
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#ifdef USE_MPU_DATA_READY_SIGNAL
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mpuConfiguration.write(MPU6500_RA_INT_ENABLE, 0x01); // RAW_RDY_EN interrupt enable
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mpuConfiguration.write(MPU_RA_INT_ENABLE, 0x01); // RAW_RDY_EN interrupt enable
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#endif
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}
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@ -15,22 +15,6 @@
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* along with Cleanflight. If not, see <http://www.gnu.org/licenses/>.
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*/
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#define MPU6500_RA_RATE_DIV (0x19)
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#define MPU6500_RA_LPF (0x1A)
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#define MPU6500_RA_GYRO_CFG (0x1B)
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#define MPU6500_RA_ACCEL_CFG (0x1C)
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#define MPU6500_RA_ACCEL_XOUT_H (0x3B)
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#define MPU6500_RA_INT_PIN_CFG (0x37)
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#define MPU6500_RA_INT_ENABLE (0x38)
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#define MPU6500_RA_GYRO_XOUT_H (0x43)
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#define MPU6500_RA_SIGNAL_PATH_RST (0x68)
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#define MPU6500_RA_USER_CTRL (0x6A)
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#define MPU6500_RA_PWR_MGMT_1 (0x6B)
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#define MPU6500_RA_BANK_SEL (0x6D)
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#define MPU6500_RA_MEM_RW (0x6F)
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#define MPU6500_RA_WHOAMI (0x75)
|
||||
#define MPU6500_RA_XA_OFFS_H (0x77)
|
||||
|
||||
#define MPU6500_WHO_AM_I_CONST (0x70)
|
||||
|
||||
#define MPU6500_BIT_RESET (0x80)
|
||||
|
|
|
@ -122,6 +122,8 @@ bool mpu6000ReadRegister(uint8_t reg, uint8_t length, uint8_t *data)
|
|||
|
||||
void mpu6000SpiGyroInit(uint16_t lpf)
|
||||
{
|
||||
mpuIntExtiInit();
|
||||
|
||||
uint8_t mpuLowPassFilter = determineMPULPF(lpf);
|
||||
|
||||
mpu6000AccAndGyroInit();
|
||||
|
@ -148,6 +150,7 @@ void mpu6000SpiGyroInit(uint16_t lpf)
|
|||
void mpu6000SpiAccInit(void)
|
||||
{
|
||||
mpuIntExtiInit();
|
||||
|
||||
acc_1G = 512 * 8;
|
||||
}
|
||||
|
||||
|
@ -158,12 +161,12 @@ bool mpu6000SpiDetect(void)
|
|||
|
||||
spiSetDivisor(MPU6000_SPI_INSTANCE, SPI_0_5625MHZ_CLOCK_DIVIDER);
|
||||
|
||||
mpu6000WriteRegister(MPU6000_PWR_MGMT_1, BIT_H_RESET);
|
||||
mpu6000WriteRegister(MPU_RA_PWR_MGMT_1, BIT_H_RESET);
|
||||
|
||||
do {
|
||||
delay(150);
|
||||
|
||||
mpu6000ReadRegister(MPU6000_WHOAMI, 1, &in);
|
||||
mpu6000ReadRegister(MPU_RA_WHO_AM_I, 1, &in);
|
||||
if (in == MPU6000_WHO_AM_I_CONST) {
|
||||
break;
|
||||
}
|
||||
|
@ -173,7 +176,7 @@ bool mpu6000SpiDetect(void)
|
|||
} while (attemptsRemaining--);
|
||||
|
||||
|
||||
mpu6000ReadRegister(MPU6000_PRODUCT_ID, 1, &in);
|
||||
mpu6000ReadRegister(MPU_RA_PRODUCT_ID, 1, &in);
|
||||
|
||||
/* look for a product ID we recognise */
|
||||
|
||||
|
@ -206,36 +209,45 @@ static void mpu6000AccAndGyroInit(void) {
|
|||
spiSetDivisor(MPU6000_SPI_INSTANCE, SPI_0_5625MHZ_CLOCK_DIVIDER);
|
||||
|
||||
// Device Reset
|
||||
mpu6000WriteRegister(MPU6000_PWR_MGMT_1, BIT_H_RESET);
|
||||
mpu6000WriteRegister(MPU_RA_PWR_MGMT_1, BIT_H_RESET);
|
||||
delay(150);
|
||||
|
||||
mpu6000WriteRegister(MPU6000_SIGNAL_PATH_RESET, BIT_GYRO | BIT_ACC | BIT_TEMP);
|
||||
mpu6000WriteRegister(MPU_RA_SIGNAL_PATH_RESET, BIT_GYRO | BIT_ACC | BIT_TEMP);
|
||||
delay(150);
|
||||
|
||||
// Clock Source PPL with Z axis gyro reference
|
||||
mpu6000WriteRegister(MPU6000_PWR_MGMT_1, MPU_CLK_SEL_PLLGYROZ);
|
||||
mpu6000WriteRegister(MPU_RA_PWR_MGMT_1, MPU_CLK_SEL_PLLGYROZ);
|
||||
delayMicroseconds(1);
|
||||
|
||||
// Disable Primary I2C Interface
|
||||
mpu6000WriteRegister(MPU6000_USER_CTRL, BIT_I2C_IF_DIS);
|
||||
mpu6000WriteRegister(MPU_RA_USER_CTRL, BIT_I2C_IF_DIS);
|
||||
delayMicroseconds(1);
|
||||
|
||||
mpu6000WriteRegister(MPU6000_PWR_MGMT_2, 0x00);
|
||||
mpu6000WriteRegister(MPU_RA_PWR_MGMT_2, 0x00);
|
||||
delayMicroseconds(1);
|
||||
|
||||
// Accel Sample Rate 1kHz
|
||||
// Gyroscope Output Rate = 1kHz when the DLPF is enabled
|
||||
mpu6000WriteRegister(MPU6000_SMPLRT_DIV, gyroMPU6xxxGetDividerDrops());
|
||||
delayMicroseconds(1);
|
||||
|
||||
// Accel +/- 8 G Full Scale
|
||||
mpu6000WriteRegister(MPU6000_ACCEL_CONFIG, BITS_FS_8G);
|
||||
mpu6000WriteRegister(MPU_RA_SMPLRT_DIV, gyroMPU6xxxGetDividerDrops());
|
||||
delayMicroseconds(1);
|
||||
|
||||
// Gyro +/- 1000 DPS Full Scale
|
||||
mpu6000WriteRegister(MPU6000_GYRO_CONFIG, BITS_FS_2000DPS);
|
||||
mpu6000WriteRegister(MPU_RA_GYRO_CONFIG, INV_FSR_2000DPS << 3);
|
||||
delayMicroseconds(1);
|
||||
|
||||
// Accel +/- 8 G Full Scale
|
||||
mpu6000WriteRegister(MPU_RA_ACCEL_CONFIG, INV_FSR_8G << 3);
|
||||
delayMicroseconds(1);
|
||||
|
||||
|
||||
mpu6000WriteRegister(MPU_RA_INT_PIN_CFG, 0 << 7 | 0 << 6 | 0 << 5 | 1 << 4 | 0 << 3 | 0 << 2 | 0 << 1 | 0 << 0); // INT_ANYRD_2CLEAR
|
||||
delayMicroseconds(1);
|
||||
|
||||
#ifdef USE_MPU_DATA_READY_SIGNAL
|
||||
mpu6000WriteRegister(MPU_RA_INT_ENABLE, MPU_RF_DATA_RDY_EN);
|
||||
delayMicroseconds(1);
|
||||
#endif
|
||||
|
||||
spiSetDivisor(MPU6000_SPI_INSTANCE, SPI_18MHZ_CLOCK_DIVIDER); // 18 MHz SPI clock
|
||||
delayMicroseconds(1);
|
||||
|
||||
|
|
|
@ -3,38 +3,6 @@
|
|||
|
||||
#define MPU6000_CONFIG 0x1A
|
||||
|
||||
// Registers
|
||||
#define MPU6000_PRODUCT_ID 0x0C
|
||||
#define MPU6000_SMPLRT_DIV 0x19
|
||||
#define MPU6000_GYRO_CONFIG 0x1B
|
||||
#define MPU6000_ACCEL_CONFIG 0x1C
|
||||
#define MPU6000_FIFO_EN 0x23
|
||||
#define MPU6000_INT_PIN_CFG 0x37
|
||||
#define MPU6000_INT_ENABLE 0x38
|
||||
#define MPU6000_INT_STATUS 0x3A
|
||||
#define MPU6000_ACCEL_XOUT_H 0x3B
|
||||
#define MPU6000_ACCEL_XOUT_L 0x3C
|
||||
#define MPU6000_ACCEL_YOUT_H 0x3D
|
||||
#define MPU6000_ACCEL_YOUT_L 0x3E
|
||||
#define MPU6000_ACCEL_ZOUT_H 0x3F
|
||||
#define MPU6000_ACCEL_ZOUT_L 0x40
|
||||
#define MPU6000_TEMP_OUT_H 0x41
|
||||
#define MPU6000_TEMP_OUT_L 0x42
|
||||
#define MPU6000_GYRO_XOUT_H 0x43
|
||||
#define MPU6000_GYRO_XOUT_L 0x44
|
||||
#define MPU6000_GYRO_YOUT_H 0x45
|
||||
#define MPU6000_GYRO_YOUT_L 0x46
|
||||
#define MPU6000_GYRO_ZOUT_H 0x47
|
||||
#define MPU6000_GYRO_ZOUT_L 0x48
|
||||
#define MPU6000_USER_CTRL 0x6A
|
||||
#define MPU6000_SIGNAL_PATH_RESET 0x68
|
||||
#define MPU6000_PWR_MGMT_1 0x6B
|
||||
#define MPU6000_PWR_MGMT_2 0x6C
|
||||
#define MPU6000_FIFO_COUNTH 0x72
|
||||
#define MPU6000_FIFO_COUNTL 0x73
|
||||
#define MPU6000_FIFO_R_W 0x74
|
||||
#define MPU6000_WHOAMI 0x75
|
||||
|
||||
#define BITS_DLPF_CFG_256HZ 0x00
|
||||
#define BITS_DLPF_CFG_188HZ 0x01
|
||||
#define BITS_DLPF_CFG_98HZ 0x02
|
||||
|
|
|
@ -105,7 +105,7 @@ bool mpu6500SpiDetect(void)
|
|||
|
||||
mpu6500SpiInit();
|
||||
|
||||
mpu6500ReadRegister(MPU6500_RA_WHOAMI, 1, &tmp);
|
||||
mpu6500ReadRegister(MPU_RA_WHO_AM_I, 1, &tmp);
|
||||
|
||||
if (tmp != MPU6500_WHO_AM_I_CONST)
|
||||
return false;
|
||||
|
|
|
@ -169,7 +169,7 @@ bool bmp085Detect(const bmp085Config_t *config, baro_t *baro)
|
|||
gpioInit(config->eocGpioPort, &gpio);
|
||||
BMP085_ON;
|
||||
|
||||
registerExti15_10_CallbackHandler(BMP085_EOC_EXTI_Handler);
|
||||
registerExtiCallbackHandler(EXTI15_10_IRQn, BMP085_EOC_EXTI_Handler);
|
||||
|
||||
// EXTI interrupt for barometer EOC
|
||||
gpioExtiLineConfig(GPIO_PortSourceGPIOC, GPIO_PinSource14);
|
||||
|
@ -224,7 +224,7 @@ bool bmp085Detect(const bmp085Config_t *config, baro_t *baro)
|
|||
EXTI_InitStructure.EXTI_LineCmd = DISABLE;
|
||||
EXTI_Init(&EXTI_InitStructure);
|
||||
|
||||
unregisterExti15_10_CallbackHandler(BMP085_EOC_EXTI_Handler);
|
||||
unregisterExtiCallbackHandler(EXTI15_10_IRQn, BMP085_EOC_EXTI_Handler);
|
||||
#endif
|
||||
|
||||
BMP085_OFF;
|
||||
|
|
|
@ -176,7 +176,7 @@ static void hmc5883lConfigureDataReadyInterruptHandling(void)
|
|||
}
|
||||
#endif
|
||||
|
||||
registerExti15_10_CallbackHandler(MAG_DATA_READY_EXTI_Handler);
|
||||
registerExtiCallbackHandler(hmc5883Config->exti_irqn, MAG_DATA_READY_EXTI_Handler);
|
||||
|
||||
EXTI_ClearITPendingBit(hmc5883Config->exti_line);
|
||||
|
||||
|
|
|
@ -31,45 +31,61 @@
|
|||
|
||||
#include "system.h"
|
||||
|
||||
|
||||
#ifndef EXTI15_10_CALLBACK_HANDLER_COUNT
|
||||
#define EXTI15_10_CALLBACK_HANDLER_COUNT 1
|
||||
#ifndef EXTI_CALLBACK_HANDLER_COUNT
|
||||
#define EXTI_CALLBACK_HANDLER_COUNT 1
|
||||
#endif
|
||||
|
||||
static extiCallbackHandler* exti15_10_handlers[EXTI15_10_CALLBACK_HANDLER_COUNT];
|
||||
typedef struct extiCallbackHandlerConfig_s {
|
||||
IRQn_Type irqn;
|
||||
extiCallbackHandlerFunc* fn;
|
||||
} extiCallbackHandlerConfig_t;
|
||||
|
||||
void registerExti15_10_CallbackHandler(extiCallbackHandler *fn)
|
||||
static extiCallbackHandlerConfig_t extiHandlerConfigs[EXTI_CALLBACK_HANDLER_COUNT];
|
||||
|
||||
void registerExtiCallbackHandler(IRQn_Type irqn, extiCallbackHandlerFunc *fn)
|
||||
{
|
||||
for (int index = 0; index < EXTI15_10_CALLBACK_HANDLER_COUNT; index++) {
|
||||
extiCallbackHandler *candidate = exti15_10_handlers[index];
|
||||
if (!candidate) {
|
||||
exti15_10_handlers[index] = fn;
|
||||
for (int index = 0; index < EXTI_CALLBACK_HANDLER_COUNT; index++) {
|
||||
extiCallbackHandlerConfig_t *candidate = &extiHandlerConfigs[index];
|
||||
if (!candidate->fn) {
|
||||
candidate->fn = fn;
|
||||
candidate->irqn = irqn;
|
||||
return;
|
||||
}
|
||||
}
|
||||
failureMode(FAILURE_DEVELOPER); // EXTI15_10_CALLBACK_HANDLER_COUNT is too low for the amount of handlers required.
|
||||
failureMode(FAILURE_DEVELOPER); // EXTI_CALLBACK_HANDLER_COUNT is too low for the amount of handlers required.
|
||||
}
|
||||
|
||||
void unregisterExti15_10_CallbackHandler(extiCallbackHandler *fn)
|
||||
void unregisterExtiCallbackHandler(IRQn_Type irqn, extiCallbackHandlerFunc *fn)
|
||||
{
|
||||
for (int index = 0; index < EXTI15_10_CALLBACK_HANDLER_COUNT; index++) {
|
||||
extiCallbackHandler *candidate = exti15_10_handlers[index];
|
||||
if (candidate == fn) {
|
||||
exti15_10_handlers[index] = 0;
|
||||
for (int index = 0; index < EXTI_CALLBACK_HANDLER_COUNT; index++) {
|
||||
extiCallbackHandlerConfig_t *candidate = &extiHandlerConfigs[index];
|
||||
if (candidate->fn == fn && candidate->irqn == irqn) {
|
||||
candidate->fn = NULL;
|
||||
candidate->irqn = 0;
|
||||
return;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static void extiHandler(IRQn_Type irqn)
|
||||
{
|
||||
for (int index = 0; index < EXTI_CALLBACK_HANDLER_COUNT; index++) {
|
||||
extiCallbackHandlerConfig_t *candidate = &extiHandlerConfigs[index];
|
||||
if (candidate->fn && candidate->irqn == irqn) {
|
||||
candidate->fn();
|
||||
}
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
void EXTI15_10_IRQHandler(void)
|
||||
{
|
||||
for (int index = 0; index < EXTI15_10_CALLBACK_HANDLER_COUNT; index++) {
|
||||
extiCallbackHandler *fn = exti15_10_handlers[index];
|
||||
if (!fn) {
|
||||
continue;
|
||||
}
|
||||
fn();
|
||||
}
|
||||
extiHandler(EXTI15_10_IRQn);
|
||||
}
|
||||
|
||||
void EXTI3_IRQHandler(void)
|
||||
{
|
||||
extiHandler(EXTI3_IRQn);
|
||||
}
|
||||
|
||||
// cycles per microsecond
|
||||
|
@ -148,7 +164,7 @@ void systemInit(void)
|
|||
cycleCounterInit();
|
||||
|
||||
|
||||
memset(&exti15_10_handlers, 0x00, sizeof(exti15_10_handlers));
|
||||
memset(extiHandlerConfigs, 0x00, sizeof(extiHandlerConfigs));
|
||||
// SysTick
|
||||
SysTick_Config(SystemCoreClock / 1000);
|
||||
}
|
||||
|
|
|
@ -36,10 +36,10 @@ void enableGPIOPowerUsageAndNoiseReductions(void);
|
|||
// current crystal frequency - 8 or 12MHz
|
||||
extern uint32_t hse_value;
|
||||
|
||||
typedef void extiCallbackHandler(void);
|
||||
typedef void extiCallbackHandlerFunc(void);
|
||||
|
||||
void registerExti15_10_CallbackHandler(extiCallbackHandler *fn);
|
||||
void unregisterExti15_10_CallbackHandler(extiCallbackHandler *fn);
|
||||
void registerExtiCallbackHandler(IRQn_Type irqn, extiCallbackHandlerFunc *fn);
|
||||
void unregisterExtiCallbackHandler(IRQn_Type irqn, extiCallbackHandlerFunc *fn);
|
||||
|
||||
extern uint32_t cachedRccCsrValue;
|
||||
|
||||
|
|
|
@ -18,6 +18,8 @@
|
|||
#include <stdbool.h>
|
||||
#include <stdint.h>
|
||||
|
||||
#include "platform.h"
|
||||
|
||||
#include "debug.h"
|
||||
|
||||
#include "common/axis.h"
|
||||
|
|
|
@ -18,6 +18,8 @@
|
|||
#include "stdbool.h"
|
||||
#include "stdint.h"
|
||||
|
||||
#include "platform.h"
|
||||
|
||||
#include "common/maths.h"
|
||||
|
||||
#include "drivers/adc.h"
|
||||
|
|
|
@ -126,7 +126,7 @@ const extiConfig_t *selectMPUIntExtiConfig(void)
|
|||
#endif
|
||||
|
||||
#if defined(CC3D)
|
||||
static const extiConfig_t CC3DMPU6000Config = {
|
||||
static const extiConfig_t cc3dMPUIntExtiConfig = {
|
||||
.gpioAPB2Peripherals = RCC_APB2Periph_GPIOA,
|
||||
.gpioPort = GPIOA,
|
||||
.gpioPin = Pin_3,
|
||||
|
@ -135,7 +135,7 @@ const extiConfig_t *selectMPUIntExtiConfig(void)
|
|||
.exti_line = EXTI_Line3,
|
||||
.exti_irqn = EXTI3_IRQn
|
||||
};
|
||||
return &CC3DMPU6000Config;
|
||||
return &cc3dMPUIntExtiConfig;
|
||||
#endif
|
||||
|
||||
#if defined(MOTOLAB) || defined(SPARKY)
|
||||
|
|
|
@ -44,6 +44,9 @@
|
|||
|
||||
#define USABLE_TIMER_CHANNEL_COUNT 12
|
||||
|
||||
#define DEBUG_MPU_DATA_READY_INTERRUPT
|
||||
#define USE_MPU_DATA_READY_SIGNAL
|
||||
|
||||
#define GYRO
|
||||
#define USE_GYRO_SPI_MPU6000
|
||||
|
||||
|
|
|
@ -26,7 +26,9 @@
|
|||
#include "drivers/system.h"
|
||||
#include "drivers/bus_spi.h"
|
||||
#include "drivers/sensor.h"
|
||||
#include "drivers/exti.h"
|
||||
#include "drivers/accgyro.h"
|
||||
#include "drivers/accgyro_mpu.h"
|
||||
#include "drivers/accgyro_mpu6500.h"
|
||||
|
||||
#include "hardware_revision.h"
|
||||
|
@ -80,7 +82,7 @@ uint8_t detectSpiDevice(void)
|
|||
// try autodetect MPU
|
||||
delay(50);
|
||||
ENABLE_SPI_CS;
|
||||
spiTransferByte(NAZE_SPI_INSTANCE, MPU6500_RA_WHOAMI | MPU6500_BIT_RESET);
|
||||
spiTransferByte(NAZE_SPI_INSTANCE, MPU_RA_WHO_AM_I | MPU6500_BIT_RESET);
|
||||
in[0] = spiTransferByte(NAZE_SPI_INSTANCE, 0xff);
|
||||
DISABLE_SPI_CS;
|
||||
|
||||
|
|
|
@ -73,7 +73,7 @@
|
|||
|
||||
#define USE_FLASH_M25P16
|
||||
|
||||
#define EXTI15_10_CALLBACK_HANDLER_COUNT 3 // MPU data ready, MAG data ready, BMP085 EOC
|
||||
#define EXTI_CALLBACK_HANDLER_COUNT 3 // MPU data ready, MAG data ready, BMP085 EOC
|
||||
|
||||
//#define DEBUG_MPU_DATA_READY_INTERRUPT
|
||||
#define USE_MPU_DATA_READY_SIGNAL
|
||||
|
|
|
@ -30,7 +30,7 @@
|
|||
|
||||
#define USABLE_TIMER_CHANNEL_COUNT 17
|
||||
|
||||
#define EXTI15_10_CALLBACK_HANDLER_COUNT 2 // MPU data ready and MAG data ready
|
||||
#define EXTI_CALLBACK_HANDLER_COUNT 2 // MPU data ready and MAG data ready
|
||||
|
||||
#define USE_MPU_DATA_READY_SIGNAL
|
||||
#define ENSURE_MPU_DATA_READY_IS_LOW
|
||||
|
@ -168,4 +168,4 @@
|
|||
#define S1W_TX_GPIO GPIOA
|
||||
#define S1W_TX_PIN GPIO_Pin_9
|
||||
#define S1W_RX_GPIO GPIOA
|
||||
#define S1W_RX_PIN GPIO_Pin_10
|
||||
#define S1W_RX_PIN GPIO_Pin_10
|
||||
|
|
|
@ -30,7 +30,7 @@
|
|||
|
||||
#define USABLE_TIMER_CHANNEL_COUNT 17
|
||||
|
||||
#define EXTI15_10_CALLBACK_HANDLER_COUNT 2 // MPU data ready and MAG data ready
|
||||
#define EXTI_CALLBACK_HANDLER_COUNT 2 // MPU data ready and MAG data ready
|
||||
|
||||
#define USE_MPU_DATA_READY_SIGNAL
|
||||
#define ENSURE_MPU_DATA_READY_IS_LOW
|
||||
|
|
Loading…
Reference in New Issue